HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book Bluetooth Module HBG2X3N (Preliminary Version) Data Book Rev1.1 March 4, 2011 HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book Data Book List of contents 1 General 1.1 1.2 1.3 1.4 1.5 1.6 1.7 2 Overview Features Application Pin Configuration & Outline Device Terminal Functions Package Dimensions Land Pattern Recommendation Characteristics 2.1 Electrical Characteristics 2.2 Power Consumption 2.3 Radio Characteristics 3 Terminal Descriptions 3.1 UART 3.1.1 3.1.2 UART Setting UART Bypass Mode 3.2 USB 3.3 I2C 3.4 Audio PCM Interface 3.4.1 PCM Configuration 4 Boot Interface configures 5 Application Schematic 2 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book 1. General 1.1 Overview This specification covers Bluetooth module (class-2) which complies with Bluetooth specification version 2.0 + EDR and integrates RF & Baseband controller in small package. This Module has deployed CSR’s BC04-External EDR chipset. All detailed specification including pinouts and electrical specification may be changed without notice. XTAL 26MHz 8Mb Flash 3 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book 1.2 Features Fully Qualified Bluetooth v2.0 + EDR System Enhanced Data Rate (EDR) compliant with v2.0 of specification for both 2Mbps and 3Mbps modulation modes Full-speed Bluetooth Operation with Full Piconet Support Scatternet Support Ultra Low Power Consumption Support for 802.11 Co-existence RoHS Compliant Integrated transcoders for A-law, u-law and linear PCM UART interface with programmable band rate up to 3Mbits/s with an optional bypass mode Full-speed USB v2.0 interface supports OHCI and UHCI host interface Standard HCI (UART and USB) support Integrated to 8Mbit external Flash memory Integrated 26MHz Reference Clock Competitive Size (13mm x 13mm x 1.6mm : LGA 36Pin) Operating temperature range (-20℃~45℃) Supply voltage range Internal Crystal (26Mhz) (V3.0 ~ V3.3) 1.3 Application Cellular Handsets Personal Digital Assistants (PDA) Space critical application Digital Cameras and other high-volume consumer product USB Dongle Access Points 4 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book PCM_CLK PCM_OUT UART_RTS VCC_3.3V PIO0 PIO1 SPI_CLK SPI_MISO ANT 1.4 Pin Configuration & Outline 36 35 34 33 32 31 30 29 28 SPI_MOSI 1 27 SPI_CSB PIO8 2 26 GND PIO9 3 25 UART_RX PIO10 4 24 PCM_SYNC PIO4 5 23 PCM_IN PIO11 6 22 UART_CTS PIO2 7 21 USB_DN AIO1 8 20 USB_DP GND 9 19 VDD_CORE 10 11 12 13 14 15 16 17 18 UART_TX PIO6 NC PIO7 PIO3 PIO5 AIO0 GND RESET_B HBG2X3N Pin Configuration BPF 13.0 S/W Balun BC04 EXT X-TEL 13.0 HBG2X3N Outline 5 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book 1.5 Device Terminal Functions Function Pin Name Pin No. Description PCM_OUT 29 Synchronous data output PCM_IN 23 Synchronous data input PCM_CLK 28 Synchronous data clock PCM_SYNC 24 Synchronous data sync UART_TXD 18 UART data output UART_RXD 25 UART data input (idle status high) UART_RTS 30 UART request to send, active low UART_CTS 22 UART clear to send, active low CSB 27 PCM Interface UART Interface Chip select for Synchronous Serial Interface Active low SPI Interface CLK 34 Serial Peripheral Interface clock MISO 35 Serial Peripheral Interface data output MOSI 1 Serial Peripheral Interface data input USB_DN 21 USB data minus USB_DP 20 USB Interface USB plus with selectable internal 1.5K pull-up resistor Don’t use this pin, this pin is used for switching PIO0 33 PIO1 32 PIO2 7 Programmable input/output line PIO3 13 Programmable input/output line PIO4 5 external PA and LNA Don’t use this pin, this pin is used for switching external PA and LNA Programmable input/output line or Optioanlly WLAN_Active/Ch_Data input for Co-existence signalling PIO Interface Programmable input/output line or Optionally PIO5 14 PIO6 17 PIO7 16 Programmable input/output line PIO8 2 Programmable input/output line PIO9 3 Programmable input/output line PIO10 4 Programmable input/output line PIO11 6 Programmable input/output line BT_Active output for co-existence signalling Programmable input/output line or Optionally BT_Prionity/Ch_Clk output for co-existence signalling 6 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book AIO0 11 General purpose analogue interface AIO1 8 General purpose analogue interface VDD_CORE 19 Positive supply for internal digital circuit RESETB 10 Reset if low. Input debounced so must be low Others For > 5ms to cause a reset ANT 36 RF connection to antenna VCC 31 D.C input voltage for operation (3.0 ~ 3.3) GND 9,12,26 NC 15 Ground NC 7 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book 1.6 Package Dimensions 8 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book 1.7 Land Pattern Recommendation 15.0 8.6 15.0 2.0 8.6 3.8 2.9 0.5 1.0 9 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book 2 Characteristics 2.1 Electrical Characteristics Absolute Maximum Ratings Rating Minimum Maximum Storage temperature -40℃ 85℃ Supply voltage : VCC -0.4V 3.7V VSS-0.4V VCC+0.4V Other terminal voltages Recommended Operating Conditions Operating Conditions Minimum Operating temperature range Maximum -20℃ 45℃ VCC 3.0V 3.3V POWER_VCC 3.0V 3.3V Supply voltage range 2.2 Power Consumption Operation Mode Connection UART Rate Type (Kbits/s) -- 115.2 mA ACL data transfer no traffic Master 115.2 mA ACL data transfer with file transfer Master 115.2 mA SCO connection HV3 Master 38.4 mA -- 38.4 mA Inquiring mode Standby Host connection Min Max Unit Note : Conditions : 25˚C, 3.3V supply 10 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book 2.3 RF Characteristics Transmitter Specification Condition Min Typ Max Unit Output power Normal dBm Power density Normal dBm Power control Normal dBm Frequency range Normal MHz 20dB bandwidth for modulated carrier Normal KHz Adjacent channel transmit power ±2MHz dBm ±3MHz ±4MHz Modulation Characteristics Δ f1avg KHz Δ f2max KHz % Δ f2avg / Δf1avg Initial carrier frequency tolerance Carrier frequency Drift Normal KHz One slot packet(DH1) kHz Three slot packet(DH3) Five slot packet(DH5) Transceiver Specification Out of band spurious emissions Condition Min Typ 30MHz ~ 1GHz - - 1GHz ~12.75GHz - - 1.8GHz ~5.1GHz - - 5.1GHz ~5.3GHz - - Max Unit dBm 11 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book Receiver Specification Condition Min Typ Max Unit Sensitivity level (0.1% BER) Single slot packets dBm Sensitivity level (0.1% BER) Multi slot packet dBm C/I performance co - channel dB 1MHz (Adjacent channel ) 2MHz ( 2 nd Adjacent channel ) ≥3MHz ( 3 rd Adjacent channel) Blocking performance 30MHz ~ 2000MHz dBm 2000MHz ~ 2400MHz 2500MHz ~ 3000MHz 3000MHz ~ 12.75GHz Intermodulation performance Maximum input level n=5 dBm dBm 12 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book 3 Terminal Description 3.1 UART Four signals are used to implement the UART function. UART_TXD and UART_RXD transfer data between the two devices. The remaining two signals, UART_CTS and UART_RTS, can be used to implement RS232 hardware flow control where both are active low indicators. 3.1.1 UART Setting User can change data format the following selection using PSKEY. However, host shall communicate with default setting UART connection initiated at first time. Baud Rate = (PSKEY_UART_BAUD_RATE) / 0.004096 Parameter Possible value Baud Rate 9600 ~ 3M Baud Flow Control RTS/CTS or None Parity None, Odd or Even Number of Stop Bits 1 or 2 Bits per channel 3.1.2 8 UART Bypass Mode Switch the bypass to PIO[7:4] as shown in figure. When the bypass mode has been invoked, module enters the deep sleep state indefinitely. BC04-External RESETB RXD UART_TX PIO4 UART_RTS PIO5 UART_CTS PIO6 UART_RS PIO7 TX CTS RTS RTS TXD CTS RX Host Processor UART Another Device Test Interface UART Bypass Architecture 13 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book 3.2 USB This Bluetooth module contains a full speed (12Mbit/s) USB interface that is capable of driving a USB cable directly. No external USB transceiver is required. The device operates as a USB peripheral, responding to requests from a master host controller such as a PC. Both the OHCI and the UHCI standards art supported. The set of USB endpoints implemented can behave as specified in the USB section of the Bluetooth specification v2.0 + EDR or alternatively can appear as a set of endpoints appropriate to USB audio devices such as a set of USB speakers. USB is a master/slave oriented system (in common with other USB peripherals). This Module only supports USB slave operation. 3.3 I2C PIO[8:6] can be used to form an interface. The interface is driven by “bit banging” these PIO pins using software. Therefore it is suited only to relatively slow functions such as driving a dot matrix liquid crystal display (LCD). Note. PIO[7:6] dual functions, UART bypass and EEPROM support, therefore devices using an EEPROM connect support UART bypass mode. PIO Lines need to be pulled-up through 2.2KΩ resisters. VCC 10nF 2.2kΩ 2.2kΩ 2.2kΩ U2 8 PIO[8] PIO[6] PIO[7] 7 6 5 VCC A0 WP A1 SCL A2 SDA GND 1 2 3 4 Serial EEPROM (AT24C16A) 14 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book 3.4 PCM Pulse Code Modulation (PCM) is a standard method used to digitize audio (particularly voice) patterns for transmission over digital communication channels. Through its PCM interface, this module has hardware support for continual transmission and reception of PCM data, so reducing processor overhead for wireless headset applications. This module offers a bi-directional digital audio interface that route directly into the baseband layer of the on-chip firmware. It dose not pass through the HCI protocol layer. Hardware allows the data to be sent to and received from a SCO connection This module interfaces directly to PCM audio devices including the following : - Qualcomm MSM 3000 series and MSM 5000 series CDMA baseband devices - OKI MSM7705 for channel A-law and u-law CODEC - Motorola MC145481 8-bit A-law and u-law CODEC - Motorola MC145483 13-bit linear CODEC - STW 5093 and 5094 14-bit linear CODECs 3.4.1 PCM Configuration The PCM configuration is set using two PS keys, PSKEY_PCM_CONFIG32 and PSKEY_PCM_LOW_JITTER_CONFIG. The default for long frame sync and interface master generating 256KHz PCM_CLK with no tristating of PCM_OUT. Parameter Mode Clock Rate Possible value Slave, Master Master Mode : 128, 256, 512KHz Slave Mode : up to 2048KHz Sync Formats Long frame sync, Short frame sync Data Formats 13 or 16bit linear, 8 - bit A - law to u - law 15 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book 4 Boot Interface Configures The firmware configures itself when it boots by reading the value on a set PIO pins Pin Values Features Host Transport PIO[0] PIO[1] PIO[4] 0 0 0 0 0 1 0 1 1 1 0 1 BCSP (Default) Auto Auto System Clock Baud Rate Available Available Available Available USB, 26 MHz Crystal Not available Not appropriate 0 Three-wire UART Available Available 0 1 H4DS Available Available 1 1 0 UART (H4) Available Available 1 1 1 Undefined BCSP with UART configured to use 2 stop bits and no parity - - 16 page / 17 pages HBG2X3N Bluetooth V2.0 + EDR Class 2 Module Data Book 5 Application Schematic VCC_3.3V 31 C 2.2uF VCC 10K 10 RESETB 2.2uF 15 C ANT C 11 8 33 32 7 13 5 14 17 16 2 3 4 6 HOST NC L 36 PIO0 PIO1 PIO2 PIO3 PIO4 PIO5 PIO6 PIO7 PIO8 PIO9 PIO10 PIO11 AIO0 AIO1 UART_TXD UART_RXD UART_CTS UART_RTS 18 USB_DP USB_DN 20 PCM_SYNC PCM_CLK PCM_IN PCM_OUT 24 UART_RXD UART_TXD UART_RTS UART_CTS 25 22 30 USB_DP USB_DN 21 PCM_SYNC PCM_CLK PCM_OUT PCM_IN 28 23 29 BT_EN 19 VCC_COER 4.7uF 12 26 9 GPIO GND GND GND SPI_CSB SPI_CLK SPI_MISO SPI_MOSI 27 34 35 1 17 page / 17 pages