Product Folder Sample & Buy Support & Community Tools & Software Technical Documents LMH6723, LMH6724 SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 LMH6723/LMH6724 Single/Dual/Quad 370-MHz, 1-mA Current Feedback Operational Amplifier 1 Features 3 Description • The LMH6723/LMH6724 provides a 260 MHz small signal bandwidth at a gain of +2 V/V and a 600 V/μs slew rate while consuming only 1 mA from ±5V supplies. 1 • • • • • • • • • • Large Signal Bandwidth and Slew Rate 100% Tested 370 MHz Bandwidth (AV = 1, VOUT = 0.5 VPP) −3 dB BW 260 MHz (AV = +2 V/V, VOUT = 0.5 VPP) −3 dB BW 1 mA Supply Current 110 mA Linear Output Current 0.03%, 0.11° Differential Gain, Phase 0.1 dB Gain Flatness to 100 MHz Fast Slew Rate: 600 V/μs Unity Gain Stable Single Supply Range of 4.5 to 12V Improved Replacement for CLC450, CLC452, (LMH6723) 2 Applications • • • • Line Driver Portable Video A/D Driver Portable DVD The LMH6723/LMH6724 supports video applications with its 0.03% and 0.11° differential gain and phase for NTSC and PAL video signals, while also offering a flat gain response of 0.1 dB to 100 MHz. Additionally, the LMH6723/LMH6724 can deliver 110 mA of linear output current. This level of performance, as well as a wide supply range of 4.5 to 12V, makes the LMH6723/LMH6724 an ideal op amp for a variety of portable applications. With small packages (SOIC and SOT-23), low power requirement, and high performance, the LMH6723/LMH6724 serves a wide variety of portable applications. The LMH6723/LMH6724 is manufactured in Texas Instruments' VIP10 complimentary bipolar process. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) LMH6723 SOT-23 (5) 2.90 mm × 1.60 mm LMH6723 SOIC (8) 4.90 mm × 3.91 mm LMH6724 SOIC (8) 4.90 mm × 3.91 mm (1) For all available packages, see the orderable addendum at the end of the datasheet. Typical Application 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LMH6723, LMH6724 SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 www.ti.com Table of Contents 1 2 3 4 5 6 7 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 2 3 4 6.1 6.2 6.3 6.4 6.5 6.6 6.7 4 4 4 4 5 6 8 Absolute Maximum Ratings ...................................... Handling Ratings....................................................... Recommended Operating Conditions....................... Thermal Information .................................................. ±5V Electrical Characteristics ................................... ±2.5V Electrical Characteristics ................................ Typical Performance Characteristics ........................ Application and Implementation ........................ 13 7.1 Application Information............................................ 13 7.2 Typical Application .................................................. 13 7.3 7.4 7.5 7.6 7.7 7.8 7.9 7.10 8 Evaluation Boards ................................................... Feedback Resistor Selection .................................. Active Filters............................................................ Driving Capacitive Loads ........................................ Inverting Input Parasitic Capacitance ..................... Layout Considerations ............................................ Video Performance ................................................. Single 5-V Supply Video ....................................... 13 14 16 16 17 18 18 18 Power Supply Recommendations...................... 19 8.1 ESD Protection........................................................ 19 9 Device and Documentation Support.................. 20 9.1 9.2 9.3 9.4 Related Links .......................................................... Trademarks ............................................................. Electrostatic Discharge Caution .............................. Glossary .................................................................. 20 20 20 20 10 Mechanical, Packaging, and Orderable Information ........................................................... 20 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision H (April 2013) to Revision I Page • Changed data sheet structure and organization. Added, updated, or renamed the following sections: Device Information Table, Application and Implementation; Power Supply Recommendations; Device and Documentation Support; Mechanical, Packaging, and Ordering Information. Removed "LMH6725" from title and document. ..................... 1 • Deleted "Channel Matching" and "Crosstalk" plots. .............................................................................................................. 8 • Changed Figure 11 ................................................................................................................................................................ 9 • Changed Figure 12 ................................................................................................................................................................ 9 • Changed Figure 29............................................................................................................................................................... 11 • Changed Figure 30............................................................................................................................................................... 11 • Deleted sentence beginning "These evaluation boards..." .................................................................................................. 13 • Deleted sentence beginning, "Although the example..." ..................................................................................................... 17 • Deleted sentence beginning "The SOIC-14 has ..." ............................................................................................................ 19 Changes from Revision G (April 2013) to Revision H • 2 Page Changed layout of National Data Sheet to TI format ........................................................................................................... 19 Submit Documentation Feedback Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 LMH6723, LMH6724 www.ti.com SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 5 Pin Configuration and Functions 5-Pin SOT-23 (LMH6723) Package DBV (Top View) 1 8-Pin SOIC Package (LMH6723) Package D08A (Top View) 5 OUT V + N/C -IN V - 2 8 7 - N/C + V 2 + +IN 1 +IN 4 3 -IN V - 3 6 + 4 5 OUTPUT N/C 8-Pin SOIC Package (LMH6724) Package D08A (Top View) 1 8 + V OUT A A - 2 + 7 -IN A OUT B 3 6 +IN A + V - -IN B B - 4 5 +IN B Pin Functions PIN NUMBER NAME I/O DESCRIPTION LMH6723 (DBV) LMH6723 (D08A) LMH6724 (D08A) -IN 4 2 I Inverting Input +IN 3 3 I Non-inverting Input -IN A 2 I ChA Inverting Input +IN A 3 I ChA Non-inverting Input -IN B 6 I ChB Inverting Input +IN B 5 N/C 1,5,8 I ChB Non-inverting Input – – OUT A 1 O ChA Output OUT B 7 O ChB Output OUTPUT 1 6 O Output V- 2 4 4 I Negative Supply V+ 5 7 8 I Positive Supply Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 Submit Documentation Feedback 3 LMH6723, LMH6724 SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 www.ti.com 6 Specifications 6.1 Absolute Maximum Ratings (1) (2) (3) over operating free-air temperature range (unless otherwise noted) MIN MAX VCC (V+ - V-) UNIT ±6.75 IOUT 120 (4) V mA Common Mode Input Voltage ±VCC V Maximum Junction Temperature +150 °C Infrared or Convection (20 sec) 235 °C Wave Soldering (10 sec) 260 °C Soldering Information (1) (2) (3) (4) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications, see the Electrical Characteristics tables. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and specifications. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The maximum continuous output current (IOUT) is determined by device power dissipation limitations. See Power Supply Recommendations for more details. 6.2 Handling Ratings Tstg Storage temperature range V(ESD) (1) (2) (3) Electrostatic discharge MIN MAX UNIT −65 +150 °C Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins (1) (2) 2000 Machine Model (MM), per JEDEC specification JESD22-C101, all pins (2) (3) 200 V JEDEC document JEP155 states that 2000-V HBM allows safe manufacturing with a standard ESD control process. Human Body Model, 1.5 kΩ in series with 100 pF. Machine Model, 0Ω In series with 200 pF. JEDEC document JEP157 states that 200-V MM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions (1) over operating free-air temperature range (unless otherwise noted) MAX UNIT Operating Temperature Range MIN −40 +85 °C Nominal Supply Voltage 4.5 12 V (1) NOM The maximum continuous output current (IOUT) is determined by device power dissipation limitations. See Power Supply Recommendations for more details. 6.4 Thermal Information THERMAL METRIC (1) RθJA (1) 4 Junction-to-ambient thermal resistance SOT-23 SOIC DBV D08A 5 PINS 8 PINS 230°C/W 166°C/W UNIT °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. Submit Documentation Feedback Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 LMH6723, LMH6724 www.ti.com SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 6.5 ±5V Electrical Characteristics Unless otherwise specified, AV = +2, RF = 1200Ω, RL = 100Ω. Boldface limits apply at temperature extremes. (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT FREQUENCY DOMAIN RESPONSE SSBW −3 dB Bandwidth Small Signal VOUT = 0.5 VPP LSBW −3dB Bandwidth Large Signal VOUT = 4.0 VPP 260 90 110 85 95 MHz MHz UGBW −3 dB Bandwidth Unity Gain VOUT = .2 VPP AV = 1 V/V 370 MHz .1dB BW .1 dB Bandwidth VOUT = 0.5 VPP 100 MHz DG Differential Gain RL = 150Ω, 4.43 MHz 0.03% DP Differential Phase RL = 150Ω, 4.43 MHz 0.11 deg 2.5 ns TIME DOMAIN RESPONSE TRS Rise and Fall Time 4V Step TSS Settling Time to 0.05% 2V Step SR Slew Rate 4V Step 30 ns 600 V/μs 2 VPP, 5 MHz −65 dBc 2 VPP, 5 MHz −63 dBc 500 DISTORTION and NOISE RESPONSE HD2 HD3 2nd Harmonic Distortion rd 3 Harmonic Distortion EQUIVALENT INPUT NOISE VN Non-Inverting Voltage Noise >1 MHz 4.3 nV/√Hz NICN Inverting Current Noise >1 MHz 6 pA/√Hz ICN Non-Inverting Current Noise >1 MHz 6 pA/√Hz STATIC, DC PERFORMANCE VIO Input Offset Voltage IBN Input Bias Current Non-Inverting IBI Input Bias Current Inverting PSRR Power Supply Rejection Ratio DC, 1V Step CMRR ICC (1) Common Mode Rejection Ratio DC, 1V Step ±3 ±3.7 mV −2 ±4 ±5 µA 0.4 ±4 ±5 µA LMH6723 59 57 64 LMH6724 59 55 64 LMH6723 57 55 60 LMH6724 57 53 60 RL = ∞ Supply Current (per amplifier) 1 dB dB 1 1.2 1.4 mA Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA. See Application and Implementation for information on temperature derating of this device. Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 Submit Documentation Feedback 5 LMH6723, LMH6724 SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 www.ti.com ±5V Electrical Characteristics (continued) Unless otherwise specified, AV = +2, RF = 1200Ω, RL = 100Ω. Boldface limits apply at temperature extremes.(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT MISCELLANEOUS PERFORMANCE RIN+ Input Resistance Non-Inverting RIN− Input Resistance (Output Resistance of Input Buffer) Inverting CIN Input Capacitance Non-Inverting 1.5 pF ROUT Output Resistance Closed Loop 0.01 Ω VO Output Voltage Range RL = ∞ VOL 100 kΩ Ω 500 LMH6723 ±4 ±3.9 ±4.1 LMH6724 ±4 ±3.85 ±4.1 V Output Voltage Range, High RL = 100Ω 3.6 3.5 3.7 Output Voltage Range, Low RL = 100Ω −3.25 −3.1 −3.45 CMVR Input Voltage Range Common Mode, CMRR > 50 dB IO Output Current Sourcing, VOUT = 0 V ±4.0 Sinking, VOUT = 0 V 95 70 110 −80 −70 110 mA 6.6 ±2.5V Electrical Characteristics Unless otherwise specified, AV = +2, RF = 1200Ω, RL = 100Ω. Boldface limits apply at temperature extremes. (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT FREQUENCY DOMAIN RESPONSE SSBW −3 dB Bandwidth Small Signal VOUT = 0.5 VPP LSBW −3 dB Bandwidth Large Signal VOUT = 2.0 VPP UGBW −3 dB Bandwidth Unity Gain VOUT = 0.5 VPP, AV = 1 V/V .1dB BW .1 dB Bandwidth VOUT = 0.5 VPP DG Differential Gain RL = 150Ω, 4.43 MHz .03% DP Differential Phase RL = 150Ω, 4.43 MHz 0.1 95 210 MHz 125 MHz 290 MHz 100 MHz deg TIME DOMAIN RESPONSE TRS Rise and Fall Time 2V Step SR Slew Rate 2V Step 4 275 ns 400 V/μs DISTORTION AND NOISE RESPONSE HD2 2nd Harmonic Distortion 2 VPP, 5 MHz −67 dBc HD3 3rd Harmonic Distortion 2 VPP, 5 MHz −67 dBc EQUIVALENT INPUT NOISE VN Non-Inverting Voltage >1 MHz 4.3 nV/√Hz NICN Inverting Current >1MHz 6 pA/√Hz ICN Non-Inverting Current >1MHz 6 pA/√Hz (1) 6 Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical tables under conditions of internal self heating where TJ > TA. See Application and Implementation for information on temperature derating of this device. Min/Max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Submit Documentation Feedback Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 LMH6723, LMH6724 www.ti.com SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 ±2.5V Electrical Characteristics (continued) Unless otherwise specified, AV = +2, RF = 1200Ω, RL = 100Ω. Boldface limits apply at temperature extremes.(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT −0.5 ±3 ±3.4 mV −2.7 ±4 ±5 µA −0.7 ±4 ±5 µA STATIC, DC PERFORMANCE VIO Input Offset Voltage IBN Input Bias Current Non-Inverting IBI Input Bias Current Inverting PSRR Power Supply Rejection Ratio DC, 0.5V Step CMRR ICC Common Mode Rejection Ratio DC, 0.5V Step Supply Current (per amplifier) LMH6723 59 57 62 LMH6724 58 55 62 LMH6723 57 53 59 LMH6724 55 52 59 dB dB RL = ∞ 0.9 100 1.1 1.3 mA MISCELLANEOUS PERFORMANCE RIN+ Input Resistance Non-Inverting RIN− Input Resistance (Output Resistance of Input Buffer) Inverting CIN Input Capacitance Non-Inverting ROUT Output Resistance Closed Loop VO Output Voltage Range RL = ∞ VOL Output Voltage Range, High RL = 100Ω Output Voltage Range, Low RL = 100Ω CMVR Input Voltage Range Common Mode, CMRR > 50 dB IO Output Current Sourcing 500 kΩ Ω 1.5 pF 0.02 Ω ±1.55 ±1.4 ±1.65 V LMH6723 1.35 1.27 1.45 LMH6724 1.35 1.26 1.45 LMH6723 −1.25 −1.15 −1.38 LMH6724 −1.25 −1.15 −1.38 Sinking Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 V V ±1.45 V 70 60 90 −30 −30 −60 mA Submit Documentation Feedback 7 LMH6723, LMH6724 SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 www.ti.com 6.7 Typical Performance Characteristics AV = 2, RF = 1200Ω, RL = 100Ω, unless otherwise specified. 1 1 VOUT = 0.5VPP 0 -1 0 VOUT = 2VPP -2 -2 VOUT = 1VPP -3 GAIN (dB) GAIN (dB) VOUT = 0.5VPP -1 -4 -5 -6 VOUT = 4VPP -3 VOUT = 2VPP -4 -5 VOUT = 1VPP -6 VS = ±2.5V -7 -8 VS = ±5V -7 AV = 2V/V AV = 2V/V -8 RF = 1200: -9 RF = 1200: -9 1 10 100 1 1000 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 1. Frequency Response vs. VOUT, AV = 2 Figure 2. Frequency Response vs. VOUT, AV = 2 4 4 VS = ±2.5V VS = ±5V RF = 2000: 2 RF = 2000: 2 AV = 1V/V AV = 1V/V 0 VOUT = 2VPP GAIN (dB) GAIN (dB) 0 -2 VOUT = 1VPP -4 VOUT = 0.5VPP VOUT = 4VPP -2 VOUT = 2VPP -4 -6 -6 -8 -8 VOUT = 1VPP VOUT = 0.5VPP -10 -10 1 10 100 1 1000 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 3. Frequency Response vs. VOUT, AV = 1 Figure 4. Frequency Response vs. VOUT, AV = 1 1 4 AV = +1, RF = 2000: VS = ±5V VS = ±6V VOUT = 2VPP 2 0 -1 -2 GAIN (dB) GAIN (dB) 0 AV = 6, RF = 500: -4 AV = 2, RF = 1200: -6 VS = ±2.5V -2 VS = ±3.3V -3 VS = ±5V -4 AV = -1, RF = 1200: -8 -5 -10 -6 VOUT = 2VPP AV = 2V/V 1 8 10 100 1000 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 5. Large Signal Frequency Response Figure 6. Frequency Response vs. Supply Voltage Submit Documentation Feedback Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 LMH6723, LMH6724 www.ti.com SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 Typical Performance Characteristics (continued) AV = 2, RF = 1200Ω, RL = 100Ω, unless otherwise specified. 1400 2500 1200 2000 1500 RF (:) RF (:) 1000 1000 800 600 400 500 200 0 0 1 2 3 4 5 6 7 8 9 1 10 2 3 GAIN (V/V) 8 9 10 0 0 -1 -1 RF = 1200: -2 RF = 2000: -3 RF = 800: 1 GAIN (dB) -4 RF = 1.2k: -2 RF = 2k: -3 -4 -5 VS = ±5V -6 VS = ±2.5V VOUT = 1VPP -7 VOUT = 1VPP -8 RL = 100: -8 0.1 1 10 100 0.1 1000 1 FREQUENCY (MHz) 10 100 1000 FREQUENCY (MHz) Figure 9. Frequency Response vs. RF Figure 10. Frequency Response vs. RF 130 130 Gain Phase 160 120 180 Gain Phase 140 120 120 110 100 110 80 100 40 90 0 80 -40 | Z | (dB:) 200 Phase (degrees) 140 100 60 90 20 80 -20 70 -60 -100 70 -80 60 -120 60 50 -160 50 40 0.1 1 10 100 1000 Frequency (kHz) -200 10000 100000 1000000 40 0.1 -140 1 D001 Figure 11. Open Loop Gain & Phase Phase (Degrees) GAIN (dB) 7 2 RF = 800: -5 | Z | (dB:) 6 Figure 8. Suggested RF vs. Gain Inverting 2 1 -7 5 GAIN (-V/V) Figure 7. Suggested RF vs. Gain Non-Inverting -6 4 10 100 1000 Frequency (kHz) 10000 -180 100000 D002 Figure 12. Open Loop Gain & Phase Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 Submit Documentation Feedback 9 LMH6723, LMH6724 SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 www.ti.com Typical Performance Characteristics (continued) AV = 2, RF = 1200Ω, RL = 100Ω, unless otherwise specified. -40 -35 VS = ±2.5V f = 5MHz VS = ±5V f = 5MHz -45 -45 DISTORTION (dBc) DISTORTION (dBc) -40 -50 HD3 -55 HD2 -60 -50 -55 HD2 -60 -65 -65 -70 -70 -75 HD3 -80 -75 0.5 0 1 2 1.5 2.5 1 0 3 2 3 -40 -45 -45 -50 DISTORTION (dBc) DISTORTION (dBc) -40 HD3 HD2 -60 -65 -70 HD2 -55 -60 HD3 -65 VS = ±5V VOUT = 2VPP 10 20 30 40 50 0 10 20 FREQUENCY (MHz) 40 50 Figure 16. HD2 & HD3 vs. Frequency 2 2 0 0 CL = 100pF, ROUT = 24: GAIN (dB) -2 CL = 47pF, ROUT = 30: -4 30 FREQUENCY (MHz) Figure 15. HD2 & HD3 vs. Frequency GAIN (dB) 8 -80 0 CL = 10pF, ROUT = 48: -6 CL = 100pF, ROUT = 24: CL = 47pF, ROUT = 30: -4 CL = 10pF, ROUT = 48: -6 VS = ±2.5V VS = ±5V RL = 1k:||CL RL = 1k:||CL -8 VOUT = .8VPP -10 0.1 10 7 -50 -75 VOUT = 2VPP -80 -8 6 -70 VS = ±2.5V -75 -2 5 Figure 14. HD2 & HD3 vs. VOUT Figure 13. HD2 & HD3 vs. VOUT -55 4 VOUT (VPP) VOUT (VPP) 1 VOUT = .8VPP 10 100 1000 -10 0.1 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 17. Frequency Response vs. CL Figure 18. Frequency Response vs. CL Submit Documentation Feedback Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 LMH6723, LMH6724 www.ti.com SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 Typical Performance Characteristics (continued) 60 60 50 50 SUGGESTED ROUT SUGGESTED ROUT AV = 2, RF = 1200Ω, RL = 100Ω, unless otherwise specified. 40 30 20 10 40 30 20 10 VS = ±2.5V VS = ±5V LOAD = 1k:||CL LOAD = 1k:||CL 0 0 1 10 100 1 1000 10 1000 CAPACITIVE LOAD (pF) Figure 19. Suggested ROUT vs. CL Figure 20. Suggested ROUT vs. CL 70 80 PSRR+ PSRR+ 70 60 PSRR- 60 50 PSRR- PSRR (dB) PSRR (dB) 100 CAPACITIVE LOAD (pF) 40 30 20 50 40 30 20 10 10 VS = ±2.5V 0 0.001 0.01 0.1 1 10 VS = ±5V 0 0.001 0.01 100 0.1 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 21. PSRR vs. Frequency Figure 22. PSRR vs. Frequency 70 100 VS = ±5V 60 10 CMRR (dB) |Z|OUT (:) 50 1 VS = ±2.5V 0.1 VS = ±2.5V 40 30 20 0.01 10 VS = ±5V 0.001 0.001 0.01 0.1 1 10 100 0 0.001 0.01 0.1 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 23. Closed Loop Output Resistance Figure 24. CMRR vs. Frequency Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 Submit Documentation Feedback 11 LMH6723, LMH6724 SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 www.ti.com Typical Performance Characteristics (continued) AV = 2, RF = 1200Ω, RL = 100Ω, unless otherwise specified. 0.03 1 0.11 0.09 0.01 0.07 0 0.05 GAIN -0.01 0.03 VS = ±5V f = 4.43MHz -0.02 0 GAIN (dB) 0.02 DIFFERENTIAL PHASE (°) DIFFERENTIAL GAIN (%) PHASE -1 -2 VS = ±5V 0.01 VOUT = 0.5 VPP RL = 150: -0.03 -0.75 RF = 1.1 k: -0.01 -0.5 -0.25 0 0.25 0.5 -3 0.75 100 10 OUTPUT OFFSET (V) 100 IRE = 0.714V 1k FREQUENCY (MHz) Figure 25. Differential Gain & Phase Figure 26. Channel Matching (LMH6724) 1 -30 -35 -40 CROSSTALK (dBc) GAIN (dB) 0 -1 -2 -45 CHANNEL A -50 -55 -60 -65 CHANNEL B VS = ±2.5V -70 VOUT = 0.5 VPP -75 RF = 1.1 k: -80 -3 100 10 1 1k 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 28. Crosstalk (LMH6724) Figure 27. Channel Matching (LMH6724) 2.5 1 Vs = r5V 0.75 1.5 1 Vout (V) 0.25 Vout (V) Vs = r5V 2 0.5 0 -0.25 -0.5 0.5 0 -0.5 -1 -0.75 -1.5 -1 -2 -1.25 -2.5 0 5 10 15 Time (nS) 0 20 D001 Figure 29. Output Small Signal Pulse Response 12 1000 Submit Documentation Feedback 5 10 15 20 25 30 35 40 45 50 55 Time (nS) D001 Figure 30. Output Large Signal Pulse Response Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 LMH6723, LMH6724 www.ti.com SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 7 Application and Implementation 7.1 Application Information The LMH6723/LMH6724 is a high speed current feedback amplifier manufactured on Texas Instruments' VIP10 (Vertically Integrated PNP) complimentary bipolar process. LMH6723/LMH6724 offers a unique combination of high speed and low quiescent supply current making it suitable for a wide range of battery powered and portable applications that require high performance. This amplifier can operate from 4.5V to 12V nominal supply voltages and draws only 1 mA of quiescent supply current at 10V supplies (±5V typically). The LMH6723/LMH6724 has no internal ground reference so single or split supply configurations are both equally useful. 7.2 Typical Application 7.3 Evaluation Boards Texas Instruments provides the following evaluation boards as a guide for high frequency layout and as an aid in device testing and characterization. Many of the datasheet plots were measured with these boards. DEVICE PACKAGE BOARD PART NUMBER LMH6723MA SOIC-8 LMH730227 LMH6723MF SOT-23 LMH730216 LMH6724MA SOIC-8 LMH730036 Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 Submit Documentation Feedback 13 LMH6723, LMH6724 SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 www.ti.com 7.4 Feedback Resistor Selection One of the key benefits of a current feedback operational amplifier is the ability to maintain optimum frequency response independent of gain by using appropriate values for the feedback resistor (RF). The Electrical Characteristics and Typical Performance plots were generated with an RF of 1200Ω, a gain of +2V/V and ±5V or ±2.5V power supplies (unless otherwise specified). Generally, lowering RF from its recommended value will peak the frequency response and extend the bandwidth; however, increasing the value of RF will cause the frequency response to roll off faster. Reducing the value of RF too far below it's recommended value will cause overshoot, ringing, and eventually, oscillation. 2 RF = 800: 1 0 GAIN (dB) -1 RF = 1200: -2 RF = 2000: -3 -4 -5 -6 -7 VS = ±2.5V VOUT = 1VPP -8 0.1 1 10 100 1000 FREQUENCY (MHz) Figure 31. Frequency Response vs. RF Figure 31 shows the LMH6723/LMH6724's frequency response as RF is varied (RL = 100Ω, AV = +2). This plot shows that an RF of 800Ω results in peaking. An RF of 1200Ω gives near maximal bandwidth and gain flatness with good stability. Since each application is slightly different, it is worth experimenting to find the optimal RF for a given circuit. In general, a value of RF that produces ~0.1 dB of peaking is the best compromise between stability and maximal bandwidth. Note that it is not possible to use a current feedback amplifier with the output shorted directly to the inverting input. The buffer configuration of the LMH6723/LMH6724 requires a 2000-Ω feedback resistor for stable operation. For other gains see the charts Figure 32 and Figure 33. These charts provide a good place to start when selecting the best feedback resistor value for a variety of gain settings. 14 Submit Documentation Feedback Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 LMH6723, LMH6724 www.ti.com SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 Feedback Resistor Selection (continued) For more information see Application Note OA-13 which describes the relationship between RF and closed-loop frequency response for current feedback operational amplifiers. The value for the inverting input impedance for the LMH6723/LMH6724 is approximately 500 Ω. The LMH6723/LMH6724 is designed for optimum performance at gains of +1 to +5V/V and −1 to −4V/V. Higher gain configurations are still useful; however, the bandwidth will fall as gain is increased, much like a typical voltage feedback amplifier. 2500 RF (:) 2000 1500 1000 500 0 1 2 3 4 5 6 7 8 9 10 GAIN (V/V) Figure 32. RF vs. Non-Inverting Gain Figure 32 and Figure 33 show the value of RF versus gain. A higher RF is required at higher gains to keep RG from decreasing too far below the input impedance of the inverting input. This limitation applies to both inverting and non-inverting configurations. For the LMH6723/LMH6724 the input resistance of the inverting input is approximately 500Ω and 100Ω is a practical lower limit for RG. The LMH6723/LMH6724 begins to operate in a gain bandwidth limited fashion in the region where RF must be increased for higher gains. Note that the amplifier will operate with RG values well below 100 Ω; however, results will be substantially different than predicted from ideal models. In particular, the voltage potential between the Inverting and Non-Inverting inputs cannot be expected to remain small. For inverting configurations the impedance seen by the source is RG || RT. For most sources this limits the maximum inverting gain since RF is determined by the desired gain as shown in Figure 33. The value of RG is then RF/Gain. Thus for an inverting gain of −4 V/V the input impedance is equal to 100Ω. Using a termination resistor, this can be brought down to match a 50-Ω or 75-Ω source; however, a 150Ω source cannot be matched without a severe compromise in RF. 1400 1200 RF (:) 1000 800 600 400 200 0 1 2 3 4 5 6 7 8 9 10 GAIN (-V/V) Figure 33. RF vs. Inverting Gain Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 Submit Documentation Feedback 15 LMH6723, LMH6724 SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 www.ti.com 7.5 Active Filters When using any current feedback operational amplifier as an active filter it is necessary to be careful using reactive components in the feedback loop. Reducing the feedback impedance, especially at higher frequencies, will almost certainly cause stability problems. Likewise capacitance on the inverting input should be avoided. See Application Notes OA-07 and OA-26 for more information on Active Filter applications for Current Feedback Op Amps. When using the LMH6723/LMH6724 as a low-pass filter the value of RF can be substantially reduced from the value recommended in the RF vs. Gain charts. The benefit of reducing RF is increased gain at higher frequencies, which improves attenuation in the stop band. Stability problems are avoided because in the stop band additional device bandwidth is used to cancel the input signal rather than amplify it. The benefit of this change depends on the particulars of the circuit design. With a high pass filter configuration reducing RF will likely result in device instability and is not recommended. 6.8PF C2 100nF C1 RIN 75: X1 + + - - RG 1.2k: ROUT 75: RF 1.2k: 100nF C3 6.8PF C4 Figure 34. Typical Application with Suggested Supply Bypassing X1 + + RIN 51: RG 1.2k: - - ROUT 51: CL 10pF RL 1k: RF 1.2k: Figure 35. Decoupling Capacitive Loads 7.6 Driving Capacitive Loads Capacitive output loading applications will benefit from the use of a series output resistor as shown in Figure 35. The charts "Suggested ROUT vs. Cap Load" give a recommended value for selecting a series output resistor for mitigating capacitive loads. The values suggested in the charts are selected for .5 dB or less of peaking in the frequency response. This gives a good compromise between settling time and bandwidth. For applications where maximum frequency response is needed and some peaking is tolerable, the value of ROUT can be reduced slightly from the recommended values. There will be amplitude lost in the series resistor unless the gain is adjusted to compensate; this effect is most noticeable with heavy loads (RL < 150Ω). 16 Submit Documentation Feedback Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 LMH6723, LMH6724 www.ti.com SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 Driving Capacitive Loads (continued) An alternative approach is to place ROUT inside the feedback loop as shown in Figure 36. This will preserve gain accuracy, but will still limit maximum output voltage swing. X1 + + RIN 51: - RG 1.2k: ROUT 51: - CL 10pF RL 1k: RF 1.2k: Figure 36. Series Output Resistor Inside Feedback Loop 7.7 Inverting Input Parasitic Capacitance Parasitic capacitance is any capacitance in a circuit that was not intentionally added. It is produced through electrical interaction between conductors and can be reduced but never entirely eliminated. Most parasitic capacitances that cause problems are related to board layout or lack of termination on transmission lines. See Layout Considerations for hints on reducing problems due to parasitic capacitances on board traces. Transmission lines should be terminated in their characteristic impedance at both ends. High speed amplifiers are sensitive to capacitance between the inverting input and ground or power supplies. This shows up as gain peaking at high frequency. The capacitor raises device gain at high frequencies by making RG appear smaller. Capacitive output loading will exaggerate this effect. One possible remedy for this effect is to slightly increase the value of the feedback (and gain set) resistor. This will tend to offset the high frequency gain peaking while leaving other parameters relatively unchanged. If the device has a capacitive load as well as inverting input capacitance, using a series output resistor as described in Driving Capacitive Loads will help. C1 680 pF R11 20: R8 3.5 k: (2) + R9 3.5 k: (3) + R10 3.5 k: ein R3 50: R1 750: + (1) - R2 3 k: (4) + R4 1: R5 1: R6 1: R7 1: OUTPUT Figure 37. High Output Current Composite Amplifier When higher currents are required than a single amplifier can provide, the circuit of Figure 37 can be used. Careful attention to a few key components will optimize performance from this circuit. The first thing to note is that the buffers need slightly higher value feedback resistors than if the amplifiers were individually configured. As well, R11 and C1 provide mid circuit frequency compensation to further improve stability. The composite amplifier has approximately twice the phase delay of a single circuit. The larger values of R8, R9 and R10, as well as the high frequency attenuation provided by C1 and R11, ensure that the circuit does not oscillate. Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 Submit Documentation Feedback 17 LMH6723, LMH6724 SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 www.ti.com Inverting Input Parasitic Capacitance (continued) Resistors R4, R5, R6, and R7 are necessary to ensure even current distribution between the amplifiers. Since they are inside the feedback loop they have no effect on the gain of the circuit. The circuit shown in Figure 37 has a gain of 5. The frequency response of this circuit is shown in Figure 38. 14 180 13 135 12 90 11 45 PHASE (°) GAIN (dB) GAIN PHASE 10 0 -45 9 VS = ±5V 8 VOUT = 2.5 VPP 7 RL = 5.6: -90 -135 AV = 5 -180 6 1 10 100 FREQUENCY (MHz) Figure 38. Composite Amplifier Frequency Response 7.8 Layout Considerations Whenever questions about layout arise, use the evaluation board as a guide. Evaluation boards are shipped with sample requests. To reduce parasitic capacitances ground and power planes should be removed near the input and output pins. Components in the feedback loop should be placed as close to the device as possible. For long signal paths controlled impedance lines should be used, along with impedance matching at both ends. Bypass capacitors should be placed as close to the device as possible. Bypass capacitors from each rail to ground are applied in pairs. The larger electrolytic bypass capacitors can be located anywhere on the board; however, the smaller ceramic capacitors should be placed as close to the device as possible. 7.9 Video Performance The LMH6723/LMH6724 has been designed to provide good performance with both PAL and NTSC composite video signals. The LMH6723/LMH6724 is specified for PAL signals. Typically, NTSC performance is marginally better due to the lower frequency content of the signal. Performance degrades as the loading is increased; therefore, best performance will be obtained with back terminated loads. The back termination reduces reflections from the transmission line and effectively masks transmission line and other parasitic capacitances from the amplifier output stage. Figure 34 shows a typical configuration for driving a 75Ω cable. The amplifier is configured for a gain of 2 to make up for the 6dB of loss in ROUT. 7.10 Single 5-V Supply Video With a 5V supply the LMH6723/LMH6724 is able to handle a composite NTSC video signal, provided that the signal is AC coupled and level shifted so that the signal is centered around VCC/2. 7.10.1 Application Curves See Figure 31 through Figure 33 and Figure 38. 18 Submit Documentation Feedback Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 LMH6723, LMH6724 www.ti.com SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 8 Power Supply Recommendations Follow these steps to determine the maximum power dissipation for the LMH6723/LMH6724: 1. Calculate the quiescent (no-load) power: PAMP = ICC * (VS) where VS = V+ - V2. Calculate the RMS power dissipated in the output stage: PD (rms) = rms ((VS-VOUT)*IOUT) where VOUT and IOUT are the voltage and current of the external load and Vs is the supply voltage. 3. Calculate the total RMS power: PT = PAMP +PD The maximum power that the LMH6723/LMH6724 package can dissipate at a given temperature can be derived with the following equation: PMAX = (150º - TAMB)/ RθJA where • • TAMB = Ambient temperature (°C) RθJA = Thermal resistance, from junction to ambient, for a given package (°C/W) (1) For the SOIC-8 package RθJA is 166°C/W and for the SOT-23-5 it is 230°C/W. 8.1 ESD Protection The LMH6723/LMH6724 is protected against electrostatic discharge (ESD) on all pins. The LMH6723 will survive 2000V Human Body Model or 200V Machine Model events. Under closed loop operation the ESD diodes have no effect on circuit performance. There are occasions, however, when the ESD diodes will be evident. If the LMH6723/LMH6724 is driven into a slewing condition the ESD diodes will clamp large differential voltages until the feedback loop restores closed loop operation. Also, if the device is powered down and a large input signal is applied, the ESD diodes will conduct. Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 Submit Documentation Feedback 19 LMH6723, LMH6724 SNOSA83I – AUGUST 2003 – REVISED AUGUST 2014 www.ti.com 9 Device and Documentation Support 9.1 Related Links The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 1. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY LMH6723 Click here Click here Click here Click here Click here LMH6724 Click here Click here Click here Click here Click here 9.2 Trademarks All trademarks are the property of their respective owners. 9.3 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 9.4 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 10 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 20 Submit Documentation Feedback Copyright © 2003–2014, Texas Instruments Incorporated Product Folder Links: LMH6723 LMH6724 PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2016 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMH6723 MDC ACTIVE DIESALE Y 0 400 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85 LMH6723 MWC ACTIVE WAFERSALE YS 0 1 Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM -40 to 85 LMH6723MA NRND SOIC D 8 95 TBD Call TI Call TI -40 to 85 LMH6723MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH67 23MA LMH6723MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH67 23MA LMH6723MF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 AB1A LMH6723MFX NRND SOT-23 DBV 5 3000 TBD Call TI Call TI -40 to 85 LMH6723MFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 AB1A LMH6724MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH67 24MA LMH6724MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 LMH67 24MA (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 27-Jul-2016 (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 7-Dec-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LMH6723MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMH6723MF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMH6723MFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMH6724MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 7-Dec-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMH6723MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMH6723MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMH6723MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMH6724MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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