CYStech Electronics Corp. Spec. No. : C877J3 Issued Date : 2014.12.25 Revised Date : 2014.12.26 Page No. : 1/9 P-Channel Enhancement Mode Power MOSFET MTB09P04DJ3 BVDSS ID@VGS=-10V, TC=25°C ID@VGS=-10V, TA=25°C RDS(ON)@VGS=-10V, ID=-25A RDS(ON)@VGS=-4.5V, ID=-15A -40V -50A -13.7A 5.2mΩ(typ) 6.9mΩ(typ) Features • Single Drive Requirement • Low On-resistance • Fast switching Characteristic • Pb-free lead plating and halogen-free package Symbol Outline MTB09P04DJ3 TO-252(DPAK) G：Gate D：Drain S：Source G D S Ordering Information Device MTB09P04DJ3-0-T3-G Package TO-252 (Pb-free lead plating and halogen-free package) Shipping 2500 pcs / Tape & Reel Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T3 : 2500 pcs / tape & reel, 13” reel Product rank, zero for no rank products Product name MTB09P04DJ3 CYStek Product Specification Spec. No. : C877J3 Issued Date : 2014.12.25 Revised Date : 2014.12.26 Page No. : 2/9 CYStech Electronics Corp. Absolute Maximum Ratings (Ta=25°C) Parameter Symbol Drain-Source Voltage Gate-Source Voltage Continuous Drain Current @VGS=-10V, TC=25°C (Package Limit) Continuous Drain Current @VGS=-10V, TC=25°C (Silicon Limit) Continuous Drain Current @VGS=-10V, TC=100°C(Silicon Limit) Continuous Drain Current @VGS=-10V, TA=25°C Continuous Drain Current @VGS=-10V, TA=100°C Pulsed Drain Current TC=25℃ TC=100℃ Power Dissipation TA=25℃ TA=100℃ Single Pulse Avalanche Energy Single Pulse Avalanche Current Operating Junction and Storage Temperature VDS VGS ID IDSM IDM PD PDSM EAS IAS Tj, Tstg Limits Unit -40 ±20 -50 -74 -52 -13.7 -8.7 -200 *1 94 *4 47 *4 2.5 *3 1.0 *3 625 *2 -50 -55~+175 V A W mJ A °C Thermal Data Parameter Thermal Resistance, Junction-to-case, max Thermal Resistance, Junction-to-ambient, max Symbol Rth,j-c Rth,j-a Value 1.6 50 *3 Unit °C/W °C/W Note : *1. Pulse width limited by safe operating area. *2 . Tj=25°C, VDD=-15V, L=0.5mH, RG=25Ω. *3 . The value of Rth,j-a is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user’s specific board design, and the maximum temperature of 175°C may be used if the PCB allows it. *4 . The power dissipation PD is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. It is used to determined the current rating, when this rating falls below the package limit. Characteristics (Tj=25°C, unless otherwise specified) Symbol Min. Typ. Max. Unit Static BVDSS VGS(th) GFS IGSS IDSS IDSS *RDS(ON) *RDS(ON) -40 -0.8 - 55 5.2 6.9 -2.0 ±100 -1 -25 7 10.5 V V S nA MTB09P04DJ3 μA mΩ Test Conditions VGS=0V, ID=-250μA VDS = VGS, ID=-250μA VDS =-5V, ID=-25A VGS=±20V VDS =-32V, VGS =0V VDS =-32V, VGS =0V, Tj=70°C VGS =-10V, ID=-25A VGS =-4.5V, ID=-15A CYStek Product Specification CYStech Electronics Corp. Dynamic *Qg *Qgs *Qgd *td(ON) *tr *td(OFF) *tf Ciss Coss Crss Rg Source-Drain Diode *IS *VSD *trr *Qrr - 121 19 20 20 22 135 33 6433 501 258 3.5 - -0.83 24 17 -50 -1.2 - Spec. No. : C877J3 Issued Date : 2014.12.25 Revised Date : 2014.12.26 Page No. : 3/9 nC ID=-25A, VDS=-20V, VGS=-10V ns VDS=-20V, VGS=-10V, RG=3.3Ω, ID=-25A pF VGS=0V, VDS=-25V, f=1MHz Ω f=1MHz A V ns nC IS=-25A, VGS=0V IS=-25A, VGS=0, dI/dt=100A/μs *Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% Recommended soldering footprint MTB09P04DJ3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C877J3 Issued Date : 2014.12.25 Revised Date : 2014.12.26 Page No. : 4/9 Typical Characteristics Brekdown Voltage vs Ambient Temperature Typical Output Characteristics 1.4 200 -I D, Drain Current(A) 160 -BVDSS, Normalized Drain-Source Breakdown Voltage 10V,9V,8V,7V,6V,5V -VGS=4V 120 80 -VGS=3V 40 -VGS=2V -VGS=2.5V 1.2 1 0.8 0.6 ID=-250μA, VGS=0V 0.4 0 0 1 2 3 4 -VDS, Drain-Source Voltage(V) -75 -50 -25 5 Reverse Drain Current vs Source-Drain Voltage Static Drain-Source On-State resistance vs Drain Current 1.2 In descending order VGS=-2.5V -3V -4.5V -10V 90 80 70 60 -VSD, Source-Drain Voltage(V) RDS(ON), Static Drain-Source On-State Resistance(mΩ) 100 50 40 30 20 VGS=0V 1 Tj=25°C 0.8 0.6 Tj=150°C 0.4 10 0.2 0 0.01 0.1 1 10 -ID, Drain Current(A) 0 100 2 4 6 8 10 12 14 16 -IDR , Reverse Drain Current(A) 18 20 Drain-Source On-State Resistance vs Junction Tempearture Static Drain-Source On-State Resistance vs Gate-Source Voltage 100 3 90 R DS(ON) , Normalized Static DrainSource On-State Resistance R DS(ON), Static Drain-Source OnState Resistance(mΩ) 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) ID=-25A 80 70 60 50 40 30 20 10 2.5 VGS=-10V, ID=-25A 2 1.5 1 0.5 RDS(ON) @Tj=25°C : 5.2mΩ typ 0 0 0 MTB09P04DJ3 2 4 6 8 -VGS, Gate-Source Voltage(V) 10 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) CYStek Product Specification CYStech Electronics Corp. Spec. No. : C877J3 Issued Date : 2014.12.25 Revised Date : 2014.12.26 Page No. : 5/9 Typical Characteristics(Cont.) Threshold Voltage vs Junction Tempearture Capacitance vs Drain-to-Source Voltage -VGS(th), Normalized Threshold Voltage 10000 Capacitance---(pF) Ciss 1000 C oss f=1MHz Crss 1.4 1.2 ID=-1mA 1 0.8 0.6 ID=-250μA 0.4 0.2 100 0 10 20 -VDS, Drain-Source Voltage(V) -75 -50 -25 30 75 100 125 150 175 200 Gate Charge Characteristics 10 100μ s RDS(ON) Limited 100 1ms 10ms 100ms 10 1s TC=25°C, Tj=175°C, VGS=-10V, RθJC=1.6°C/W, single pulse 1 DC -VGS, Gate-Source Voltage(V) 1000 -I D, Drain Current (A) 25 50 Tj, Junction Temperature(°C) Maximum Safe Operating Area VDS=-20V 8 VDS=-10V 6 4 VDS=-40V 2 ID=-25A 0 0.1 0.1 1 10 -VDS, Drain-Source Voltage(V) 0 100 20 40 60 80 100 120 Qg, Total Gate Charge(nC) 140 160 Forward Transfer Admittance vs Drain Current Maximum Drain Current vs Case Temperature 100 80 GFS , Forward Transfer Admittance(S) 90 -I D, Maximum Drain Current(A) 0 Silicon limit 70 60 50 40 Package limit 30 20 VGS=-10V, Tj(max)=175°C, RθJC=1.6°C/W, single pulse 10 0 25 MTB09P04DJ3 50 75 100 125 150 TC , Case Temperature(°C) 175 200 10 1 VDS=-5V Pulsed Ta=25°C 0.1 0.01 0.001 0.01 0.1 1 -ID, Drain Current(A) 10 100 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C877J3 Issued Date : 2014.12.25 Revised Date : 2014.12.26 Page No. : 6/9 Typical Characteristics(Cont.) Power Derating Curve Typical Transfer Characteristics 100 200 VDS=-10V PD, Power Dissipation(W) 180 -ID, Drain Current(A) 160 140 120 100 80 60 40 80 60 40 20 20 0 0 0 1 2 3 4 5 0 -VGS, Gate-Source Voltage(V) 25 50 75 100 125 150 TC, Case Temperature(℃) 175 200 Transient Thermal Response Curves 1 r(t), Normalized Effective Transient Thermal Resistance D=0.5 0.1 0.2 1.RθJC(t)=r(t)*RθJC 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*Rθ JC(t) 4.RθJC=1.6°C/W 0.1 0.05 0.02 0.01 0.01 Single Pulse 0.001 1.E-04 MTB09P04DJ3 1.E-03 1.E-02 1.E-01 1.E+00 t1, Square Wave Pulse Duration(s) 1.E+01 1.E+02 1.E+03 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C877J3 Issued Date : 2014.12.25 Revised Date : 2014.12.26 Page No. : 7/9 Reel Dimension Carrier Tape Dimension MTB09P04DJ3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C877J3 Issued Date : 2014.12.25 Revised Date : 2014.12.26 Page No. : 8/9 Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Average ramp-up rate 3°C/second max. (Tsmax to Tp) Preheat 100°C −Temperature Min(TS min) −Temperature Max(TS max) 150°C −Time(ts min to ts max) 60-120 seconds Time maintained above: −Temperature (TL) 183°C − Time (tL) 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C Time within 5°C of actual peak 10-30 seconds temperature(tp) Ramp down rate 6°C/second max. 6 minutes max. Time 25 °C to peak temperature Pb-free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds 260 +0/-5 °C 20-40 seconds 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. MTB09P04DJ3 CYStek Product Specification Spec. No. : C877J3 Issued Date : 2014.12.25 Revised Date : 2014.12.26 Page No. : 9/9 CYStech Electronics Corp. TO-252 Dimension Marking: 4 B09 P04D Device Name Date Code □□□□ 1 3-Lead TO-252 Plastic Surface Mount Package CYStek Package Code: J3 Inches Min. Max. 0.087 0.094 0.000 0.005 0.039 0.048 0.026 0.034 0.026 0.034 0.018 0.023 0.018 0.023 0.256 0.264 0.201 0.215 0.236 0.244 DIM A A1 B b b1 C C1 D D1 E Millimeters Min. Max. 2.200 2.400 0.000 0.127 0.990 1.210 0.660 0.860 0.660 0.860 0.460 0.580 0.460 0.580 6.500 6.700 5.100 5.460 6.000 6.200 2 3 Style: Pin 1.Gate 2.Drain 3.Source 4.Drain DIM e e1 H K L L1 L2 L3 P V Inches Min. Max. 0.086 0.094 0.172 0.188 0.163 REF 0.190 REF 0.386 0.409 0.114 REF 0.055 0.067 0.024 0.039 0.026 REF 0.211 REF Millimeters Min. Max. 2.186 2.386 4.372 4.772 4.140 REF 4.830 REF 9.800 10.400 2.900 REF 1.400 1.700 0.600 1.000 0.650 REF 5.350 REF Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead : Pure tin plated. • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTB09P04DJ3 CYStek Product Specification