ETC1 MB8441-45PFQ1 C-mos 64k - bit dual port static ram Datasheet

MB8441-45PFQ(1/3)
IL00
**********
C-MOS 64K-BIT DUAL PORT STATIC RAM
VDD(+5V)
VDD(+5V)
GND
VDD(+5V)
GND
GND
NC
NC
NC
NC
32
31
30
29
28
27
26
25
24
23
22
21
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
52
53
54
55
56
57
58
59
60
61
62
63
64
NC
NC
NC
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
–TOP VIEW–
(VDD = +5V)
PIN
NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
I/O
SIGNAL
I
I
I
I
I
I
I
I
I
I
I
I
—
—
O
I/O
A12L
OEL
A0L
A1L
A2L
A3L
A4L
A5L
A6L
A7L
A8L
A9L
NC
NC
I/O1L
PIN
NO.
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
I/O
SIGNAL
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
—
—
—
I/O
I/O
I/O
I/O
I/O
I/O2L
I/O3L
I/O4L
I/O5L
I/O6L
I/O7L
I/O8L
GND
GND
VDD
GND
I/O1R
I/O2R
I/O3R
I/O4R
I/O5R
PIN
NO.
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
I/O
SIGNAL
I/O
I/O
I/O
—
—
—
I
I
I
I
I
I
I
I
I
I
I/O6R
I/O7R
I/O8R
NC
NC
NC
A9R
A8R
A7R
A6R
A5R
A4R
A3R
A2R
A1R
A0R
PIN
NO.
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
I/O
I
I
I
I
O
I
I
I
—
—
I
I
I
O
I
I
SIGNAL
A12R
A11R
A10R
R
R
R
R
VDD
VDD
L
L
L
L
A10L
A11L
MB8441-45PFQ(2/3)
2
3
4
5
6
7
8
9
10
11
12
63
61
48
47
46
45
44
43
42
41
40
39
52
54
49
OEL
OER
A0L
I/O1L
A1L
I/O2L
A2L
I/O3L
A3L
I/O4L
A4L
I/O5L
A5L
I/O6L
A6L
I/O7L
A7L
I/O8L
16
17
18
19
20
21
22
23
A8L
A9L
INTL
62
A10L
BUSYL
A0R
I/O1R
A1R
I/O2R
A2R
I/O3R
A3R
I/O4R
A4R
I/O5R
A5R
I/O6R
A6R
I/O7R
A7R
I/O8R
28
29
30
31
32
33
34
35
A8R
INTR
A9R
A10R
BUSYR
CSL
59
WEL
60
CSR
56
WER
55
53
A0L - A10L,
A0R - A10R
;
;
L,
R ;
L,
R
;
I/O0L - I/O10L,
I/O0R - I/O10R ;
L,
R
;
L,
R
;
L,
R
;
ADDRESS INPUTS
BUSY OUTPUT ENABLE
BUSY INPUTS
CHIP SELECT INPUTS
DATA INPUTS/OUTPUTS
INTERRUPT OUTPUTS
OUTPUT ENABLE INPUTS
WRITE ENABLE INPUTS
MB8441-45PFQ(3/3)
WEL
CSL
OEL
I/O1L
I/O2L
I/O3L
I/O4L
I/O5L
I/O6L
I/O7L
I/O8L
A12L
A11L
A10L
A9L
A8L
A7L
A6L
A5L
A4L
A3L
A2L
A1L
A0L
60
WEL
WER
59
2
55
56
OEL
OER
49
28
28
29
29
30
30
31
31
32
I/O
BUFFER
I/O
BUFFER
32
33
33
34
34
35
35
1
50
64
51
63
12
ROW
DECODER
ROW
DECODER
52
39
11
40
10
41
9
42
8
43
7
44
6
COLUMN
DECODER
5
4
8.192 8 BIT
MEMORY
CELL ARRAY
COLUMN
DECODER
45
46
47
3
48
13
WER
CSR
OER
I/O1R
I/O2R
I/O3R
I/O4R
I/O5R
I/O6R
I/O7R
I/O8R
A12R
A11R
A10R
A9R
A8R
A7R
A6R
A5R
A4R
A3R
A2R
A1R
A0R
13
INTERRUPT
BUSYL
INTL
61
54
62
53
15
BUSYR
INTLR
BE
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