ELM ELM77 Cmos dual voltage detector Datasheet

ELM77xxxxxC CMOS Dual voltage detector
■General description
ELM77xxxxxC is CMOS dual voltage detector which consists of two comparator circuits watching Vdetn2
(Vdd level) and Vdetn1(Vdet input level) simultaneously and independently. This configuration enables output
to maintain the state of detection even when voltage of the Vdet input level drops to 0V.
■Features
■Application
• Detection voltage range
: Vdetn1 (Vdet) 0.8V to 5.0V (by0.1V)
• Reset for microcomputers
Vdetn2 (Vdd) 1.1V to 5.0V (by0.1V)
• Low current consumption
• High accuracy of
detection voltage
• Power voltage shortage detectors
: Typ.0.6μA(Vdd=3.0V)
: ±2.0%(Vdetn1,2>1.5V)
±30mV(Vdetn1,2≤1.5V)
• Switch of backup power source
• Battery checkers
• High input resistance
: Typ.10MΩ
• Low temperature coefficient : Typ.±100ppm/°C
• Output configuration
: N-ch open-drain
• Small package
: SOT-25
■Maximum absolute ratings
Parameter
Power supply voltage
Input voltage(for detection voltage)
Output voltage
Output current
Power dissipation
Operationg temperature
Storage temperature
Symbol
Vdd
Vdet
Vout1
Vout2
Iout1
Iout2
Pd
Top
Tstg
Limit
Vss-0.3 to 10.0
Vss-0.3 to 10.0
Unit
V
V
Vss-0.3 to 10.0
V
25
mA
250
-40 to +85
-55 to +125
mW
°C
°C
■Selection guide
ELM77xxxxxC-x
Symbol
a, b
Detection voltage2
c, d
Detection voltage1
e
f
Package
Product version
g
Taping direction
e.g.)
22: Vdetn2=2.2V, 24: Vdetn2=2.4V
27: Vdetn2=2.7V
e.g.)
09: Vdetn1=0.9V, 11: Vdetn1=1.1V
B: SOT-25
C
S: Refer to PKG file
N: Refer to PKG file
10 - 1
ELM77 x x x x x C - x
↑ ↑ ↑ ↑ ↑ ↑ ↑
a b c d e f g
ELM77xxxxxC CMOS Dual voltage detector
■Pin configuration
SOT-25(TOP VIEW)
Pin No.
1
2
3
4
5
Pin name
OUT1
VDD
VSS
VDET
OUT2
■Block diagram
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■Typical application
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10 - 2
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ELM77xxxxxC CMOS Dual voltage detector
■Operating timing chart
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detn�
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� detp�
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� hys�
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detn�
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� detp�
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* Output status is undefined when Vdd is lower than min. operating voltage.
■Electrical characteristics
ELM772211BC(Vdetn1=1.1V, Vdetn2=2.2V) Rpullup=100K, Vpullup=3V unless otherwise specified.Top=25°C
Parameter
Symbol
Condition
Min. Typ. Max. Unit Note
Operating voltage
Vdd
1.0
6.0
V
Detection voltage1
Vdetn1 Vdd=1.5V, Vdet=Voltage detected
1.070 1.100 1.130
V
1
Detection voltage2
Vdetn2 Vdd=Voltage detected
2.156 2.200 2.244
V
1
Vdetn1
Vdetn1
Vdetn1
Hysteresis width1
Vhys1
V
1
×0.04 ×0.08 ×0.12
Vdetn2 Vdetn2 Vdetn2 V
Hysteresis width2
Vhys2
1
×0.02 ×0.04 ×0.06
Current consumption
Idd Vdd=3.0V, Vdet=0V, OUT1,2:Open
0.6
2.0
μA
2
Output current1
Ioutn1 Vdd=1.0V, Vdet=0V, Vout1=0V
1
3
mA
3
Output current2
Ioutn2 Vdd=1.0V, Vout2=0.5V
1
3
mA
3
Open drain
Ileak1 Vdd=6.0V, Vdet=6.0V, Vout1=6.0V
0.001 0.400
μA
3
leakage current1
Open drain
Ileak2 Vdd=6.0V, Vdet=6.0V, Vout2=6.0V
0.001 0.400
μA
3
leakage current2
Input resistance
Rdet Vdet=5.0V, Vdd=0V
10
MΩ
4
Detect delay 1
tPHL1 Vdd=6.0V, Vdet=6.0V→0V
160
μs
5
Detect delay 2
tPHL2 Vdd=6.0V→1.0V
70
μs
6
Release delay 1
tPLH1 Vdd=6.0V, Vdet=0V→6.0V
120
μs
5
Release delay 2
tPLH2 Vdd=1.0V→6.0V
60
μs
6
ΔVdetn
Temperature
±100
Top=-40°C to +85°C
ppm/°C coefficient of Vdetn
ΔTop
Note : test circuit No.
10 - 3
ELM77xxxxxC CMOS Dual voltage detector
ELM772409BC(Vdetn1=0.9V, Vdetn2=2.4V) Rpullup=100K, Vpullup=3V unless otherwise specified.Top=25°C
Parameter
Symbol
Condition
Min. Typ. Max. Unit Note
Operating voltage
Vdd
1.0
6.0
V
Detection voltage1
Vdetn1 Vdd=1.5V, Vdet=Voltage detected
0.870 0.900 0.930
V
1
Detection voltage2
Vdetn2 Vdd=Voltage detected
2.352 2.400 2.448
V
1
Vdetn1 Vdetn1 Vdetn1 V
Hysteresis width1
Vhys1
1
×0.04 ×0.08 ×0.12
Vdetn2 Vdetn2 Vdetn2 V
Hysteresis width2
Vhys2
1
×0.02 ×0.04 ×0.06
Current consumption
Idd Vdd=3.0V, Vdet=0V, OUT1,2:Open
0.6
2.0
μA
2
Output current1
Ioutn1 Vdd=1.0V, Vdet=0V, Vout1=0V
1
3
mA
3
Output current2
Ioutn2 Vdd=1.0V, Vout2=0.5V
1
3
mA
3
Open drain
Ileak1 Vdd=6.0V, Vdet=6.0V, Vout1=6.0V
0.001 0.400
μA
3
leakage current1
Open drain
Ileak2 Vdd=6.0V, Vdet=6.0V, Vout2=6.0V
0.001 0.400
μA
3
leakage current2
Input resistance
Rdet Vdet=5.0V, Vdd=0V
10
MΩ
4
Detect delay 1
tPHL1 Vdd=6.0V, Vdet=6.0V→0V
160
μs
5
Detect delay 2
tPHL2 Vdd=6.0V→1.0V
70
μs
6
Release delay 1
tPLH1 Vdd=6.0V, Vdet=0V→6.0V
120
μs
5
Release delay 2
tPLH2 Vdd=1.0V→6.0V
60
μs
6
ΔVdetn
Temperature
±100
Top=-40°C to +85°C
ppm/°C coefficient of Vdetn
ΔTop
Note : test circuit No.
ELM772709BC(Vdetn1=0.9V, Vdetn2=2.7V) Rpullup=100K, Vpullup=3V unless otherwise specified.Top=25°C
Parameter
Symbol
Condition
Min. Typ. Max. Unit Note
Operating voltage
Vdd
1.0
6.0
V
Detection voltage1
Vdetn1 Vdd=1.5V, Vdet=Voltage detected
0.870 0.900 0.930
V
1
Detection voltage2
Vdetn2 Vdd=Voltage detected
2.645 2.700 2.754
V
1
Vdetn1
Vdetn1
Vdetn1
Hysteresis width1
Vhys1
V
1
×0.04 ×0.08 ×0.12
Vdetn2 Vdetn2 Vdetn2 V
Hysteresis width2
Vhys2
1
×0.02 ×0.04 ×0.06
Current consumption
Idd Vdd=3.0V, Vdet=0V, OUT1,2:Open
0.6
2.0
μA
2
Output current1
Ioutn1 Vdd=1.0V, Vdet=0V, Vout1=0V
1
3
mA
3
Output current2
Ioutn2 Vdd=1.0V, Vout2=0.5V
1
3
mA
3
Open drain
Ileak1 Vdd=6.0V, Vdet=6.0V, Vout1=6.0V
0.001 0.400
μA
3
leakage current1
Open drain
Ileak2 Vdd=6.0V, Vdet=6.0V, Vout2=6.0V
0.001 0.400
μA
3
leakage current2
Input resistance
Rdet Vdet=5.0V, Vdd=0V
10
MΩ
4
Detect delay 1
tPHL1 Vdd=6.0V, Vdet=6.0V→0V
160
μs
5
Detect delay 2
tPHL2 Vdd=6.0V→1.0V
70
μs
6
Release delay 1
tPLH1 Vdd=6.0V, Vdet=0V→6.0V
120
μs
5
Release delay 2
tPLH2 Vdd=1.0V→6.0V
60
μs
6
ΔVdetn
Temperature
±100
Top=-40°C to +85°C
ppm/°C coefficient of Vdetn
ΔTop
Note : test circuit No.
10 - 4
ELM77xxxxxC CMOS Dual voltage detector
■Test circuits
1) Detection voltage & hysteresis width
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2) Current consumption
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5) Delay time 1 & release time 1
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6) Delay time 2 & release time 2
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3) Output current & leakage current
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PG1 wave form
PG2 wave form
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10 - 5
ELM77xxxxxC CMOS Dual voltage detector
■Detection voltage accuracy refernce
Target (V)
Accuracy
Vdetn1 Vdetn2 (mV, %)
0.8
0.9
1.0
1.1
1.1
±30mV
1.2
1.2
1.3
1.3
1.4
1.4
1.5
1.5
1.6
1.6
1.7
1.7
1.8
1.8
1.9
1.9
2.0
2.0
2.1
2.1
2.2
2.2
±2%
2.3
2.3
2.4
2.4
2.5
2.5
2.6
2.6
2.7
2.7
2.8
2.8
2.9
2.9
Detection Voltage (V)
Min.
Max.
0.770
0.830
0.870
0.930
0.970
1.030
1.070
1.130
1.170
1.230
1.270
1.330
1.370
1.430
1.470
1.530
1.568
1.632
1.666
1.734
1.764
1.836
1.862
1.938
1.960
2.040
2.058
2.142
2.156
2.244
2.254
2.346
2.352
2.448
2.450
2.550
2.548
2.652
2.646
2.754
2.744
2.856
2.842
2.958
Target (V)
Accuracy
Vdetn1 Vdetn2 (mV, %)
3.0
3.0
3.1
3.1
3.2
3.2
3.3
3.3
3.4
3.4
3.5
3.5
3.6
3.6
3.7
3.7
3.8
3.8
3.9
3.9
4.0
4.0
±2%
4.1
4.1
4.2
4.2
4.3
4.3
4.4
4.4
4.5
4.5
4.6
4.6
4.7
4.7
4.8
4.8
4.9
4.9
5.0
5.0
■Marking
SOT-25
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a to d : Assembly lot No.
A to Z (I, O, X excepted) and 0 to 9
10 - 6
Detection Voltage (V)
Min.
Max.
2.940
3.060
3.038
3.162
3.136
3.264
3.234
3.366
3.332
3.468
3.430
3.570
3.528
3.672
3.626
3.774
3.724
3.876
3.822
3.978
3.920
4.080
4.018
4.182
4.116
4.284
4.214
4.386
4.312
4.488
4.410
4.590
4.508
4.692
4.606
4.794
4.704
4.896
4.802
4.998
4.900
5.100
ELM77xxxxxC CMOS Dual voltage detector
■Typical performance characteristics
• ELM772211BC
Vout1 vs
Vdet
�
Vout2 vs
Vdd
�
3.5
3.5
Cond.
Rpullup=100K
Vpullup=3V
Ta=25�
3
-30�
2.5
25�
2
Vout2 (V)
Vout1 (V)
2.5
80�
1.5
0.5
0.5
0.9
1
1.1
1.2
1.3
0
1.4
0
Vdet (V)
�
1.2
2.32
1.5
2
2.5
3
�
Vdetn2, Vdetp2
vs Ta
�
Vdetp2
2.28
1.14
Vdetn2, Vdetp2 (V)
Vdetn1, Vdetp1 (V)
1
2.3
Vdetp1
1.16
Vhys1
1.12
1.1
1.08
Vdetn1
1.06
1.04
2.26
2.24
Vhys2
2.22
2.2
Vdetn2
2.18
2.16
2.14
1.02
2.12
1
-40
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1
-20
0
20
40
60
��
2.1
80
Ambient Temperature (�)
-40
Idd vs �Vdd
Cond.
Vdet=0V
Vout1=Open
0.8� � � �
Vout2=Open
Ta=25�
0.7
0.9
Idd (�A)
0.5
Vdd (V)
Vdetn1, Vdetp1 vs Ta
1.18
-30�
1.5
1
0
25�
2
1
0.8
Cond.
Rpullup=100K
Vpullup=3V
Ta=25�
80�
3
80�
25�
0.6
-30�
0.5
0.4
0.3
0.2
0.1
0
0
1
2
3
4
5
6
Vdd (V)
10 - 7
-20
0
20
40
60
Ambient Temperature (�)
80
ELM77xxxxxC CMOS Dual voltage detector
• ELM772409BC
Vout1� vs Vdet
Vout2 vs
Vdd
�
3.5
3.5
Cond.
Rpullup=100K
Vpullup=3V
Ta=25�
3
-30�
2.5
25�
2
Vout2 (V)
Vout1 (V)
2.5
80�
1.5
2
25°C
1.5
-30°C
1
1
0.5
0.5
0
0
0.7
0.8
�
1
0.9
1.1
1
Vdet (V)
0
Vdetn1, Vdetp1
vs Ta
�
2.6
0.98
Vdetp1
Cdetn2, Vdetp2 (V)
0.94
Vhys1
0.92
0.9
Vdetn1
0.88
0.5
�
1
0.86
0.84
1.5
2
Vdd (V)
2.5
3
Vdetn2, Vdetp2
vs Ta
�
2.55
0.96
Vdetn1, Vdetp1 (V)
Cond.
Rpullup=100K
Vpullup=3V
Ta=25°C
80°C
3
Vdetp2
2.5
Vhys2
2.45
2.4
Vdetn2
2.35
0.82
2.3
0.8
-40
-20
0
20
40
60
-40
80
Idd vs Vdd
1
Cond.
Vdet=0V
Vout1=Open
Vout2=Open
Ta=25�
0.9
0.8
0.7
80�
25�
Idd (�A)
0.6
-30�
0.5
0.4
0.3
0.2
0.1
0
0
1
2
3
4
-20
0
20
40
60
Ambient Temperature (°C)
Ambient Temperature (�)
5
6
Vdd (V)
10 - 8
80
ELM77xxxxxC CMOS Dual voltage detector
• ELM77xxxxBC
tPHL1, tPLH1 vs Cload
1.E+03
tPHL2, tPLH2
� vs Cload
�
1.E+04
Cond.
Rpullup=100K
Vpullup=3V
Vdd=6V
�Vdet=6V�1V(fall)
�Vdet=1V�6V(rise)
Ta=25°C
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tPHL2, tPLH2 (�s)
tPHL1, tPLH1 (�s)
1.E+04
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1.E+02
1.E+01
1.E-04
1.E-03
1.E-02
1.E+03
Cond.
Rpullup=100K
Vpullup=3V
�Vdd=6V�1V (fall)
�Vdd=�V�6V (rise)
Ta=25°C
tPHL1
1.E+02
1.E+01
1.E-04
1.E-01
1.E-03
Cload (�F)
8
8
5
4
Vdd=1.0V
3
Cond.
Vdet=0V
Vdd=1.5V
9
Iout1, Iout2 (mA)
Iout1, Iout2 (mA)
Iout vs� Vout
Cond.
Vdet=0V
Ta=25°C
Vdd=1.2V
6
2
-30°C
7
25°C
6
5
80°C
4
3
2
1
1
0
0
0
1
2
3
4
Vout1, Vout2 (V)
0
5
tPHL1 vs Ta
160
Cond.
Rpullup=100K
Vpullup=3V
Vdd=6V
�Vdet=6V~0V (fall)
350
300
0.2
0.4
0.8
0.6
Vout1, Vout2 (V)
400
Cond.
Rpullup=100K
Vpullup=3V
�Vdd=6V�1V(fall)
120
250
tPHL2� vs Ta
�
140
100
200
tPHL2 (�s)
tPHL1 (�s)
1.E-01
10
Vdd=1.5V
7
1.E-02
Cload (�F)
Iout-Vout
�
�
tPLH1
tPHL1
150
80
60
100
40
50
20
0
-40
-20
0
20
40
60
Ambient Temperature (°C)
tPHL2
0
80
-40
-20
0
20
40
60
Ambient Temperature (°C)
10 - 9
80
ELM77xxxxxC CMOS Dual voltage detector
Cond.
Vdd=1.5V
Vdet=0V
Vout1=0.5V
Vout2=0.5V
7
6
Iout1, Iout2 (mA)
Iout1, Iout2
vs Ta
�
�
8
5
4
3
2
1
0
-40
-20
0
20
40
60
80
Ambient Temperature (°C)
• ELM77xx11BC
Idet vs Vdet
�
0.3
Idet vs Ta
0.5
Cond.
Ta=25°C
0.25
Vdet=4.5V
0.4
Idet (�A)
Idet (�A)
0.2
0.15
Rdet~10M�
0.3
Vdet=3V
0.2
0.1
Vdet=1.5V
0.1
0.05
0
0
0
0.5
1
1.5
2
2.5
3
-40
-20
0
20
40
60
Ambient Temperature (°C)
Vdet (V)
10 - 10
80
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