A22H165 High-performance class-G stereo headphone amplifier Datasheet - production data Thermal shutdown A22H165 - Flip-chip Flip-chip package: 1.65 mm x 1.65 mm, 400 µm pitch, 16 bumps Applications Cellular / smart phones Portable media player Wearable Pinout (top view) Fitness and healthcare TOP VIEW INR- VOUTR GAIN EN D INR+ CMS PVSS C2 C INL+ HPVDD C1 AGND B INL- VOUTL AVDD SW A 4 3 2 1 Description Balls are undemeath Features Power supply range: 2.3 V to 4.8 V 0.6 mA/channel quiescent current 2.1 mA current consumption with 100 µW/channel (10 dB crest factor) 0.006% typical THD+N at 1 kHz 100 dB typical PSRR at 217 Hz 100 dB of SNR A-weighted at G = 0 dB Zero "pop and click" Gain settings: 0 dB and 6 dB Integrated high efficiency step-down converter Low standby current: 5 µA max Output-coupling capacitors removed The A22H165 is a class-G stereo headphone driver dedicated to high-performance audio, high power efficiency and space-constrained applications. It is based on the core technology of a low power dissipation amplifier combined with a high efficiency step-down DC-DC converter for supplying this amplifier. When powered by a battery, the internal step down DC-DC converter generates the appropriate voltage to the amplifier depending on the amplitude of the audio signal to supply the headsets. It achieves a total 2.1 mA current consumption at 100 µW output power (10 dB crest factor). THD+N is 0.02 % maximum at 1 kHz and PSRR is 100 dB at 217 Hz, which ensures a high audio quality of the device in a wide range of environments. The traditionally bulky output coupling capacitors can be removed. A dedicated common-mode sense pin removes parasitic ground noise. The A22H165 is designed to be used with an output serial resistor. It ensures unconditional stability over a wide range of capacitive loads. The A22H165 is packaged in a tiny 16-bump flip-chip package with a pitch of 400 µm. Table 1. Device summary Order code Temperature range Package Packing Marking A22H165 -40°C to +85°C Flip-chip Tape & reel 21 March 2014 This is information on a product in full production. DocID026036 Rev 1 1/36 www.st.com Contents A22H165 Contents 1 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3 2 Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.1 Gain control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.2 Overview of the class-G, 2-level headphone amplifier . . . . . . . . . . . . . . . 22 4.3 External component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.4 4.3.1 Step-down inductor selection (L1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.3.2 Step-down output capacitor selection (Ct) . . . . . . . . . . . . . . . . . . . . . . . 24 4.3.3 Full capacitive inverter capacitors selection (C12 and CSS) . . . . . . . . . 25 4.3.4 Power supply decoupling capacitor selection (Cs) . . . . . . . . . . . . . . . . 25 4.3.5 Input coupling capacitor selection (Cin) . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.3.6 Low-pass output filter (Rout and Cout) and IEC 61000-4-2 ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.3.7 Integrated input low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.4.1 4.5 4.6 Layout recommendations for single-ended operation . . . . . . . . . . . . . . 28 Startup phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4.5.1 Auto zero technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4.5.2 Input impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4.6.1 Common-mode sense layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 2/36 DocID026036 Rev 1 A22H165 1 Absolute maximum ratings and operating conditions Absolute maximum ratings and operating conditions Table 2. Absolute maximum ratings Symbol Parameter Value Unit VCC Supply voltage (1) during 1 ms. 5.5 V Vin+,Vin- Input voltage referred to ground +/- 1.2 V Control input voltage EN, Gain -0.3 to VDD V -65 to +150 °C 150 °C 200 °C/W Tstg Tj Rthja Pd Storage temperature Maximum junction temperature(2) Thermal resistance junction to ambient (3) Power dissipation Internally limited(4) (HBM)(5) Human body model All pins VOUTR, VOUTL vs. AGND ESD 2 4 kV Machine model (MM), min. value(6) 100 V Charge device model (CDM) All pins VOUTR, VOUTL 500 750 V IEC61000-4-2 level 4, contact(7) IEC61000-4-2 level 4, air discharge(7) +/- 8 +/- 15 kV Lead temperature (soldering, 10 sec) 260 °C 1. All voltage values are measured with respect to the ground pin. 2. Thermal shutdown is activated when maximum junction temperature is reached. 3. The device is protected from over temperature by a thermal shutdown mechanism, active at 150° C. 4. Exceeding the power derating curves for long periods may provoke abnormal operation. 5. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kresistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating. 6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 ). This is done for all couples of connected pin combinations while the other pins are floating. 7. The measurement is performed on an evaluation board, with ESD protection EMIF02-AV01F3. DocID026036 Rev 1 3/36 36 Absolute maximum ratings and operating conditions A22H165 Table 3. Operating conditions Symbol VCC HPVDD 4/36 Parameter Supply voltage internal step-down DC output voltages High rail voltage Low rail voltage Value Unit 2.3 to 4.8 V 1.9 1.2 V V EN,GAIN Input voltage low level 0.6 V max EN,GAIN Input voltage high level 1.3 V min 16 Load capacitor Serial resistor of 12 minimumRL 16 0.8 to 100 nF Toper Operating free air temperature range -40 to +85 °C Rthja Flip-chip thermal resistance junction to ambient 90 °C/W RL Load resistor CL DocID026036 Rev 1 A22H165 Typical application schematic Figure 1. Typical application schematic for the A22H165 Vbat GAIN EN L1 3.3 uH Cs 2.2 uF AVdd Negative left input Cin 1 uF Ct 10 uF Level detector InL+ Negative right input + Cin 1 uF Cin 1 uF Cout 0.8 nF min. Rout VoutL 12 ohms min. 3 2 CMS InR+ J1 1 Level detector InR- Positive right input HpVdd InL- Positive left input Sw Positive supply Interface + 2 Typical application schematic Cin 1 uF Rout VoutR 12 ohms min. Cout 0.8 nF min. Negative supply PVss C1 Css 2.2 uF C2 AGnd C12 2.2 uF AM06119 Table 4. A22H165 pin description Pin n° Pin name Pin definition A1 SW A2 AVDD A3 VOUTL A4 INL- B1 AGND B2 C1 B3 HPVDD B4 INL+ C1 C2 C2 PVSS Negative supply generator output C3 CMS Common-mode sense, to be connected as close as possible to the ground of headphone/line out plug C4 INR+ Positive input signal for right audio channel D1 EN D2 GAIN D3 VOUTR D4 INR- Switching node of the buck converter Analog supply voltage, connect to battery Output signal for left audio channel Negative input signal for left audio channel Device ground Flying capacitor terminal for internal negative supply generator Buck converter output, power supply for amplifier Positive input signal for left audio channel Flying capacitor terminal for internal negative supply generator Amplifier enable Amplifier gain select Output signal for right audio channel Negative input signal for right audio channel DocID026036 Rev 1 5/36 36 Typical application schematic A22H165 Table 5. A22H165 component description Component(1) Value Description 2.2 µF Decoupling capacitors for VCC. A 2.2 µF capacitor is sufficient for proper decoupling of the A22H165. An X5R dielectric and 10 V rating voltage is recommended to minimize C/V when VCC = 4.8 V. Must be placed as close as possible to the A22H165 to minimize parasitic inductance and resistance. C12 2.2 µF Capacitor for internal negative power supply operation. An X5R dielectric and 6.3 V rating voltage is recommended to minimize C/V when HPVDD = 1.9 V. Must be placed as close as possible to the A22H165 to minimize parasitic inductance and resistance. CSS 2.2 µF Filtering capacitor for internal negative power supply. An X5R dielectric and 6.3 V rating voltage is recommended to minimize C/V when HPVDD = 1.9 V. Cin 1 Cin = -----------------------------------------2 Rin Fc Input coupling capacitor that forms with Rin Rindiff/2 a first-order high-pass filter with a -3 dB cut-off frequency Fc. Cout 0.8 to 100 nF Output capacitor of 0.8 nF minimum to 100 nF maximum. This capacitor is mandatory for operation of the A22H165. Rout 12 min. L1 3.3 µH Inductor for internal DC-DC step-down converter. References of inductors: refer to Section 4.3.1 for more information. Ct 10 µF Tank capacitor for internal DC-DC step-down converter. An X5R dielectric and 6.3 V rating voltage is recommended to minimize C/V when HPVDD = 1.9 V. Refer to Section 4.3.2 for more information. Cs Output resistor in-series with the A22H165 output. This 12 minimum resistor is mandatory for operation of the A22H165. 1. Refer to Section 4.3 for a complete description of each component. 6/36 DocID026036 Rev 1 A22H165 3 Electrical characteristics Electrical characteristics The values given in the following table are for the conditions VCC = +3.6 V, AGND = 0 V, GAIN = 0 dB, RL= 32 + 15 , Tamb = 25° C, unless otherwise specified. Table 6. Electrical characteristics of the amplifier Symbol ICC Is ISTBY Parameter Typ. Max. Unit 1.2 1.5 mA Supply current, with input modulation, both channels enabled, HPVDD = 1.2 V, output power per channel, F = 1 kHz Pout = 100 µW at 3 dB crest factor Pout = 500 µW at 3 dB crest factor Pout = 1 mW at 3 dB crest factor Pout = 100 µW at 10 dB crest factor Pout = 500 µW at 10 dB crest factor Pout = 1 mW at 10 dB crest factor 2.3 3.7 4.7 2.1 3.1 3.9 3.5 5 6.5 Standby current, no input signal, VEN = 0 V, VGAIN=0V 0.6 5 µA 1 Vrms +500 µV Quiescent supply current, no input signal, both channels enabled Vin Input differential voltage range(1) Voo Output offset voltage No input signal Vout Maximum output voltage, in-phase signals RL = 16 THD+N = 1% max, f = 1 kHz RL = 47 THD+N = 1% max, f = 1 kHz RL = 10 ks CL = 1 nFTHD+N = 1% max, f = 1 kHz -500 THD+N Total harmonic distortion + noise, G = 0 dB Vout = 700 mVrms,F = 1 kHz Vout = 700 mVrms, 20 Hz < F < 20 kHz PSRR Power supply rejection ratio(1), Vripple = 200 mVpp, grounded inputs F = 217 Hz, G = 0 dB, RL 16 F = 10 kHz, G = 0 dB, RL 16 CMRR Common mode rejection ratio F = 1 kHzG = 0 dB, Vic = 200 mVpp F = 20 Hz to 20 kHzG = 0 dB, Vic = 200 mVpp Crosstalk SNR ONoise Min. 0.6 1.0 1.0 0.006 0.05 90 60 Signal-to-noise ratio, A-weighted, Vout = 1 Vrms, THD+N < 1%, F = 1 kHz(1) G = +0 dB 100 DocID026036 Rev 1 Vrms 0.02 % dB 100 70 65 45 Channel separation RL = 32 + 15 G = 0 dB, F = 1 kHz, Po = 10 mW Output noise voltage, A-weighted (1) G = +0 dB 0.8 1.1 1.3 mA dB dB 100 dB 9 µVrms 7/36 36 Electrical characteristics A22H165 Table 6. Electrical characteristics of the amplifier (continued) Symbol Parameter Min. Typ. Max. Unit Closed loop voltage gain, GAIN=L 0 dB Closed loop voltage gain, GAIN=H 6 dB AV DAV Gain matching between left and right channels -0.5 Rindiff Differential input impedance at 6 dB 24 VIL Low level input voltage on EN, GAIN pins VIH High level input voltage on EN, GAIN pins Iin Input current on EN,GAIN 33.2 DocID026036 Rev 1 dB k 0.6 1.3 V V 10 1. Guaranteed by design and parameter correlation. 8/36 +0.5 µA A22H165 Electrical characteristics Figure 2. Current consumption vs. power supply voltage Figure 3. Standby current consumption vs. power supply voltage Figure 4. Maximum output power vs. power supply voltage, RL = 16 Figure 5. Maximum output power vs. power supply voltage, RL = 32 Figure 6. Maximum output power vs. power supply voltage, RL = 47 Figure 7. Current consumption vs. total output power, RL = 16 DocID026036 Rev 1 9/36 36 Electrical characteristics A22H165 Figure 8. Current consumption vs. total output power, RL = 32 Figure 9. Current consumption vs. total output power, RL = 47 Figure 10. Differential input impedance vs. gain Figure 11. THD+N vs. output power - RL = 16 in-phase, VCC = 2.5 V Figure 12. THD+N vs. output power - RL = 16 Figure 13. THD+N vs. output power - RL = 16 out-of-phase, VCC = 2.5 V in-phase, VCC = 3.6 V 10/36 DocID026036 Rev 1 A22H165 Electrical characteristics Figure 14. THD+N vs. output power - RL = 16 Figure 15. THD+N vs. output power - RL = 16 out-of-phase, VCC = 3.6 V in-phase, VCC = 4.8 V Figure 16. THD+N vs. output power - RL = 16 Figure 17. THD+N vs. output power - RL = 32 out-of-phase, VCC = 4.8 V in-phase, VCC = 2.5 V Figure 18. THD+N vs. output power - RL = 32 Figure 19. THD+N vs. output power - RL = 32 out-of-phase, VCC = 2.5 V in-phase, VCC = 3.6 V DocID026036 Rev 1 11/36 36 Electrical characteristics A22H165 Figure 20. THD+N vs. output power - RL = 32 Figure 21. THD+N vs. output power - RL = 32 out-of-phase, VCC = 3.6 V in-phase, VCC = 4.8 V Figure 22. THD+N vs. output power - RL = 32 , Figure 23. THD+N vs. output power - RL = 32 out-of-phase, VCC = 4.8 V +IPadin-phase, VCC = 2.5 V Figure 24. THD+N vs. output power - RL = 32 Figure 25. THD+N vs. output power - RL = 32 +IPadout-of-phase, VCC = 2.5 V +IPadin-phase, VCC = 3.6 V 12/36 DocID026036 Rev 1 A22H165 Electrical characteristics Figure 26. THD+N vs. output power - RL = 32 Figure 27. THD+N vs. output power - RL = 32 +IPadout-of-phase, VCC = 3.6 V +IPadin-phase, VCC = 4.8 V Figure 28. THD+N vs. output power - RL = 32 Figure 29. THD+N vs. output power - RL = 47 +IPadout-of-phase, VCC = 4.8 V in-phase, VCC = 2.5 V Figure 30. THD+N vs. output power - RL = 47 Figure 31. THD+N vs. output power - RL = 47 out-of-phase, VCC = 2.5 V in-phase, VCC = 3.6 V DocID026036 Rev 1 13/36 36 Electrical characteristics A22H165 Figure 32. THD+N vs. output power - RL = 47 Figure 33. THD+N vs. output power - RL = 47 out-of-phase, VCC = 3.6 V in-phase, VCC = 4.8 V Figure 34. THD+N vs. output power - RL = 47 , out-of-phase, VCC = 4.8 V Figure 35. THD+N vs. frequency, RL = 16 , inphase, VCC = 2.5 V Figure 36. THD+N vs. frequency, RL = 16 , out- Figure 37. THD+N vs. frequency, RL = 16 , inof-phase, VCC = 2.5 V phase, VCC = 3.6 V 14/36 DocID026036 Rev 1 A22H165 Electrical characteristics Figure 38. THD+N vs. frequency, RL = 16 , out- Figure 39. THD+N vs. frequency, RL = 16 , inof-phase, VCC = 3.6 V phase, VCC = 4.8 V DocID026036 Rev 1 15/36 36 Electrical characteristics A22H165 Figure 40. THD+N vs. frequency, RL = 16 , out- Figure 41. THD+N vs. frequency, RL = 32 , inof-phase, VCC = 4.8 V phase, VCC = 2.5 V Figure 42. THD+N vs. frequency, RL = 32 , out- Figure 43. THD+N vs. frequency, RL = 32 , inof-phase, VCC = 2.5 V phase, VCC = 3.6 V 16/36 DocID026036 Rev 1 A22H165 Electrical characteristics Figure 44. THD+N vs. frequency, RL = 32 , out- Figure 45. THD+N vs. frequency, RL = 32 , inof-phase, VCC = 3.6 V phase, VCC = 4.8 V Figure 46. THD+N vs. frequency, RL = 32 , out- Figure 47. THD+N vs. frequency, RL = 47 , inof-phase, VCC = 4.8 V phase, VCC = 2.5 V DocID026036 Rev 1 17/36 36 Electrical characteristics A22H165 Figure 48. THD+N vs. frequency, RL = 47 , out- Figure 49. THD+N vs. frequency, RL = 47 , inof-phase, VCC = 2.5 V phase, VCC = 3.6 V Figure 50. THD+N vs. frequency, RL = 47 , out- Figure 51. THD+N vs. frequency, RL = 47 , inof-phase, VCC = 3.6 V phase, VCC = 4.8 V 18/36 DocID026036 Rev 1 A22H165 Electrical characteristics Figure 52. THD+N vs. frequency, RL = 47 , outof-phase, VCC = 4.8 V Figure 53. PSRR vs. frequency - VCC = 3.6 V, gain = 0 dB Figure 54. PSRR vs. frequency - VCC = 3.6 V, gain = +6 dB Figure 55. Output signal spectrum (VCC = 3.6 V, load = 32 ) DocID026036 Rev 1 19/36 36 Electrical characteristics A22H165 Figure 56. Crosstalk vs. frequency - RL = 32 , VCC = 3.6 V, gain = 0 dB Figure 57. Crosstalk vs. frequency - RL = 32 , VCC = 3.6 V, gain = +6 dB Figure 58. Crosstalk vs. frequency - RL = 47 , VCC = 3.6 V, gain = 0 dB Figure 59. Crosstalk vs. frequency - RL = 47 , VCC = 3.6 V, gain = +6 dB 20/36 DocID026036 Rev 1 A22H165 Electrical characteristics Figure 60. CMRR vs. frequency, 32 , VCC = 36 V, 0 dB Figure 61. CMRR vs. frequency, 32 , VCC = 36 V, 6 dB Figure 62. Wake-up time Figure 63. Shutdown DocID026036 Rev 1 21/36 36 Application information A22H165 4 Application information 4.1 Gain control The A22H165 has two gain settings which are controlled via the GAIN pin: GAIN voltage 0.6 V 1.3 V Amplifier gain 0 dB 6 dB Note: See Table 6: Electrical characteristics of the amplifier for VIH and VIL levels. 4.2 Overview of the class-G, 2-level headphone amplifier The A22H165 uses what is referred to as class-G operating mode. This mode is a combination of the class AB biasing technique and an adaptive power supply. For this device, the power supply uses two levels: ±1.2 V and ±1.9 V. To create the ±1.2 V and ±1.9 V levels, the device uses an internal high-efficiency stepdown converter linked with a fully capacitive inverter from AVdd. Thanks to these internallygenerated symmetrical power supply voltages, the output of the amplifier can be biased at 0 V, thus eliminating the classical bulky DC blocking output capacitors (typically more than 100 F). Figure 64. A22H165 architecture Vbat Cs 2.2 uF L1 1.2 V to 1.9 V DC/DC control 3.3 uH Ct 10 uF HPVdd +Vout In+ Vout 0V In-Vout Full capacitive inverter C12 2.2 uF Css 2.2 uF Level detector PVss -1.2 V to -1.9 V AM06150 When an audio signal is playing with the A22H165, the class G feature adjusts in real time the internal power supply voltage in order to achieve the best efficiency possible. In addition, thanks to the fast transient response of the internal DC-DC converters, the switching between ±1.2 V and ±1.9 V can be achieved without audio clipping. Moreover, the out-ofaudio band DC-DC switching frequency keeps the audio quality at a high level (distortion, noise, etc…). 22/36 DocID026036 Rev 1 A22H165 Application information Figure 65. Efficiency comparison 100 Efficiency (%) Both channels enabled RL = 32 Ω, F = 1 KHz Vcc = 3.6 V, Ta = 25°C Crest Factor = 3dB Class G 10 1 0. 1 0. 1 Class AB 1 10 Total Output Power (mW) Most audio signals have a crest factor higher than 6 dB (10 dB on average), which means that most of the time the music level is low. In this case, the setting of the internal DC-DC converters is low (1.2 V) and in this way, helps to minimize the power dissipation. When the audio signal amplitude increases due to a peak or louder music, the setting of the internal DC-DC converters increases to 1.9 V, automatically increasing the output dynamic range. This 1.9 V value remains until the end of the decay time. Figure 66 shows a music sample played at high levels. Figure 66. Class-G operating with a music sample HPVDD High 1.9V HPVDD Low 1.2V Music Sample PVSS Low -1.2V PVSS High -1.9V Note: HPVDD/PVSS voltages are created internally by DC-DC converters. To avoid destruction of the A22H165 power amplifier, do not connect any external power supply on these pins. DocID026036 Rev 1 23/36 36 Application information 4.3 A22H165 External component selection The A22H165 requires few external passive components to operate correctly. Each component is described in the following sections. 4.3.1 Step-down inductor selection (L1) The A22H165 needs one inductor for the internal step-down DC-DC converter. This inductor must fit the following constraints: Typical value: 2.2 µH to 3.3 µH (3.3 µH is recommended) Maximum current in operating mode: 400 mA Minimum inductor value at maximum current: 1.5 µH Maximum inductor value at zero current: 4.3 µH DC resistance: from 50 m up to 450 m Table 7 shows the part number that should be used according to the inductor value. Table 7. Recommended inductor Manufacturer Murata Part number Value LQM21PN3R3NGRD 3.3 µH LQM2MPN3R3G0L 3.3 µH LQM2MPN2R2G0L 2.2 µH MIPSZ2012D3R3 3.3 µH MIPSZ2012D2R2 2.2 µH FDK 4.3.2 Step-down output capacitor selection (Ct) For the internal DC-DC step-down converter, the A22H165 needs one output capacitor. The three criteria for selecting the output capacitor are the range value of the capacitor including self tolerance, DC variation and the minimum ESR value, which is mandatory to avoid oscillation of the converter. Therefore the following constraints must be observed. Typical capacitor value: 10 µF at DC = 0 V Maximum capacitor value: 12 µF at DC = 0 V Minimum capacitor value: 4.8 µF at DC = 2 V Voltage range across this capacitor: from 1.1 V to 2 V Minimum DC ESR value: 5 m A ceramic capacitor in a 0603-type package is also recommended because of its close placement to the A22H165, which makes it easier to minimize parasitic inductance and resistance that have a negative impact on the audio performance. Table 8. Recommended capacitors Manufacturer Murata 24/36 Part number Value GRM188R60J106ME47 10 µF, 6.3 V, X5R GRM188R60J106ME84 10 µF, 6.3 V, X5R GRM188R61E106ME73 10 µF, 25 V, X5R DocID026036 Rev 1 A22H165 4.3.3 Application information Full capacitive inverter capacitors selection (C12 and CSS) Two capacitors (C12 and Css) are needed for this internal DC-DC inverter. The three criteria for selecting these capacitors are the range value of the capacitor including self tolerance, DC variation and the minimum ESR to minimize power losses. Typical capacitor value: 2.2 µF +/-20 % Voltage across these capacitors: from 1.1 V to 2 V Minimum capacitor value: 1 µF Again, a ceramic capacitor in a 0603 or 0402-type package is also recommended because of their close placement to the A22H165, which makes it easier to minimize parasitic inductance and resistance that have a negative impact on the audio performance. 4.3.4 Power supply decoupling capacitor selection (Cs) A 2.2 µF decoupling capacitor with low ESR is recommended for positive power supply decoupling. Packages such as the 0402 or 0603 are also recommended because of their close placement to the A22H165, which makes it easier to minimize parasitic inductance. It is advised to choose a X5R dielectric for capacitor tolerance, and a 10 V DC rating voltage for 4.8 V operations (or a 6.3 V DC rating voltage for 3.6 V operations), to take into consideration the C/V variation of this type of ceramic capacitor. An important parameter is the rated voltage of the capacitor. A 2.2 µF/6.3 V capacitor used at 4.8 V DC typically loses about 40 % of its value. In fact, with a 4.8 V power supply voltage, the decoupling value is about 1.3 µF instead of 2.2 µF. Because the decoupling capacitor influences the THD+N in the medium-to-high frequency region, this capacitor variation becomes decisive. In addition, less decoupling means higher overshoots, which can be problematic if they reach the power supply’s AMR value (5.5 V). This is why, for a 2.2 µF value, we recommend a 2.2 µF/10 V, a 4.7 µF/6.3 V or a ceramic capacitor with a low DC bias variation rated at 6.3 V. 4.3.5 Input coupling capacitor selection (Cin) Cin input coupling capacitors are mandatory for the A22H165’s operation. They block any DC component coming from the audio signal source. Cin with Rin form a first-order high-pass filter and the -3 dB cut-off frequency is: 1 FC – 3dB = -------------------------------------------2 Rin Cin Rin is the single-ended input impedance that can be approximated at about Rindiff/2. Rin also depends on the gain setting. Figure 10 provides the differential input impedance vs. gain. One can also see that Rindiff is minimum for the maximum gain setting (that is, 6 dB). Therefore, in most cases, Rin should be set to 6 dB to calculate the minimum input capacitor Cin. Example: In this case and for a -3 dB cut-off frequency of 20 Hz, Cin = 0.64 µF. The closest normalized value is 0.68 µF but a 1 µF capacitor is more suitable to take into consideration the capacitor tolerance +/-20 %. If the aim is to have the 20 Hz at -1 dB, the capacitor has to be multiplied by 1.96. As such, Cin = 0.64 x 1.96 = 1.25 µF. The closest normalized value would be 1.5 µF or 2.2 µF. DocID026036 Rev 1 25/36 36 Application information 4.3.6 A22H165 Low-pass output filter (Rout and Cout) and IEC 61000-4-2 ESD protection The A22H165 is designed to operate with a passive first-order low-pass filter (as shown in Figure 1). This low-pass filter is mandatory to ensure correct operation of the A22H165 over the volume range and output capacitance range vs. load. Rout must have a value of 12 minimum and Cout a value of 0.8 nF minimum up to 100 nF maximum. Values of 12 and 1 nF are a good starting point for a design to be able to drive a classic headphone (16 , 32 , 60 ) and the line-in of any hi-fi system or sound card. The cutoff frequency of this filter (12 and 1 nF) is approximately 13 MHz and clearly above the audio band. However, this output RC filter is also a part of the IEC 61000-4-2 ESD protection. In most cases, this RC filter is designed with transient absorbers and the final solution can be a discrete solution or an integrated solution. ST Microelectronics’ portfolio has many integrated solutions for ESD, but one dedicated to headphone amplifiers in particular: IPAD(a) reference EMIF02-AV01F3. To fit the IEC 61000-4-2 standard, this audio line IPAD can be added to the output of the A22H165 as shown in Figure 67. Figure 67. Typical application schematic with IEC 61000-4-2 ESD protection Vbat L1 Cs 2.2 µF 3.3 µH AVdd Negative left input Cin 1 µF Positive right input Negative right input HpVdd Ct 10 µF VoutL - Level detector + Cin 1 µF Cin 1 µF Sw InLInL+ Positive left input Positive Supply IPad A1 CMS Level detector + Cin 1 µF VoutR 3 2 J1 B2 Gnd 1 InR+ InR- A2 C1 C2 Negative supply PVss Css 2.2 µF C1 C2 AGnd C12 2.2 µF AM06151 By adding this ESD protection, the A22H165 complies with the IEC 61000-4-2 level 4 standard on jack pins. Our demonstration board has been tested using the same conditions a. Copyright STMicroelectronics. 26/36 DocID026036 Rev 1 A22H165 Application information as those outlined in the IEC 61000-4-2 standard. Results may differ depending on the layout of the PCB. 15 kV (air discharge) 8 kV (contact discharge) This IPAD has an internal series resistor Rout = 15 +/-20 % and an output capacitor Cout = 3.2 nF +/-25 %. 4.3.7 Integrated input low-pass filter The A22H165 has an integrated internal first-order low-pass filter with a -3 dB cutoff. This integrated filter is present on each input and filters any out-of-band audio noise coming from the audio source. 4.4 Single-ended input configuration The A22H165 can be used in a single-ended input configuration. InR- and InL- or InR+ and InL+ can be shorted to ground through input capacitors. All Cin capacitors must have the same value to keep the same PSRR performance as in a differential input configuration. Figure 68 and Figure 69 show how to connect the A22H165. Note the ground connection of each input. To avoid PSRR issues resulting from any ground noise, this connection must be done on the ground of the audio source and not on the ground of the A22H165 itself. Figure 68. Single-ended input configuration1 Vbat Cs 2.2 µF 3.3 µH AVdd Audio driver Cin 1 µF Level detector + Cin 1 µF Cin 1 µF Sw HpVdd Ct 10 µF - Right output Positive supply InLInL+ Left output L1 VoutL Cout 0.8 nF min. Rout 12 ohms min. 3 2 CMS InR+ J1 1 Level detector + InRCin 1 µF VoutR Rout 12 ohms min. - Cout 0.8 nF min. Negative supply Audio driver ground PVss C1 Css 2.2 µF C2 AGnd C12 2.2 µF AM06152 DocID026036 Rev 1 27/36 36 Application information A22H165 Figure 69. Single-ended input configuration 2 Vbat Cs 2.2 µF 3.3 µH AVdd Audio driver Left output Cin 1 µF - Level detector + Cin 1 µF Right output Positive supply Sw HpVdd Ct 10 µF InLInL+ Cin 1 µF L1 VoutL Cout 0.8 nF min. Rout 12 ohms min. 3 2 CMS InR+ J1 1 Level detector + InRCin 1 µF VoutR Rout 12 ohms min. - Cout 0.8 nF min. Negative supply Audio driver ground PVss C1 Css 2.2 µF C2 AGnd C12 2.2 µF AM06153 The gain range in these configurations remains unchanged and is given by: VoutLR = VinLR Gain With reference to Figure 69, note that the absolute phase in the audio band is 180°. 4.4.1 Layout recommendations for single-ended operation The connection location of each input that has to be set to ground is extremely important. 28/36 DocID026036 Rev 1 A22H165 Application information Incorrect connection location Figure 70. Incorrect ground connection for single-ended option Vbat L1 Cs 2.2 µF 3.3 µH AVdd Audio driver Cin 1 µF - Right output Cin 1 µF VaudioR Level detector + Cin 1 µF VaudioL Sw HpVdd Ct 10 µF InLInL+ Left output Positive supply VoutL Cout 0.8 nF min. Rout 12 ohms min. 3 2 CMS InR+ J1 1 Level detector + InRCin 1 µF VoutR Rout 12 ohms min. - Cout 0.8 nF min. Negative supply Vmc PVss Vgndnoise C1 Css 2.2 µF C2 AGnd C12 2.2 µF AM06154 If these inputs are connected to AGnd (the ground of the A22H165 class-G), the output voltage can be expressed by the following simplified equation from an AC point of view. Equation 1 Vout = Av x (Vaudio + Vmc + Vgndnoise) + Vbatnoise x PSRR As shown in Equation 1, any ground noise and any parasitic AC voltage on Vmc is directly multiplied by the gain of the amplifier. If Vmc can be totally controlled by the design of the audio source device (no parasitic AC voltage), it is not necessarily the case for Vgndnoise. This noise can be significantly reduced by an adequate low impedance ground plane, but not totally eliminated. In practice, only ten millivolts in the right frequency range are enough to produce an audible parasitic sound in the headphone with a volume level as low as -20 dB. DocID026036 Rev 1 29/36 36 Application information A22H165 Correct connection location As shown in Figure 71, the best option is to route the single-ended signal in parallel with the AC ground line of the other input. The AC grounded terminal must be routed in parallel to the audio signal and grounded with the ground of the audio source. Figure 71. Correct ground connection for single-ended option Vbat Cs 2.2 µF 3.3 µH AVdd Audio driver Cin 1 µF InL+ Right output Cin 1 µF VaudioR Level detector + Cin 1 µF VaudioL Positive supply Sw HpVdd Ct 10 µF InL- Left output L1 Cout 0.8 nF min. Rout VoutL 12 ohms min. 3 2 CMS InR+ J1 1 Level detector + InRCin 1 µF Rout VoutR 12 ohms min. - Cout 0.8 nF min. Negative supply Vmc PVss Vgndnoise C1 Css 2.2 µF C2 AGnd C12 2.2 µF AM06155 In this configuration, the AC output voltage is: Equation 2 Vout = Av x (Vaudio + Vmc) + Vgndnoise x CMRR + Vbatnoise x PSRR In Equation 2 the ground noise is attenuated by the performance of the CMRR. In practice, 50 dB of CMRR and ten millivolts for ground noise gives an output of approximately 30 µV, which is normally too low to be perceptible in the headphone. If Vmc is also totally controlled by the design of the audio source, Equation 2 becomes: Equation 3 Vout = Av x Vaudio + Vbatnoise x PSRR Like in differential mode, the main contributor for audio signal degradation is the AC noise voltage on Vbat. Thanks to the A22H165’s very high PSRR that can attenuate GSM burst noise, Equation 3 becomes: Equation 4 Vout = Av x Vaudio 30/36 DocID026036 Rev 1 A22H165 4.5 Application information Startup phase The A22H165 uses different techniques to reduce the DC current consumption and offer a pop-and-click performance close to none. 4.5.1 Auto zero technology During the startup phase, the differential output voltage is sensed and adjusted to 0 V (+/-500 V) to avoid any pop noise when the amplifier becomes operational. This also helps to minimize extra current consumption due to the load (Icc-extra = VoutDC / Rload). 4.5.2 Input impedance The A22H165 requires input coupling capacitors. The usual lowest frequency used for the headphone is close to 20 Hz. This frequency means a constant time for a first-order highpass filter of approximately 1 / (2 x Pi x 20) = 8 ms. To achieve 95 % of the capacitor’s charge, it is necessary to wait 3 x 8 ms = 24 ms, which is out of range for a device with a fast startup time. Because of the mismatching of all input capacitors and input resistors, if it is decided to start the A22H165 at a time of 8 ms, a voltage difference at the inputs (multiplied by the gain) can create a voltage step on the output and consequently a pop noise. To avoid this issue during the starting phase, the A22H165 accelerates the charging of the input capacitors by reducing the input impedance to 2 k. In such a case, for a 1 F capacitor the 95 % charge is reached in 6 ms. As the startup time of A22H165 is 12 ms, there remains sufficient time to fully charge the input capacitors and as such eliminate any pop noise. 4.6 Layout recommendations Particular attention must be given to the correct layout of the PCB traces and wires between the amplifier, load and power supply (in most cases, the battery of the cellular phone). The power and ground traces are critical since they must provide adequate energy and grounding for all circuits. Good practice is to use short and wide PCB traces to minimize voltage drops and parasitic inductance. A track with a width of at least 200 m for a copper thickness of 18 m is recommended for bringing energy to the amplifier from the battery. Proper grounding guidelines help improve audio performances, minimize crosstalk between channels, and prevent switching noise from coupling into the audio signal. It is also recommended to use a large-area and multi-via ground plane to minimize parasitic impedance. A multi-layer PCB board allows double or multiple ground planes to be implemented. Most of the time, the top and bottom layers are used as ground planes and provide shielding for tracks routed on the intermediate layers. In addition, to minimize parasitic impedance over the entire surface, a multi-via technique that connects the bottom and top layer ground planes together in many locations is often used. The copper traces that connect the output pins to the load and supply pins should be as wide as possible to minimize the trace resistances. DocID026036 Rev 1 31/36 36 Application information 4.6.1 A22H165 Common-mode sense layout The A22H165 implements a common-mode sense pin to correct any voltage differences that might occur between the return of the headphone jack and the AGND of the device that can create parasitic noise in the headphone and/or line out. The solution to strongly reduce and practically eliminate this noise consists in connecting the headphone jack ground to the CMS pin. This pin senses the difference of potential (voltage noise) between the A22H165 ground and the headphone ground. Thanks to the frequency response and the attenuation of the common-mode sense pin, this noise is removed from the A22H165 outputs. Figure 72. Common-mode sense layout example Common mode sense pin Output jack connector Ground plane 32/36 DocID026036 Rev 1 A22H165 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 73. A22H165 footprint recommendation 400 μm 75 µm min. 100 μm max. 400 μm 400 μm PCB pad size: Φ = 260 µm maximum Φ = 220 µm recommended Track 150 μm min. Not soldered mask opening 400 μm 5 Package information Solder mask opening: Φ = 300 μm min (for 260 µm diameter pad) Pad in Cu 18 μm with Flash NiAu (2-6 μm, 0.2 μm max.) Figure 74. Pinout TOP VIEW BOTTOM VIEW INR- VOUTR GAIN EN D D EN GAIN VOUTR INR- INR+ CMS PVSS C2 C C C2 PVSS CMS INR+ INL+ HPVDD C1 AGND B B AGND C1 HPVDD INL+ INL- VOUTL AVDD SW A A SW AVDD VOUTL INL- 4 3 2 1 1 2 3 4 DocID026036 Rev 1 33/36 36 Package information A22H165 Figure 75. Marking (top view) Logo: ST E Symbol for lead-free: E Part number: 21 X digit: Assembly code Date code: YWW The dot marks pin A1 21X YWW Figure 76. Flip-chip - 16 bumps 1650 μm 1650 μm Die size: 1.65 mm x 1.65 mm ± 30 µm Die height (including bumps): 600 µm ±55 µm Bump diameter: 250 µm ±40 µm 400 μm Bump height: 205 µm ±35 µm Die height: 395 µm ±20 µm Pitch: 400 µm ±40 µm Coplanarity: 50 µm max 600 μm 400 μm Figure 77. Device orientation in tape pocket 1.5 4 1 1 A Die size Y + 70 µm A 8 Die size X + 70 µm 4 All dimensions are in mm User direction of feed 34/36 DocID026036 Rev 1 A22H165 6 Revision history Revision history Table 9. Document revision history Date Revision 06-Mar-2014 1 Changes Initial release. DocID026036 Rev 1 35/36 36 A22H165 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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