AMMP-6125 10-24 GHz x2 Frequency Multiplier Data Sheet Description Features The AMMP-6125 is an easy-to-use surface mounted packaged integrated frequency multiplier (x2) that operates from 10 to 24 GHz output frequency. It has integrated amplification, matching, harmonic suppression, and bias networks. 15 dBc min. of harmonic rejection is delivered. The input/output are matched to 50 Ω and fully DC blocked. This MMIC is a cost effective alternative to hybrid (discrete-FET) amplifiers that require complex tuning and assembly process. • 5 x 5 mm surface mount package Functional Block Diagram • Microwave Radio Systems Vd1 1 IN 8 Vg 2 Vd2 3 OUT 4 X2 NC 7 NC 6 NC 5 • Wide frequency operation: 10-24 GHz (Output) • 50 Ω Input and Output Match • -40° C to +85° C operation • Output Power of +21.5 dBm Typical • Fo, 3xFo, 4Fo Rejection: 15 dBc min Applications • VSAT Pin Function 1 Vd1 • Satellite Up/Down Link 2 Vg • Test Equipment 3 Vd2 4 RF_OUT Package Diagram 5 NC 6 NC 7 NC 8 RF_IN 1 2 3 GND 8 7 6 4 5 TOP VIEW Attention: Observe Precautions for handling electrostatic sensitive devices. ESD Machine Model: 40V ESD Human Body Model: 150V Refer to Avago Application Note A004R: Electrostatic Discharge Damage and Control. ELECTRICAL SPECIFICATIONS Table 1. Absolute Maximum Ratings Parameter Specifications Description Min. Max. Unit Vd1 5 V Vd2 6 V 0 V CW Input Power 10 dBm MSL MSL2 Channel Temperature 150 °C 150 °C Drain Voltage Gate Voltage Vg -2.5 Storage Temperature -45 Comments Table 2. Recommended Operating Range Parameter Specifications Description Pin Drain Voltage Min. Typical Max. Unit Vd1 3.5 4.0 V Vd2 5.0 5.5 V -1.2 -1 V Gate Voltage Vg -1.4 Frequency range Input 5 12 GHz Output 10 24 GHz +4 dBm Input Power Quiescent Current -6 Idsq1 100 mA Vd1 = 3.5 V Idsq2 110 mA Vd2 = 5 V 26.4 °C/W Thermal Resistance, θch-b Case Temperature ESD 2 0 Comments -40 +85 Human Body Model 150 V Machine Model 40 V °C Table 3. RF Electrical Characteristics All data measured on a Rogers 4003 demo board at Vd1 = 3.5 V, Vd2 = 5 V, Vg = -1.2 V, TA = 25°C, Pin = 0 dBm and 50 Ω at all ports, unless otherwise specified. Performance Min. Typical Parameter Output Power Fundamental Suppression 3rd Harmonic Suppression 4th Harmonic Suppression Input Return Loss Output Return Loss Drain Current Freq = 10 GHz Freq = 17 GHz Freq = 24 GHz Freq = 5 GHz Freq = 8.5 GHz Freq = 12 GHz Freq = 15 GHz Freq = 25.5 GHz Freq = 36 GHz 20 Max. 22.8 22.1 21.5 21 25.9 29.5 18.3 27.2 25.2 15 -12 -10 115 145 -5 15 15 Id1 Id2 Gate Current (Ig) Unit Comments dBm dBc fin = 5, 8.5, 12 GHz dBc fin = 5, 8.5, 12 GHz dBc dB dB mA mA µA Pout = 21 dBm Note: 1. Output Power, Fundamental Suppression and 3rd Harmonic Suppression measurement accuracy is subjected to the tolerance of ± 0.5 dBm, ± 1 dBc & ± 1 dBc respectively. Product Consistency Distribution Charts at 5 GHz, 8.5 GHz and 12 GHz, Vd1 = 3.5 V, Vd2 = 5 V, Vg = -1.2 V (Sample size of 2,800 pieces) LSL 19 20 21 22 23 Pout @ 10 GHz, Mean = 22.8 dBm, LSL = 20 dBm LSL 24 25 24 25 LSL 19 20 21 22 23 Pout @ 24 GHz, Mean = 21.5 dBm, LSL = 20 dBm 3 19 20 21 22 23 Pout @ 17 GHz, Mean = 22.1 dBm, LSL = 20 dBm 24 25 Product Consistency Distribution Charts at 5 GHz, 8.5 GHz and 12 GHz, Vd1 = 3.5 V, Vd2 = 5 V, Vg = -1.2 V (Sample size of 2,800 pieces) (Continued) LSL 14 16 LSL 18 20 22 24 26 28 30 32 34 FS @ 5 GHz, Mean = 21 dBc, LSL = 15 dBc 14 16 18 20 22 24 26 28 30 32 34 14 24 26 28 30 32 34 16 18 20 22 24 26 28 30 32 34 30 32 34 LSL 18 20 22 24 26 28 Harmonics @ 25.5 GHz, Mean = 27.2 dBc, LSL = 15 dBc 4 22 Harmonics @ 15 GHz, Mean = 18.3 dBc, LSL = 15 dBc LSL 16 20 LSL FS @ 12 GHz, Mean = 29.5 dBc, LSL = 15 dBc 14 18 FS @ 8.5 GHz, Mean = 25.9 dBc, LSL = 15 dBc LSL 14 16 30 32 34 14 16 18 20 22 24 26 28 Harmonics @ 36 GHz, Mean = 25.2 dBc, LSL = 15 dBc Selected performance plots 30 25 20 20 Output Power [2H] (dBm) Output Power (dBm) All data measured on a Rogers 4003 demo board at Vd1 = 3.5 V, Vd2 = 5 V, Vg = -1.2 V, TA = 25° C, Pin = 0 dBm and 50 Ω at all ports, unless otherwise specified. 10 0 -10 1H 2H 3H 4H -20 -30 10 12 14 16 18 20 22 Output Frequency (GHz) 24 26 -5 20 20 Output Power [2H] (dBm) Output Power [2H] (dBm) 0 25 15 10 25° C -40° C 85° C 5 10 12 Pin = -6 dBm 14 16 18 20 22 Output Frequency (GHz) 24 26 0 28 Output Power [2H] (dBm) 15 10 12 Pin = +2 dBm 14 16 18 20 22 Output Frequency (GHz) 24 16 18 20 22 Output Frequency (GHz) 24 26 28 26 28 Figure 5. Output Power vs. Output Frequency @ Pin = +2 dBm over Temperature 10 12 Pin = 0 dBm 14 16 18 20 22 Output Frequency (GHz) 24 26 28 Figure 4. Output Power vs. Output Frequency @ Pin = 0 dBm over Temperature 20 10 14 25° C -40° C 85° C 5 20 0 12 10 25 25° C -40° C 85° C 10 15 25 5 Pin = -6 dBm Pin = -4 dBm Pin = -2 dBm Pin = 0 dBm Pin = +2 dBm Pin = +4 dBm Figure 2. Output Power [2H] vs Output Frequency Over Pin Figure 3. Output Power vs. Output Frequency @ Pin = -6 dBm over Temperature Output Power [2H] (dBm) 5 25 0 5 10 -10 28 Figure 1. Output Power vs. Output Frequency @ Pin = 0 dBm 15 15 10 25° C -40° C 85° C 5 0 10 12 Pin = +4 dBm 14 16 18 20 22 Output Frequency (GHz) 24 26 28 Figure 6. Output Power vs. Output Frequency @ Pin = +4 dBm over Temperature 300 0 Total Drain Current [Id] (mA) I/P & O/P Return Loss (dB) -5 -10 -15 -20 -25 -30 S11 S22 -35 -40 4 6 8 10 12 14 16 18 Frequency (GHz) 20 22 24 40 30 30 Suppression [3H] (dBc) Suppression [1H] (dBc) 220 20 10 Pin = -6 dBm Pin = 0 dBm Pin = +4 dBm 10 12 14 16 18 20 22 Output Frequency (GHz) 24 -6 -4 -2 0 Input Power [1H] (dBm) 2 4 20 10 0 26 Pin = -6 dBm Pin = 0 dBm Pin = +4 dBm 10 12 14 16 18 20 22 Output Frequency (GHz) 24 26 Figure 10. 3rd Harmonic [3H] Suppression vs Output Frequency at Variable Pin 40 Output Power [2H] (dBm) 25 30 20 10 0 Vg = -1.4 V, Vd2 = 5 V Vg = -1.2 V, Vd2 = 5 V Figure 8. Total Drain Current vs. Pin Figure 9. Fundamental [1H] Suppression vs Output Frequency at Variable Pin Suppression [4H] (dBc) 240 40 0 Pin = -6 dBm Pin = 0 dBm Pin = +4 dBm 10 12 14 16 18 20 22 Output Frequency (GHz) 24 26 Figure 11. 4th Harmonic [4H] Suppression vs Output Frequency at Variable Pin 6 260 200 26 Figure 7. Input and Output Return Loss at Pin = 0 dBm 280 20 15 10 10 GHz [2H] 14 GHz [2H] 18 GHz [2H] 22 GHz [2H] 26 GHz [2H] 5 0 -6 -5 -4 -3 -2 -1 0 1 Input Power [1H] (dBm) 2 Figure 12. Output Power [2H] vs Pin at variable Output Frequency 3 4 50 23 21 19 17 15 Fout = 10 GHz -6 -5 -4 Vg = -1.4 V, Vd2 = 5 V Vg = -1.2 V, Vd2 = 5 V -3 -2 -1 0 1 Input Power [1H] (dBm) 2 3 30 25 20 25 40 23 35 21 19 17 Fout = 14 GHz -6 -5 -4 2 3 4 Suppression [1H] (dBc) 19 -4 2 Figure 17. Output Power [2H] vs Input Power @ Fout = 18 GHz 4 Vg = -1.4 V, Vd2 = 5 V Vg = -1.2 V, Vd2 = 5 V -6 -5 -4 -3 -2 -1 0 1 Input Power [1H] (dBm) 2 3 4 3 30 25 20 15 Vg = -1.4 V, Vd2 = 5 V Vg = -1.2 V, Vd2 = 5 V -3 -2 -1 0 1 Input Power [1H] (dBm) 3 Figure 16. Fundamental Suppression [1H] vs Input Power @ Fout = 14 GHz 21 -5 2 Fout = 14 GHz 10 35 -6 -3 -2 -1 0 1 Input Power [1H] (dBm) 20 23 15 -4 25 40 Fout = 18 GHz -5 30 25 17 -6 15 Vg = -1.4 V, Vd2 = 5 V Vg = -1.2 V, Vd2 = 5 V -3 -2 -1 0 1 Input Power [1H] (dBm) Fout = 10 GHz Figure 14. Fundamental Suppression [1H] vs Input Power @ Fout = 10 GHz Suppression [1H] (dBc) Output Power [2H] (dBm) Output Power [2H] (dBm) 35 10 4 Figure 15. Output Power [2H] vs Input Power @ Fout = 14 GHz 7 40 15 Figure 13. Output Power [2H] vs Input Power @ Fout = 10 GHz 15 Vg = -1.4 V, Vd2 = 5 V Vg = -1.2 V, Vd2 = 5 V 45 Suppression [1H] (dBc) Output Power [2H] (dBm) 25 4 10 Fout = 18 GHz -6 -5 -4 Vg = -1.4 V, Vd2 = 5 V Vg = -1.2 V, Vd2 = 5 V -3 -2 -1 0 1 Input Power [1H] (dBm) 2 3 4 Figure 18. Fundamental Suppression [1H] vs Input Power @ Fout = 18 GHz 35 23 30 Suppression [1H] (dBc) Output Power [2H] (dBm) 25 21 19 17 15 -6 -5 -4 -3 -2 -1 0 1 Input Power [1H] (dBm) 2 3 Vg = -1.4 V, Vd2 = 5 V Vg = -1.2 V, Vd2 = 5 V Fout = 22 GHz -6 -5 -4 -3 -2 -1 0 1 Input Power [1H] (dBm) 2 3 4 Figure 20. Fundamental Suppression [1H] vs Input Power @ Fout = 22 GHz 20 20 18 Suppression [1H] (dBc) Output Power [2H] (dBm) 15 5 4 Figure 19. Output Power [2H] vs Input Power @ Fout = 22 GHz 16 14 12 10 20 10 Vg = -1.4 V, Vd2 = 5 V Vg = -1.2 V, Vd2 = 5 V Fout = 22 GHz 25 -5 -4 10 5 Vg = -1.4 V, Vd2 = 5 V Vg = -1.2 V, Vd2 = 5 V Fout = 26 GHz -6 15 -3 -2 -1 0 1 Input Power [1H] (dBm) 2 3 Figure 21. Output Power [2H] vs Input Power @ Fout = 26 GHz 0 4 Vg = -1.4 V, Vd2 = 5 V Vg = -1.2 V, Vd2 = 5 V Fout = 26 GHz -6 -5 -4 -3 -2 -1 0 1 Input Power [1H] (dBm) 2 3 4 Figure 22. Fundamental Suppression [1H] vs Input Power @ Fout = 26 GHz Evaluation Board Description and Application Circuit for AMMP-6125 GND 1 2 3 GND Vd1 Vg 4.7 µF 0.1 µF 4.7 µF 0.1 µF Vd1 1 IN AMMP 6125 YWWDNN OUT RFin IN 8 Vd2 Vg 2 0.1 µF Vd2 3 OUT 4 X2 NC 7 NC 6 RFout NC 5 Table 4. Pin Description Pin # Function Biasing Comment GND 1 2 3 GND GND Vd1 Vg Vd2 GND 3.5 V -1.2 V 5.0 V 100 mA (measure current) 5 mA (measure current) 110 mA (measure current) 8 Recommended quiescent DC bias condition for optimum power and linearity performance is Vd1 = 3.5 V, Vd2 = 5 V and Vg = -1.2 V. The gate voltage, Vg, biases the doubling circuit only; it does not adjust the amplifier bias current. Minor improvements in the AMMP-6125’s output power and fundamental suppression can be obtained by adjusting Vg from -1.0 V to -1.5 V. Package, Tape & Reel, and Ordering Information Please refer to Avago Technologies Application Note 5521, AMxP-xxxx production Assembly Process (Land Pattern B). Part Number Ordering Information Part Number Devices per Container Container AMMP-6125-BLKG 10 antistatic bag AMMP-6125-TR1G 100 7” Reel AMMP-6125-TR2G 500 7” Reel For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved. AV02-3208EN - July 9, 2013