ON NB3L03 2.8 v, high precision 1:3 clock fanout buffer Datasheet

NB3L03
2.8 V, High Precision 1:3
Clock Fanout Buffer
Description
The NB3L03 is a low−skew, low jitter 1:3 clock fanout buffer, ideal
for use in portable end−equipment, such as mobile phones or tablet
applications. The MCLK_IN pin has an integrated AC coupling
capacitor and will directly accept a square or sine wave clock input,
such as a temperature compensated crystal oscillator (TCXO). The
minimum acceptable input amplitude of the sine wave is 800 mV
peak−to−peak. The NB3L03 is offered in a 0.4 mm pitch 6−ball,
wafer−level chip−scale package (WLCSP) (0.77 mm x 1.17 mm).
Features
•
•
•
•
•
•
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WLCSP6
FC SUFFIX
CASE 567HJ
MARKING DIAGRAM
800 mV Single Ended Outputs
Low Additive Phase Jitter
Ultra Small Package: 0.4 mm Pitch WLCSP6 (0.77 mm x 1.17 mm)
Exceeds JEDEC ESD Standards: 4000 V HBM, 200 V MM
Industrial Temperature Range: −40°C to +85°C
These are Pb−Free Devices
L3MG
L3
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
PINOUT DIAGRAM
PIN DESCRIPTIONS
Ball No.
Name
I/O
Description
A1
VDD
I
Power Supply Voltage
A2
CLK_OUT1
O
Clock Output 1
B1
MCLK_IN
I
Master Clock Input
B2
CLK_OUT3
O
Clock Output 3
C1
GND
−
Ground
C2
CLK_OUT2
O
Clock Output 2
Figure 1. Simplified Block Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
© Semiconductor Components Industries, LLC, 2014
February, 2014 − Rev. 1
1
Publication Order Number:
NB3L03/D
NB3L03
Table 1. MAXIMUM RATINGS
Symbol
Parameter
Voltage Range (Note 1)
Condition
Min
Max
Unit
MCLK_IN,CLK_OUT1,
CLK_OUT2, CLK_OUT3
-0.3
VDD + 0.3
V
IO
Continuous Output Current
±20
mA
TJ
Operating Junction Temperature Range
CLK_OUT1/2/3
−40
150
°C
Tstg
Storage Temperature Range
−55
150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. All voltage values are with respect to network ground terminal.
Table 2. ATTRIBUTES
Characteristic
Value
ESD Protection
Human Body Model
Moisture Sensitivity
>4 kV
Machine Model
>200 V
WLCSP6
Level 1
Maximum Soldering Temperature for Lead−free Devices Using a Lead−free Solder Paste
260
Flammability Rating Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Transistor Count
149
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test II
Table 3. ELECTRICAL CHARACTERISTICS (TA = −40°C to +85°C)
Symbol
Min
Typ
Max
Unit
VDD
Supply Voltage
2.3
2.8
3.465
V
VIN
Input Voltage p-p
800
VDD
mV
Output Voltage p-p
0.8
1.0
1.2
V
5.0
6.5
mA
VOUT
IDDdynamic
Characteristic
Dynamic Current at 26 MHz (Notes 2 and 3)
FIN
MCLK_IN Frequency Range with 800 mV input p−p
10
26
52
MHz
tPD
MCLK_IN to CLK_OUT_n Propagation Delay, input = 1 Vp−p @ 26 MHz
2.0
4.0
6.5
ns
DC
CLK_OUT_n Duty Cycle
45
50
55
%
tjit
Additive Phase Jitter @ 12 kHz to 20 MHz,
FIN = 26 MHz @ 800 mV input p−p, input tr/tf < 1 ns
tr/tf
Output Rise Time 20%-80% with 10 pF Load,
VIN = 800 mVp−p, 26 MHz, input slew rate < 1 ns/V
tsk
Channel to Channel Skew
Voh
High Level Output (Voh−Vol not to exceed VOUT)
Vol
Low Level Output (Voh−Vol not to exceed VOUT)
171
0.5
0.8
0.8
1.4
ns
10
30
ps
1.0
1.2
V
0
2. IDD dynamic specified with no load on outputs.
3. Input amplitude 1.2 V p−p.
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2
fs
V
NB3L03
Figure 2. Typical Phase Jitter @ 26 MHz, INT Range (12 kHz to 20 MHz)
ORDERING INFORMATION
Device
NB3L03FCT2G
Package
Shipping†
WLCSP6
(Pb−Free)
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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3
NB3L03
PACKAGE DIMENSIONS
A B
D
È
PIN A1
REFERENCE
2X
0.10 C
2X
0.10 C
WLCSP6, 1.17x0.77
CASE 567HJ
ISSUE O
E
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
DIM
A
A1
b
D
E
e
TOP VIEW
0.10 C
MILLIMETERS
MIN
MAX
0.50
−−−
0.13
0.17
0.21
0.25
0.77 BSC
1.17 BSC
0.40 BSC
A
6X
0.05 C
A1
SIDE VIEW
NOTE 3
b
0.05 C A B
PACKAGE
OUTLINE
0.40
PITCH
e/2
6X
0.03 C
C
RECOMMENDED
SOLDERING FOOTPRINT*
SEATING
PLANE
e
C
B
A1
e
A
1
0.40
PITCH
2
BOTTOM VIEW
6X
0.23
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
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For additional information, please contact your local
Sales Representative
NB3L03/D
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