TI CSD23202W10 Csd23202w10 12-v p-channel nexfet power mosfet Datasheet

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CSD23202W10
SLPS506 – AUGUST 2014
CSD23202W10 12-V P-Channel NexFET™ Power MOSFET
1 Features
•
•
•
•
•
•
•
1
Product Summary
Ultra-Low Qg and Qgd
Small Footprint 1 mm × 1 mm
Low Profile 0.62-mm Height
Pb Free
Gate ESD Protection – 3 kV
RoHS Compliant
Halogen Free
TA = 25°C
•
•
•
–12
V
Qg
Gate Charge Total (–4.5 V)
2.9
nC
Qgd
Gate Charge Gate-to-Drain
Drain-to-Source OnResistance
VGS(th)
Battery Management
Load Switch
Battery Protection
VGS = –1.8 V
67
mΩ
VGS = –2.5 V
54
mΩ
VGS = –4.5 V
44
mΩ
Threshold Voltage
–0.60
V
Device
Qty
Media
Package
Ship
CSD23202W10
3000
7-Inch Reel
CSD23202W10T
250
7-Inch Reel
1 × 1-mm Wafer
Level Package
Tape and
Reel
Absolute Maximum Ratings
Top View
VALUE
UNIT
VDS
Drain-to-Source Voltage
–12
V
VGS
Gate-to-Source Voltage
–6
V
ID
Continuous Drain Current(1)
–2.2
A
IDM
Pulsed Drain Current(2)
–25
A
Continuous Gate Clamp Current
–0.5
A
IG
D
S
Pulsed Gate Clamp Current
–7
A
PD
Power Dissipation(1)
1
W
TJ,
Tstg
Operating Junction and
Storage Temperature Range
–55 to 150
°C
(1) Device operating at a temperature of 105°C
(2) Typ RθJA = 195°C/W, Pulse width ≤100 μs, duty cycle ≤1%
P0097-01
.
.
.
.
RDS(on) vs VGS
Gate Charge
150
4.5
TC = 25°C, I D = − 0.5 A
TC = 125°C, I D = −0.5 A
135
− VGS - Gate-to-Source Voltage (V)
RDS(on) - On-State Resistance (mΩ)
mΩ
TA = 25°C
.
120
105
90
75
60
45
30
15
0
nC
82
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
This 12 V, 44 mΩ device is designed to deliver the
lowest on-resistance and gate charge in a small
1 mm × 1 mm outline with excellent thermal
characteristics in an ultra-low profile.
G
0.28
VGS = –1.5 V
Ordering Information(1)
3 Description
D
UNIT
Drain-to-Source Voltage
RDS(on)
2 Applications
TYPICAL VALUE
VDS
0
1
2
3
4
5
− VGS - Gate-to- Source Voltage (V)
6
G001
4
3.5
3
2.5
2
1.5
1
ID = −0.5A
VDS = −6V
0.5
0
0
0.5
1
1.5
2
Qg - Gate Charge (nC)
2.5
3
G001
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
CSD23202W10
SLPS506 – AUGUST 2014
www.ti.com
Table of Contents
1
2
3
4
5
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Specifications.........................................................
1
1
1
2
3
6
Device and Documentation Support.................... 7
6.1 Trademarks ............................................................... 7
6.2 Electrostatic Discharge Caution ................................ 7
6.3 Glossary .................................................................... 7
7
5.1 Electrical Characteristics........................................... 3
5.2 Thermal Information .................................................. 3
5.3 Typical MOSFET Characteristics.............................. 4
Mechanical, Packaging, and Orderable
Information ............................................................. 8
7.1 CSD23202W10 Package Dimensions ...................... 8
7.2 Land Pattern Recommendation ................................ 9
7.3 Tape and Reel Information ....................................... 9
4 Revision History
2
DATE
REVISION
NOTES
August 2014
*
Initial release.
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5 Specifications
5.1 Electrical Characteristics
(TA = 25°C unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
STATIC CHARACTERISTICS
BVDSS
Drain-to-Source Voltage
VGS = 0 V, ID = –250 μA
–12
BVGSS
Gate-to-Source Voltage;
VDS = 0 V, IG = –250 μA
–6
IDSS
Drain-to-Source Leakage Current
VGS = 0 V, VDS = –9.6 V
IGSS
Gate-to-Source Leakage Current
VDS = 0 V, VGS = –6 V
VGS(th)
Gate-to-Source Threshold Voltage
VDS = VGS, ID = –250 μA
RDS(on)
gƒs
Drain-to-Source On-Resistance
Transconductance
–0.4
V
–7.2
V
–1
μA
–100
nA
–0.6
–0.9
V
VGS = –1.5 V, ID = –0.5 A
82
123
mΩ
VGS = –1.8 V, ID = –0.5 A
67
92
mΩ
VGS = –2.5 V, ID = –0.5 A
54
66
mΩ
VGS = –4.5 V, ID = –0.5 A
44
53
mΩ
VDS = –1.2 V, ID = –0.5 A
5.6
S
DYNAMIC CHARACTERISTICS
CISS
Input Capacitance
COSS
Output Capacitance
CRSS
Reverse Transfer Capacitance
29
37
pF
Qg
Gate Charge Total (–4.5 V)
2.9
3.8
nC
Qgd
Gate Charge Gate-to-Drain
Qgs
Gate Charge Gate-to-Source
Qg(th)
Gate Charge at Vth
QOSS
Output Charge
td(on)
Turn On Delay Time
tr
Rise Time
td(off)
Turn Off Delay Time
tƒ
Fall Time
VGS = 0 V, VDS = –6.0 V, ƒ = 1 MHz
VDS = –6 V, ID = –0.5 A
VDS = –6 V, VGS = 0 V
VDS = –6 V, VGS = –4.5 V,
ID = –0.5 A RG = 0 Ω
394
512
pF
238
310
pF
0.28
nC
0.55
nC
0.29
nC
2.0
nC
9
ns
4
ns
58
ns
21
ns
DIODE CHARACTERISTICS
VSD
Diode Forward Voltage
Qrr
Reverse Recovery Charge
trr
Reverse Recovery Time
IS = –0.5 A, VGS = 0 V
–0.66
VDS= –6 V, IF = –0.5 A, di/dt = 100 A/μs
–1
V
3.7
nC
12
ns
5.2 Thermal Information
(TA = 25°C unless otherwise stated)
THERMAL METRIC
RθJA
(1)
(2)
MIN
TYP
Junction-to-Ambient Thermal Resistance (1)
195
Junction-to-Ambient Thermal Resistance (2)
65
MAX
UNIT
°C/W
Device mounted on FR4 material with minimum Cu mounting area.
Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
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SLPS506 – AUGUST 2014
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P-Chan 1.0x1.0 CSP TTA MAX Rev1
P-Chan 1.0x1.0 CSP TTA MIN Rev1
Typical RθJA =
195°C/W when
mounted on minimum
pad area of 2 oz. Cu.
Typical RθJA = 65°C/W
when mounted on
1 inch2 of 2 oz. Cu.
M0149-01
M0150-01
5.3 Typical MOSFET Characteristics
(TA = 25°C unless otherwise stated)
Figure 1. Transient Thermal Impedance
4
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Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
10
− IDS - Drain-to-Source Current (A)
− IDS - Drain-to-Source Current (A)
10
9
8
7
6
5
4
3
VGS = −4.5 V
VGS = −2.5 V
VGS = −1.8 V
VGS = −1.5 V
2
1
0
0
0.1
0.2 0.3 0.4 0.5 0.6 0.7 0.8
− VDS - Drain-to-Source Voltage (V)
0.9
8
6
4
0
1
TC = 125°C
TC = 25°C
TC = −55°C
2
0
0.2
G001
0.4 0.6 0.8
1
1.2 1.4 1.6
− VGS - Gate-to-Source Voltage (V)
1.8
2
G001
VDS = –5 V
Figure 3. Transfer Characteristics
500
4
450
3.5
400
C − Capacitance (pF)
− VGS - Gate-to-Source Voltage (V)
Figure 2. Saturation Characteristics
4.5
3
2.5
2
1.5
1
350
300
250
200
100
0.5
0
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
150
50
0
0.5
1
1.5
2
Qg - Gate Charge (nC)
ID = –0.5 A
2.5
0
3
0
2
G001
12
G001
VDS = –6 V
Figure 4. Gate Charge
Figure 5. Capacitance
1.1
150
RDS(on) - On-State Resistance (mΩ)
− VGS(th) - Threshold Voltage (V)
4
6
8
10
− VDS - Drain-to-Source Voltage (V)
1
0.9
0.8
0.7
0.6
0.5
0.4
−75 −50 −25
0
25
50
75 100 125 150 175
TC - Case Temperature (ºC)
G001
TC = 25°C, I D = − 0.5 A
TC = 125°C, I D = −0.5 A
135
120
105
90
75
60
45
30
15
0
0
1
2
3
4
5
− VGS - Gate-to- Source Voltage (V)
6
G001
ID = –250 µA
Figure 6. Threshold Voltage vs Temperature
Figure 7. On-State Drain-to-Source Resistance vs
Gate-to-Source Voltage
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SLPS506 – AUGUST 2014
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Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
1.3
1.2
10
VGS = −1.5 V
VGS = −1.8 V
VGS = −2.5 V
VGS = −4.5 V
− ISD − Source-to-Drain Current (A)
Normalized On-State Resistance
1.4
1.1
1
0.9
0.8
0.7
−75 −50 −25
0
25
50
75 100 125 150 175
TC - Case Temperature (ºC)
G001
TC = 25°C
TC = 125°C
1
0.1
0.01
0.001
0.0001
0
0.2
0.4
0.6
0.8
− VSD − Source-to-Drain Voltage (V)
1
G001
ID = –0.5 A
Figure 8. Normalized On-State Resistance vs Temperature
Figure 9. Typical Diode Forward Voltage
2.5
IDS - Drain- to- Source Current (A)
− IDS - Drain-to-Source Current (A)
100
10
1
100us
1ms
0.1
0.1
10ms
100ms
1
10
− VDS - Drain-to-Source Voltage (V)
100
2.0
1.5
1.0
0.5
0.0
−50 −25
G001
0
25
50
75 100 125 150 175 200
TC - Case Temperature (ºC)
G001
Single Pulse, Max RθJA = 195°C/W
Figure 10. Maximum Safe Operating Area
6
Figure 11. Maximum Drain Current vs Temperature
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SLPS506 – AUGUST 2014
6 Device and Documentation Support
6.1 Trademarks
NexFET is a trademark of Texas Instruments.
6.2 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
6.3 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
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CSD23202W10
SLPS506 – AUGUST 2014
www.ti.com
7 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
7.1 CSD23202W10 Package Dimensions
Pin 1
Mark
1
Solder Ball
Ø 0.31 ±0.075
2
2
1
A
1.00
0.50
+0.00
–0.10
A
B
B
1.00
+0.00
–0.10
0.50
Side View
Bottom View
0.04
0.62 Max
0.38
Top View
0.62 Max
Seating Plate
Front View
M0151-01
NOTE: All dimensions are in mm (unless otherwise specified).
Pin Configuration Table
8
POSITION
DESIGNATION
B1
Source
A1
Gate
A2, B2
Drain
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7.2 Land Pattern Recommendation
Ø 0.25
1
2
0.50
A
B
0.50
M0152-01
NOTE: All dimensions are in mm (unless otherwise specified).
7.3 Tape and Reel Information
4.00 ±0.10
Ø 1.50 ±0.10
4.00 ±0.10
Ø 0.50 ±0.05
0.78 ±0.05
1.18 ±0.05
5° Max
3.50 ±0.05
8.00
+0.30
–0.10
1.75 ±0.10
2.00 ±0.05
0.254 ±0.02
1.18 ±0.05
5° Max
M0153-01
NOTE: All dimensions are in mm (unless otherwise specified).
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9
PACKAGE OPTION ADDENDUM
www.ti.com
22-Aug-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
CSD23202W10
ACTIVE
DSBGA
YZB
4
3000
Green (RoHS
& no Sb/Br)
Call TI
Level-1-260C-UNLIM
202
CSD23202W10T
ACTIVE
DSBGA
YZB
4
250
Green (RoHS
& no Sb/Br)
Call TI
Level-1-260C-UNLIM
202
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
22-Aug-2014
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Jul-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
CSD23202W10
DSBGA
YZB
4
3000
180.0
9.0
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
1.16
1.16
0.63
4.0
8.0
Q1
CSD23202W10
DSBGA
YZB
4
3000
179.0
14.4
1.09
1.09
0.76
4.0
8.0
Q1
CSD23202W10T
DSBGA
YZB
4
250
179.0
14.4
1.09
1.09
0.76
4.0
8.0
Q1
CSD23202W10T
DSBGA
YZB
4
250
180.0
9.0
1.16
1.16
0.63
4.0
8.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Jul-2015
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
CSD23202W10
DSBGA
YZB
4
3000
195.0
210.0
39.0
CSD23202W10
DSBGA
YZB
4
3000
199.0
211.0
35.0
CSD23202W10T
DSBGA
YZB
4
250
199.0
211.0
35.0
CSD23202W10T
DSBGA
YZB
4
250
195.0
210.0
39.0
Pack Materials-Page 2
D: Max = 0.994 mm, Min =0.934 mm
E: Max = 0.99 mm, Min = 0.93 mm
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