Copal DP7123 32-tap digital potentiometer Datasheet

DP7110, DP7118,
DP7119, DP7123,
DP7124, DP7125
32-Tap Digital Potentiometers
with 2-Wire Interface
Description
DP7110/18/19/23/24/25 lineaUïtaper digital potentiometers
perform the same function as a mechanical potentiometer
or a variable resistor. These devices consist of a fixed
resistor and a wiper contact with 32ïtap points that are digitally
controlled through a 2ïwire up/down serial interface.
The DP7110 and DP7125 are configured as potentiometers. The
DP7118/19/23/24 are configured as variable resistors.
Three resistance values are available: 10 k , 50 k and 100 k . All
devices are available in spaceïsaving 5ïpin and 6ïpin SOTï23
packages. The DP7110/18/19 are also available in the SCï70
package.
Features
v
v
v
v
v
v
v
v
v
0.3 A Ultraïlow Standby Current
Singleïsupply Operation: 2.7 V to 5.5 V
Glitchless Switching between Resistor Taps
Powerïon Reset to Midscale
2ïwire Up/Down Serial Interface
Resistance Values: 10 k , 50 k and 100 k
Low Wiper Resistance: 80 for DP7123, DP7124, DP7125
DP7110, DP7118, DP7119 Available in S&ï70
These Devices are PbïFree, Halogen Free/BFR Free and are RoHS
Compliant
SCï70
SOTï23
PIN CONNECTIONS
SOTï23
SCï70
VDD 1
6 H
VDD 1
6 H
GND 2
5 W GND 2
5 W
4 CS U/D 3 DP7110
4 CS
DP7110
U/D 3 DP7125
SOTï23
SCï70
5 H
VDD 1
GND 2
VDD 1
5 H
GND 2
DP7118
U/D 3 DP7123
4 CS U/D 3 DP7118
4 CS
Applications
v
v
v
v
v
LCD Screen Adjustment
Volume Control
Mechanical Potentiometer Replacement
Gain Adjustment
Line Impedance Matching
SOTï23
SCï70
VDD 1
6 H
VDD 1
6 H
GND 2
5 L
GND 2
5 L
DP7119
U/D 3 DP7124
4 CS U/D 3 DP7119
4 CS
(Top Views)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
¢ NIDEC COPAL ELECTRONICS CORP.
February, 2011 ï Rev. 11
1
Publication Order Number:
DP7110/D
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
H
VDD
U/D
32ïPOSITION
DECODER
CS
UPïDOWN
COUNTER
GND
W
L
Figure 1. Functional Diagram
Table 1. PIN DESCRIPTIONS
Pin Number
DP7110/
DP7125
DP7118/
DP7123
DP7119/
DP7124
Pin
Name
Description
1
1
1
VDD
Power Supply
2
2
2
GND
Ground
3
3
3
U/D
Up/Down Control Input. With CS low, a lowïtoïhigh transition increments
or decrements the wiper position.
4
4
4
CS
Chip Select Input. A highïtoïlow CS transition determines the mode:
increment if U/D is high, or decrement if U/D is low.
ï
ï
5
L
Low Terminal of Resistor
5
ï
ï
W
Wiper Terminal of Resistor
6
6
6
H
High Terminal of Resistor
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameters
Ratings
Units
ï0.3 to +6
V
ï0.3 to (VDD + 0.3)
V
Input and Output LatchïUp Immunity
(200
mA
Maximum Continuous Current into H, L and W
100 k
50 k
10 k
(0.6
(1.3
(1.3
Continuous Power Dissipation (TA = +70$C)
5ïpin SCï70 (Note 1)
6ïpin SCï70 (Note 1)
247
245
VDD to GND
All Other Pins to GND
mA
mW
Operating Temperature Range
Junction Temperature
Storage Temperature Range
Soldering Temperature (soldering, 10 sec)
ï40 to +85
$C
+150
$C
ï65 to +150
$C
+300
$C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Derate 3.1 mW/$C above TA = +70$C
2
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
Table 3. ELECTRICAL CHARACTERISTICS
(VDD = 2.7 V to 5.5 V, VH = VDD, VL = 0, TA = ï40$C to +85$C. Typical values are at VDD = 2.7 V, TA = 25$C, unless otherwise noted.)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
DC PERFORMANCE
Resolution
32
EndïtoïEnd Resistance (ï00)
80
100
120
EndïtoïEnd Resistance (ï50)
40
50
60
EndïtoïEnd Resistance (ï10)
8
10
12
EndïtoïEnd Resistance Tempco
TCR
Taps
DP7110/18/19
200
DP7123/24/25
30
Ratiometric Resistance Tempco
ppm/$C
300
5
Integral Nonlinearity
INL
Differential Nonlinearity
DNL
(0.5
ppm/$C
(1
LSB
(1
LSB
(0.1
FullïScale Error
ZeroïScale Error
LSB
1
Wiper Resistance
RW
k
DP7110/18/19
200
600
DP7123/24/25
80
200
LSB
DIGITAL INPUTS
Input High Voltage
VIH
Input Low Voltage
VIL
0.7 x VDD
V
0.3 x VDD
V
TIMING CHARACTERISTICS (Figures 7, 8)
U/D Mode to CS Setup
tCU
25
ns
CS to U/D Step Setup
tCI
50
ns
CS to U/D Step Hold
tIC
25
ns
U/D Step Low Period
tIL
25
ns
U/D Step High Period
tIH
25
ns
Up/Down Toggle Rate (Note 2)
fTOGGLE
Output Settling Time (Note 3)
tSETTLE
1
MHz
100 k variable resistor
configuration, CL = 10 pF
1
s
100 k potentiometer
configuration, CL = 10 pF
0.25
POWER SUPPLY
Supply Voltage
VDD
Active Supply Current (Note 4)
IDD
Standby Supply Current (Note 5)
ISB
2.
3.
4.
5.
2.7
VDD = +5 V
Up/Down Toggle Rate: fTOGGLE = 1 / tSETTLE
Typical settling times are dependent on endïtoïend resistance.
Supply current measureed while changing wiper tap, fTOGGLE = 1 MHz.
Supply current measureed while wiper position is fixed.
3
0.3
5.5
V
25
A
1
A
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
TYPICAL OPERATING CHARACTERISTICS
(TA = 25oC, unless otherwise noted.)
1.5
140
ENDïTOïEND RESISTANCE
CHANGE (%)
160
DP7110/7118/7119
RW ( )
120
100
80
60
DP7123/7124/7125
40
20
VDD = 2.7 V
0
0
5
10
15
20
25
0.5
DP7123/7124/7125
0
ï0.5
DP7110/7118/7119
ï1.0
ï1.5
ï50
30
0
50
100
WIPER POSITION
TEMPERATURE (oC)
Figure 2. Wiper Resistance vs. Wiper Position
Figure 3. Change in EndïtoïEnd Resistance
vs. Temperature
120
0.45
0.40
100
VDD = 5.5 V
0.35
100 k
CURRENT ( A)
RESISTANCE (k )
1.0
80
60
50 k
40
0.30
VDD = 2.7 V
0.25
0.20
0.15
0.10
20
10 k
0.05
0
1 3
5
7
0
ï50
9 11 13 15 17 19 21 23 25 27 29 31
0
50
100
TAP POSITION
TEMPERATURE (oC)
Figure 4. WïtoïL Resistance vs. Tap Position
Figure 5. Supply Current vs. Temperature
U/D
2 V/div
WIPER
OUTPUT
100 mV/div
200 ns/div
Figure 6. TapïtoïTap Switching Transient
4
150
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
Functional Description
The DP7110/7118/7119/7123/7124/7125 consist of a
fixed resistor and a wiper contact with 32ïtap points that are
digitally controlled through a 2ïwire up/down serial
interface. Three endïtoïend resistance values are available:
10 k , 50 k and 100 k .
The DP7110/7125 is designed to operate as a
potentiometer. In this configuration, the low terminal of the
resistor array is connected to ground (pin 2).
The DP7118/7123 performs as a variable resistor. In this
device, the wiper terminal and high terminal of the resistor
array are connected at pin 5. The DP7119/7124 is a similar
variable resistor, except the low terminal is connected to
pin 5.
The CS and U/D inputs control the position of the wiper
along the resistor array. When CS transitions from high to
low, the part will go into increment mode if U/D input is
high, and into decrement mode when U/D input is low. Once
the mode is set, the device will remain in that mode until CS
goes high again. A lowïtoïhigh transition at the U/D pin
will increment or decrement the wiper position depending
on the current mode (Figures 7 and 8).
When the CS input transitions to high (serial interface
inactive), the value of the counter is stored and the wiper
position is maintained.
Note that when the wiper reaches the maximum (or
minimum) tap position, the wiper will not wrap around to the
minimum (or maximum) position.
Digital Interface Operation
PowerïOn Reset
The devices have two modes of operation when the
serial interface is active: increment and decrement mode.
The serial interface is only active when CS is low.
All parts in this family feature powerïon reset (POR)
circuitry that sets the wiper position to midscale at
powerïup. By default, the chip is in the increment mode.
CS
tCU
tIC
tIL
U/D
tIH
tCI
tSETTLE
tSETTLE
W
Note: “W” is not a digital signal. It represents wiper transitions.
Figure 7. Serial Interface Timing Diagram, Increment Mode
CS
tIC
tCU
tIH
U/D
tIL
W
tCI
tSETTLE
tSETTLE
Note: “W” is not a digital signal. It represents wiper transitions.
Figure 8. Serial Interface Timing Diagram, Decrement Mode
5
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
Applications Information
The devices are intended for circuits requiring digitally
controlled adjustable resistance, such as LCD contrast
control, where voltage biasing adjusts the display contrast.
Adjustable Gain
Figures 11 and 12 show how to use either a variable
resistor or a potentiometer to digitally adjust the gain of a
noninverting op amp configuration, by connecting the
device in series with a resistor to ground. The devices
have a low 5 ppm/oC ratiometric tempco that allows for a
very stable adjustable gain configuration over temperature.
Alternative Positive LCD Bias Control
An op amp can be used to provide buffering and gain on
the output of the DP7110/DP7125. This can be done by
connecting the wiper output to the positive input of a
noninverting op amp as shown in Figure 9. Figure 10 shows
a similar circuit for the DP7119/DP7124.
+5 V
+5 V
H
H
30 V
30 V
W
DP7110/DP7125
VOUT
VOUT
L
L
DP7119/DP7124
Figure 9. Positive LCD Bias Control
Figure 10. Positive LCD Bias Control
VCC
VCC
VIN
VIN
VOUT
VOUT
H
L
DP7118/DP7123
W
H
DP7110/DP7125
L
Figure 11. Adjustable Gain Circuit
Figure 12. Adjustable Gain Circuit
6
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
PACKAGE DIMENSIONS
SCï70, 6 Lead, 1.25x2
SYMBOL
MIN
A
0.80
NOM
MAX
D
e
e
E1 E
A1
0.00
0.10
A2
0.80
1.00
b
0.15
0.30
c
0.10
0.18
D
1.80
2.00
2.20
E
1.80
2.10
2.40
E1
1.15
1.25
1.35
e
L
0.65 BSC
0.26
0.36
0.46
0.42 REF
L1
L2
TOP VIEW
1.10
0.15 BSC
Q
0º
8º
Q1
4º
10º
1
A2 A
1
b
L
L1
A1
SIDE VIEW
c
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-203.
7
L2
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
PACKAGE DIMENSIONS
SOTï23, 6 Lead
D
e
E1
E
SYMBOL
MIN
A
0.90
A1
0.00
A2
0.90
b
0.30
c
0.08
NOM
1.45
0.15
1.15
0.22
2.90 BSC
E
2.80 BSC
E1
1.60 BSC
e
0.95 BSC
0.30
0.45
L1
PIN #1 IDENTIFICATION
0.60
0.60 REF
L2
TOP VIEW
1.30
0.50
D
L
MAX
0.25 REF
Q
0°
4°
8°
Q1
5°
10°
15°
Q2
5°
10°
15°
e1
A2
A
Q
b
Q2
L1
A1
SIDE VIEW
L2
L
END VIEW
Notes:
(1) All dimensions in millimeters. Angles in degrees.
(2) Complies with JEDEC standard MO-178.
8
c
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
PACKAGE DIMENSIONS
SCï70, 5 Lead, 1.25x2
D
e
e
E1 E
SYMBOL
MIN
A
0.80
MAX
1.10
A1
0.00
0.10
A2
0.80
1.00
b
0.15
0.30
c
0.10
0.18
D
1.80
2.00
2.20
E
1.80
2.10
2.40
E1
1.15
1.25
1.35
e
0.65 BSC
0.26
L
TOP VIEW
NOM
0.36
L1
0.42 REF
L2
0.15 BSC
0.46
Q
0º
8º
Q1
4º
10º
1
A2 A
1
b
L
L1
A1
SIDE VIEW
c
END VIEW
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-203.
9
L2
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
PACKAGE DIMENSIONS
SOTï23, 5 Lead
D
E1
SYMBOL
MIN
NOM
MAX
A
0.90
1.45
A1
0.00
0.15
A2
0.90
b
0.30
0.50
c
0.08
0.22
E
1.15
D
2.90 BSC
E
2.80 BSC
E1
1.60 BSC
e
0.95 BSC
e
L
0.30
0.45
L1
PIN #1 IDENTIFICATION
1.30
0.60
0.60 REF
L2
0.25 REF
Q
0°
4°
8°
Q1
5°
10°
15°
Q2
5°
10°
15°
TOP VIEW
Q1
A2
A
Q
b
Q2
L1
A1
SIDE VIEW
L2
L
END VIEW
Notes:
(1) All dimensions in millimeters. Angles in degrees.
(2) Complies with JEDEC standard MO-178.
10
c
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
Table 4. ORDERING INFORMATION
Device
DP7110
DP7118
DP7119
DP7123
(Note 7)
DP7124
(Note 7)
DP7125
(Note 7)
Orderable Part Number
Resistor [k ]
Pin Package
Parts Per Reel
DP7110SDIï10-GT3
10
SC70ï6
3,000
DP7110TBIï10ïT3 (Note 6)
10
SOT23ï6
3,000
DP7110TBIï10-GT3
10
SOT23ï6
3,000
DP7110SDIï50-GT3
50
SC70ï6
3,000
DP7110TBIï50ïT3 (Note 6)
50
SOT23ï6
3,000
DP7110TBIï50-GT3
50
SOT23ï6
3,000
DP7110SDIï00-GT3
100
SC70ï6
3,000
DP7110TBIï00ïT3 (Note 6)
100
SOT23ï6
3,000
DP7110TBIï00-GT3
100
SOT23ï6
3,000
DP7118SDIï10-GT3
10
SC70ï5
3,000
DP7118TBIï10ïT3 (Note 6)
10
SOT23ï5
3,000
DP7118TBIï10-GT3
10
SOT23ï5
3,000
DP7118SDIï50-GT3
50
SC70ï5
3,000
DP7118TBIï50ïT3 (Note 6)
50
SOT23ï5
3,000
DP7118TBIï50-GT3
50
SOT23ï5
3,000
DP7118SDIï00-GT3
100
SC70ï5
3,000
DP7118TBIï00ïT3 (Note 6)
100
SOT23ï5
3,000
DP7118TBIï00-GT3
100
SOT23ï5
3,000
DP7119SDIï10-GT3
10
SC70ï6
3,000
DP7119TBIï10ïT3 (Note 6)
10
SOT23ï6
3,000
DP7119TBIï10-GT3
10
SOT23ï6
3,000
DP7119SDIï50-GT3
50
SC70ï6
3,000
DP7119TBIï50ïT3 (Note 6)
50
SOT23ï6
3,000
DP7119TBIï50-GT3
50
SOT23ï6
3,000
DP7119SDIï00-GT3
100
SC70ï6
3,000
DP7119TBIï00ïT3 (Note 6)
100
SOT23ï6
3,000
DP7119TBIï00-GT3
100
SOT23ï6
3,000
DP7123TBIï10ïT3 (Note 6)
10
SOT23ï5
3,000
DP7123TBIï10-GT3
10
SOT23ï5
3,000
DP7123TBIï50ïT3 (Note 6)
50
SOT23ï5
3,000
DP7123TBIï50-GT3 (Note 6)
50
SOT23ï5
3,000
DP7123TBIï00ïT3 (Note 6)
100
SOT23ï5
3,000
DP7123TBIï00-GT3 (Note 6)
100
SOT23ï5
3,000
DP7124TBIï10ïT3 (Note 6)
10
SOT23ï6
3,000
DP7124TBIï10-GT3 (Note 6)
10
SOT23ï6
3,000
DP7124TBIï50ïT3 (Note 6)
50
SOT23ï6
3,000
DP7124TBIï50-GT3
50
SOT23ï6
3,000
DP7124TBIï00ïT3 (Note 6)
100
SOT23ï6
3,000
DP7124TBIï00-GT3 (Note 6)
100
SOT23ï6
3,000
DP7125TBIï10ïT3 (Note 6)
10
SOT23ï6
3,000
DP7125TBIï10-GT3
10
SOT23ï6
3,000
DP7125TBIï50ïT3 (Note 6)
50
SOT23ï6
3,000
DP7125TBIï50-GT3 (Note 6)
50
SOT23ï6
3,000
DP7125TBIï00ïT3 (Note 6)
100
SOT23ï6
3,000
DP7125TBIï00-GT3 (Note 6)
100
SOT23ï6
3,000
6. Contact factory for availability.
7. For DP7123, DP7124, DP7125 now being developed, please contact factory.
11
DP7110, DP7118, DP7119, DP7123, DP7124, DP7125
Example of Ordering Information (Note 10)
Prefix
Device #
Suffix
DP
7110
SD
Company ID
(Optional)
Product Number
7110
7118
7119
7123
7124
7125
Package
SD: SCï70
TB: SOTï23
ï10
G
Resistance
ï10: 10 k
ï50: 50 k
ï00: 100 k
Lead Finish
Blank: MatteïTin
G: NiPdAu
I
T3
Tape & Reel
T: Tape & Reel
3: 3,000 / Reel
Temperature Range
I = Industrial (ï40oC to 85oC)
8. All packages are RoHSïcompliant (Leadïfree, Halogenïfree).
9. The standard finish is NiPdAu.
10. The device used in the above example is a DP7110SDIï10-GT3 (SCï70, Industrial Temperature, 10 k , NiPdAu, Tape & Reel, 3,000/Reel).
11. For additional package and temperature options, please contact your nearest COPAL ELECTRONICS Sales office.
NIDEC COPAL reserves the right to make changes without further notice to any products herein.
NIDEC COPAL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does NIDEC COPAL assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in NIDEC COPAL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time.
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NIDEC COPAL does not convey any license under its patent rights nor the rights of others.
NIDEC COPAL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to
support or sustain life, or for any other application in which the failure of the NIDEC COPAL product could create a situation where personal injury or death may occur.
Should Buyer purchase or use NIDEC COPAL products for any such unintended or unauthorized application, Buyer shall indemnify and hold NIDEC COPAL and its officers,
employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that NIDEC COPAL was negligent regarding the design or
manufacture of the part.
DP7110/D
12
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