Rohm BD9361GUL 6ch internal power mosfet system switching regulator 1ch ldo Datasheet

BD9361GUL
Datasheet
Power LSI series for Digital Camera and Digital Video Camera
6ch Internal Power MOSFET
System Switching Regulator + 1ch LDO
BD9361GUL
●Function block diagram
●Outline
6-Channel Switching Regulator Controller for Digital Camera
that contains an internal FET, and 1-Channel LDO.
It is optimal power supply composition for Digital Camera or
Digital Video Camera which carries CMOS sensor.
It contributes to mounting area reduction, because CH1~CH4
have built-in feedback resister and WL-CSP of compact
package is adopted.
FET
Step UP
DC/DC1
Motor
5.0V (typ.)
FET
FET
FET
Buck-boost
DC/DC2
System/Analog
3.3V (typ.)
FET
●Features
FET
1)
2.5V minimum input operating, and Supplies power for the
internal circuit by step-up converter(CH1).
2) CH1 step-up converter, CH2 cross converter, CH3,4
step-down converter CH5 step-down converter
controllable output voltage by external resister.CH6 boost
converter for LED,
3) All channels contain internal Power MOSFET and
compensation.
4) Operating frequency of 2.0 MHz (CH3,4,5) and 1.0MHz
(CH1,2,6).
5) Includes Over Voltage Protection (OVP) for CH1, 2, 6.
6) Includes LDO controllable output voltage by serial
communication.
7) Contains sequence control circuit for CH1~3. It is
possible to select sequence CH1⇒CH3⇒CH4⇒CH2 and
CH1⇒CH4⇒CH3⇒CH2 by SEQ_CTL pin CH1, 2, 3, 4.
CH5, 6, and LDO are possible to turn ON/OFF by serial
communication.
8) Built-In discharge switch (CH2,3,4) and contains off
sequence control circuit for CH1~4 with inverted start-up
sequence.
9) Included cut off output voltage circuit during over current
(timer latch type).
10) Include back-gate control for CH1 with soft start function
Step Down
DC/DC3
FET
Step Down
DC/DC4
FET
Step Down
DC/DC5
FET
LDO
FET
Step UP
DC/DC6
(Constant
Current control)
FET
Core
1.1V (typ.)
FET
Memory
1.8V/1.5V(typ.)
FET
CMOS sensor/etc.
1.8V (typ.)
FET
CMOS sensor/etc.
2.8V (typ.)
Load
switch
LED Back light
I2C
Interface
Fig1. Function block diagram
●package
WLCSP package(3.14mm×3.14mm 0.5mm pitch)
●Use
For Digital Camera, Digital Video Camera
●PIN Assignments (TOP VIEW)
●Key Specifications
・Input voltage accuracy :
・Output voltage
CH1 output voltage:
CH2 output voltage:
CH3 output voltage:
CH4 output voltage (VOSEL4=H):
CH4 output voltage (VOSEL4=L):
CH5 reference voltage:
CH6 reference voltage:
LDO output voltage:
・Load current
CH1 load current:
CH2 load current:
CH3 load current:
CH4 load current:
CH5 load current:
CH6 load current:
LDO load current:
・Frequency(CH3,4,5):
・Frequency (CH1,2,6):
2.5V~5.5V
5.0V±1.5%(typ.)
3.3V±1.5% (typ.)
1.1V±1.5% (typ.)
1.8V±1.5% (typ.)
1.5V±1.5% (typ.)
0.8V±1.25% (typ.)
0.4V±5.0% (typ.)
2.8V±1.5% (typ.)
1.0A (max)
800mA (max)
1.5A (max)
800mA (max)
500mA (max)
50mA (max)
200mA (max)
2.0MHz(typ.)
1.0MHz(typ.)
Fig2. PIN Assignments
○Products:Silicon monolithic IC ○This product is not designed for normal operation with in a radioactive
Status of this document
The Japanese version of this document is the official specification. Please use the translation version of this document as a reference to expedite understanding of the official version.
If these are any uncertainty in translation version of this document, official version takes priority.
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© 2011 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
1
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Block Diagram
●Pin description
GND(E4)
VCCOUT(E5)
Vo1
(D5)
1MHz
+
2 line
Serial I/F
Back
gate
control
CH1 Step up
Current mode
control
-
DAC
ERROR AMP
Vo2
(D4)
CH2 Cross
Converter
control
-
+
ERROR AMP
-
+
+
ERROR AMP
DAC
2 line
Serial I/F
+
ERROR AMP
+
PGND3 (A1)
HX4 (D1)
LX4 (E1)
ERROR AMP
A5
LX5 (F2)
PGND45 (F1)
VINREG (F4)
LDO
REGOUT (F5)
ERROR AMP
1MHz
DAC
A4
HX5 (F3)
SCP COMP
LX6 (B1)
CH6 Step up
Current mode
control
-
+
E6,A2,E1,F2,B1
D5,D4,D3,E2
2MHz
CH5
Step down
Current mode
control
-
DAC
2 line
Serial I/F
LX3 (A2)
SCP COMP
-
+
A3,D1,F3
B6
-
VREF
HX3 (A3)
2MHz
CH4
Step down
Current mode
control
-
+
D6
SCP COMP
-
+
LX21(B6)
LX22 (A5)
2MHz
CH3
Step down
Current mode
control
-
Vo4
(E2)
HX2BAT (C6)
VOUT2 (A4)
-
+
C5
PGND2 (A6)
SCP COMP
Vo3
(D3)
DAC
2 line
Serial I/F
E5
E4
F6,A6,A1,F1,C1
OVP COMP
1MHz
DAC
LX1 (E6)
-
6.35V
2 line
Serial I/F
HX1 (D6)
PGND1 (F6)
VCCOUT
+
INV5
(E3)
No.
ERROR AMP
2 line
Serial I/F
PGND6 (C1)
E3,D2
F4
F5
C3
C2
C4
B4
B3
VOUT6 (C3)
28V
-
+
B5
SCP COMP
LED (C2)
LED SW
control
INV6 (D2)
B2
SCP
COUNTER
Description
IC Power Supply Input in part of controller
Please connect to HX1 terminal.
VCCOUT
Please connect 10uF ceramic capacitor to
this terminal.
Power Supply Input for serial signal.
VDD
Please connect 1uF ceramic capacitor to
this terminal.
GND
Ground terminal
PGND1,2,3,45,6 Ground for Internal FET
Terminal for output voltage of CH1 (step-up).
HX1
Please connect to VCCOUT terminal.
The power supply to switching regulator is
inputted into this terminal. This terminal
Hx2BAT,HX3,4,5
supplies power to output stage of switching
regulator and control circuit.
Terminal for Connecting Inductor. Please
Lx1,3,4,5,6
refer to the 13 page for recommended value.
VOUT2
CH2 DC/DC Output
Terminal for Connecting Inductor
Lx21
For CH2 Input
Terminal for Connecting Inductor
Lx22
For CH2 Output
Output voltage Feed-back pin
Please connect each channel’s output to
Vo1,2,3,4
Vo1 ~ Vo4 terminals, because CH1 ~ CH4
have built-in feedback resister.
Error Amp Inverted Input
INV5,6
Please refer to the 21 page for the
calculation method of feedback resister.
VINREG
LDO Input terminal
REGOUT
LDO Output terminal
VOUT6
CH6 DC/DC OVP monitor terminal
LED
Terminal for connecting LED Cathode
ON/OFF switch
STB1234
H: operating over 1.5V
SCL
2 Line serial clock Input Pin
SDA
2 Line serial data Input Pin
CH4 initial Output voltage control pin
(HX2BAT:1.8V,GND:1.5V)
VOSEL4
Please regularly connect this terminal to
HX2BAT or GND.
Sequence control terminal
HX2BAT:CH1→CH3→CH4→CH2
SEQ_CTL
GND: CH1→CH4→CH3→CH2
Please regularly connect this terminal to
HX2BAT or GND.
VDD(C5)
Serial
I/F
SCL(B4)
SEQ_CTL(B2)
STB1234 (C4)
ON/OFF
LOGIC
ALL CH
DRIVER STOP
SDA(B3)
SCP
COMPOUT
1~6
Symbol
Fig3. Block diagram
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© 2011 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
2
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Absolute maximum ratings(Ta=25℃)
Item
Maximum applied power
Supply voltage
Maximum applied
input voltage
Maximum Output current
Power Dissipation
Operating Temperature
Storage Temperature
Junction Temperature
Symbol
HX2BAT,
VCCOUT
VHx1~5,
VINREG
VLx6
IomaxHx1, Lx1
IomaxHx2BAT
IomaxHx3
IomaxHx4,5
IomaxLx6
REGOUT
Pd
Topr
Tstg
Tjmax
Limit
Unit
-0.3~7
V
-0.3~7
-0.3~7
-0.3~30
±2.8
±2.5
±2.0
±1.0
±1.0
300
1.25 (*1)
-25~+85
-55~+150
+150
V
V
V
A
A
A
A
A
mA
W
℃
℃
℃
*1 Should be derated by 10.0mW/℃ at Ta=25℃ or more. When mounted on a glass epoxy PCB of 50mm×50 mm×1.74 mm
●Operating condition
Item
HX2BAT voltage
(Power supply voltage)
VDD voltage
(serial traffic power supply voltage)
Control input voltage
SCL input frequency range
LDO terminal connection capacity
MIN
Limit
TYP
MAX
HX2BAT
2.5
-
5.5
V
VDD
1.5
-
3.6
V
Vin
Fscl
CoLDO
0
1.0
2.2
VDD
400
-
V
KHz
uF
Symbol
Unit
●Protective functions
Item
SCP
OCP
OVP
condition
CH1 Boost synchronous rectification
○
○
○
CH2 Cross synchronous rectification
○
○
○
CH3 Buck synchronous rectification
○
○
×
SCP: Vo monitor
CH4 Buck synchronous rectification
○
○
×
SCP: Vo monitor
CH5 Buck synchronous rectification
○
○
×
SCP: Error amp output
(internal node) monitor
CH6 Boost back light
×
○
○
OVP: VOUT6 monitor
Stop when shorted output
OVP: HX1 monitor
SCP: Vo monitor
OVP:VOUT2 monitor
●Over current protective part
Item
Symbol
Limit
MIN
TYP
MAX
Unit
CH1 LX1 OCP detecting current
IOCP1
2.8
-
-
A
CH2 HX2BAT OCP detecting current
IOCP2
2.5
-
-
A
CH3 HX3 OCP detecting current
IOCP3
2.0
-
-
A
CH4 HX4 OCP detecting current
IOCP4
1.2
-
-
A
CH5 LX5 OCP detecting current
IOCP5
1.2
-
-
A
CH6 Lx6 OCP detecting current
IOCP7
1.2
-
-
A
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© 2011 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
3
condition
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Electrical characteristics
(Unless specified, Ta=25℃, VCCOUT=5.0V, HX, HX2BAT,REGIN=3.6V, STB1234=3.0V, ALL DCDC, LOD ON)
Item
Symbol
Limit
MIN
【 Low-voltage input malfunction prevention circuit 】
Detecting voltage
Vstd1B
(HX2BAT)
Release voltage (HX2BAT)
Vstd2B
2.0
Hysteresis width
⊿VstdB
50
Detecting voltage
Vstd1V
(VCCOUT)
Release voltage (VCCOUT)
Vstd2V
2.3
Hysteresis width
⊿VstdV
100
【Short Circuit Protection】
SCP detect time
Tscp
16
Timer start threshold voltage
Vscp2
1.31
Timer start threshold voltage
Vscp3
0.42
Timer start threshold voltage
Vscp4
0.69
Timer start threshold voltage
Vscp5
0.28
【OVP】
CH1 OVP Threshold
VOVP1
5.75
CH2 OVP Threshold
VOVP2
5.75
CH6 OVP Threshold
VOVP6
26.5
【Output Voltage】
CH1 Output voltage range
RVO1
4.80
Unit
condition
TYP
MAX
2.1
2.2
V
HX2BAT monitor
2.2
100
2.4
200
V
mV
HX2BAT monitor
2.3
2.4
V
VCCOUT monitor
2.5
200
2.7
300
V
mV
VCCOUT monitor
21
1.68
0.54
0.89
0.36
26
2.04
0.66
1.08
0.44
ms
%
%
%
V
6.35
6.35
28
6.95
6.95
29.5
V
V
V
HX1 monitor
VOUT2 monitor
VOUT6 monitor
-
5.30
V
100mV step
CH1 Output voltage(default)
VO1d
4.925
5.000
5.075
V
CH1 Output Voltage accuracy
VO1o
-2.0
-
2.0
%
CH2 Output voltage range
RVO2
2.80
-
3.35
V
CH2 Output voltage(default)
VO2dL
3.250
3.300
3.350
V
CH2 Output voltage(default)
VO2o
-2.0
-
2.0
%
CH2 Output Voltage accuracy
RVO3
0.900
-
1.250
V
CH3 Output voltage range
VO3d
1.083
1.100
1.117
V
Vo2 monitor
Vo3 monitor
Vo4 monitor
INV5 monitor
50mV step
25mV step
CH3 Output voltage(default)
VO3o
-2.0
-
2.0
%
CH3 Output Voltage accuracy
RVO4
1.775
-
1.850
V
25mV step
CH4 Output voltage range
VO4dH
1.773
1.800
1.827
V
VOSEL4=H
CH4 Output voltage(default)
VO4AdL
1.477
1.500
1.523
V
VOSEL4=L
CH4 Output voltage(default)
VO4o
-2.0
-
2.0
%
CH4 Output Voltage accuracy
RVo6
12.5
-
400
mV
Vo6
380
400
420
mV
IINV5,6
VINV5
0.790
0
0.800
50
0.810
nA
V
CH6 Output voltage range
【 Error Amp 】
Input Bias current
INV5 Threshold
12.5mV step
INV5,6
○This product is not designed for normal operation within a radioactive environment.
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© 2011 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
4
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Electrical characteristics
(Unless specified, Ta=25℃, VCCOUT=5.0V, HX, HX2BAT,REGIN=3.6V, STB1234=3.0V, ALL DCDC, LOD ON)
Item
【Oscillating circuit】
Frequency CH3,4
Frequency CH1,2,5-7
Max duty 1(step-up)
Max duty CH2 Lx21
Max dutyCH2 Lx22
Max duty 3, 4,5(step-down)
【Soft Start】
CH1 Soft Start Time
CH2,5 Soft Start Time
CH3,4 Soft Start Time
CH6 Duty Restriction time
【OFF detect comparator】
CH2 OFF Threshold
CH3 OFF Threshold
CH4 OFF Threshold
Symbol
Limit
Unit
MIN
TYP
MAX
fosc1
fosc2
Dmax1
Dmax21
Dmax22
Dmax34
1.6
0.8
86
86
-
2.0
1.0
92
92
-
2.4
1.2
96
100
96
100
MHz
MHz
%
%
%
%
Tss1
Tss2,5
Tss3,4
TDTC
1.8
2.4
1.2
5.0
3.0
4.2
2.1
8.2
5.4
6.0
3.0
11.8
msec
msec
msec
msec
VOFF2
VOFF3
VOFF4
-
0.420
0.135
0.220
0.560
0.180
0.295
V
V
V
condition
Vo2 monitor
Vo3 monitor
Vo4 monitor
○This product is not designed for normal operation within a radioactive environment.
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© 2011 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
5
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Electrical characteristics
(Unless specified, Ta=25℃, VCCOUT=5.0V, HX, HX2BAT,REGIN=3.6V, STB1234=3.0V, ALL DCDC, LOD ON)
MIN
Limit
TYP
MAX
RON1P
RON1N
RON21P
RON21N
RON22P
RON22N
RON3P
RON3N
RON45P
RON45N
RON45P
RON45N
RON6N
RLED
-
80
60
120
120
150
120
150
110
150
120
200
150
500
2.0
150
120
180
180
230
180
230
170
230
180
300
230
750
3.0
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
mΩ
Ω
RDSW2
RDSW3
RDSW4
RDSW5
-
100
100
100
100
200
200
200
200
Ω
Ω
Ω
Ω
VSTBH1
VSTBL1
RSTB1
1.5
-0.3
250
400
5.5
0.3
700
V
V
kΩ
VCTLH
HX2B
AT-0.3
-
HX2B
AT+0.3
V
VCTLL
0
-
0.3
V
VLDO1
1.5
-
3.3
V
LDOACC
2.758
2.800
2.842
V
Line regulation
VDL
-
2
20
mV
Load regulation
VDLo
-
10
80
mV
RR
40
50
-
dB
ILMAX
ISHORT
LDODCR
220
20
0.5
350
70
1
700
150
1.5
mA
mA
kΩ
VCCOUT terminal
ISTB1
-
0
5
µA
Hx terminal
ISTB2
-
0
5
µA
Lx terminal
VINREG
ISTB3
ISTB4
-
0
0
5
5
µA
µA
IST
-
300
600
µA
HX2VAT=3.6V
Icc2
-
5.0
9.7
mA
CH1~6
Switching OFF LDO ON
Item
Symbol
【Output Driver】
CH1 Highside SW ON Resistance
CH1 Lowside SW ON Resistance
CH2 Lx21 Highside SW ON resistance
CH2 Lx21 Lowside SWON resistance
CH2 Lx22 High side SW ON resistance
CH2 Lx22 Low side SW ON resistance
CH3 High side SW ON Resistance
CH3 Low side SW ON Resistance
CH4 High side SW ON Resistance
CH4 Low side SW ON Resistance
CH5 High side SW ON Resistance
CH5 Low side SW ON Resistance
CH6 NMOS SW ON resistance
LED PIN SW ON resistance
【Discharge switch】
CH2 discharge SW ON resistance
CH3 discharge SW ON resistance
CH4 discharge SW ON resistance
CH5 discharge SW ON resistance
【STB1234】
Active
STB Control Voltage
Non Active
Pull Down Resistance
【SEQ_CTL, VOSEL4】
SEQ_CTL
H level
VOSEL4
L level
Control Voltage
【LDO】
Output voltage
Output voltage accuracy
PSRR
Over current protect
Output short current
Discharge resister
【Circuit Current】
Stand-by Current
Circuit Current when start-up
(HX2BAT current when voltage supplied for
the terminal)
Circuit Current
(VCCOUT current
when voltage supplied for the terminal)
Unit
condition
Hx1=5V
VCCOUT=5.0V
Hx2BAT=3.6V
VCCOUT=5.0V
VOUT2=3.3V
VCCOUT=5.0V
Hx3=3.6V , VCCOUT=5V
VCCOUT=5.0V
Hx4=3.6V, VCCOUT=5V
VCCOUT=5.0V
Hx4=3.6V, VCCOUT=5V
VCCOUT=5.0V
VCCOUT=5.0V
VCCOUT=5.0V
VCCOUT=5.0V
VCCOUT=5.0V
VCCOUT=5.0V
VCCOUT=5.0V
Vo=1.5V,1.8V,2.7V ,2.8V ,
2.9V 3.0V,3.1V,3.3V
VINREG=REGOUT+1.0V
to 5.5V Iout=10uA
Io=0.01mA
to 100mA
VR=-20dBv
f=1KHz
Io=10mA
Vo=REGOUT*0.8
Vo=0V
Step-down
Cross- converter
Step-up
○This product is not designed for normal operation within a radioactive environment.
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© 2011 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
6
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Specification for serial control
Electrical characteristics (Unless specified, Ta=25℃, VDD=3.3V)
Item
Symbol
Limit
MIN
TYP
MAX
Unit
condition
SCL、SDA
H level input voltage
VINH
VDD*0.7
-
VDD+0.3
V
L level input voltage
VINL
-0.3
-
VDD*0.3
V
H level input current
IINH
-10
-
10
µA
L level input current
IINL
-10
-
10
µA
Input voltage=0.1×VDD
L level output voltage (SDA)
VOL
-
-
0.4
V
IIN=3.0mA
Bus capacitance
Cb
-
-
400
pF
TYP
MAX
MIN
Input voltage=0.9×VDD
AC timing characteristics (Unless specified, Ta=25℃, VDD=3.3V)
Item
Symbol
FAST-MODE*
MIN
STANDARD-MODE*
TYP
MAX
Unit
SCL frequency
fSCL
-
-
400
-
-
100
kHz
HIGH period of the SCL clock
fHIGH
0.6
-
-
4
-
-
uS
LOW period of the SCL clock
fLOW
1.3
-
-
4.7
-
-
uS
SDA/SCL rise time
tR
-
-
0.3
-
-
1
uS
SDA/SCL fall rime
tF
-
-
0.3
-
-
1
uS
Start condition hold time
tHD:STA
0.6
-
-
4
-
-
uS
Start condition set-up time
tSU:STA
0.6
-
-
4.7
-
-
uS
Data hold time
tHD:DAT
0
-
0.9
0
-
3.45
uS
Data set-up time
tSU:DAT
100
-
-
250
-
-
nS
Set-up time for stop condition
Bus free time between a STOP
and START condition
Noise cancel time
tSU:STO
0.6
-
-
4
-
-
uS
tBUF
1.3
-
-
4.7
-
-
uS
t1
0
-
50
0
-
50
nS
FAST-MODE and STANDARD-MODE are sectioned by clock speed.
STANDARD-MODE clock speed is 100lHz, and FAST-MODE clock speed is 400 kHz.
These clock speed are assumed maximum frequency, it is possible to use clock speed 100 kHz on FAST-MODE.
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TSZ22111・14・001
7
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Serial data timing
Fig4. Serial data timing
SCL
tSU:STA
tSU:STO
tHD:STA
SDA
STOP BIT
START BIT
Fig5. Start bit, stop bit timing diagram
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TSZ22111・14・001
8
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Serial I/F, Read/Write function
1. Writing protocol
A register address is transferred by the next 1 byte that transferred the slave address and the write-in command. The
3rd byte writes data in the internal register written in by the 2nd byte, and after 4th byte or, the increment of register
address is carried out automatically. However, when a register address turns into the last address, it is set to 00h by
the next transmission. After the transmission end, the increment of the address is carried out.
*1
S X X X X X X X 0 A A7 A6 A5 A4 A3 A2 A1 A0 A D7 D6 D5 D4 D3 D2 D1 D0 A
slave address
register address
*1
D7 D6 D5 D4 D3 D2 D1 D0 A P
DATA
DATA
register address
increment
R/W=0(write)
register address
increment
A=acknowledge(SDA LOW)
A=not acknowledge(SDA HIGH)
S=START condition
P=STOP condition
*1: Write Timing
from master to slave
from slave to master
2. Multiple reading protocols
After specifying an internal address, it reads by repeated START condition and changing the data transfer direction.
The data of the address that carried out the increment is read after it. If an address turns into the last address, the
next byte will read out 00h. After the transmission end, the increment of the address is carried out.
S X X X X X X X 0 A A7 A6 A5 A4 A3 A2 A1 A0 A Sr X X X X X X X 1 A
slave address
register address
slave address
R/W=0(write)
R/W=1(read)
D7 D6 D5 D4D3D2 D1D0 A
DATA
D7D6 D5D4D3D2D1 D0 A P
DATA
register address
increment
register address
increment
A=acknowledge(SDA LOW)
A=not acknowledge(SDA HIGH)
S=START condition
P=STOP condition
Sr=repeated START condition
from master to slave
from slave to master
※As for reading protocol and multiple reading protocols, please do A(not acknowledge) after doing the final reading
operation. It stops with read when ending by A (acknowledge), and SDA stops in the state of Low when the reading
data of that time is 0. However, this state returns usually when SCL is moved, data is read, and A (not acknowledge) is
done.
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TSZ22111・14・001
9
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Application circuit
VCCOUT
GND
●Recommended maximum load
CH1
Vo
(V)
Vin
(V)
Io_max
(mA)
Boost
2.5
1000
L=2.2uH
3.0
1000
(TOKO:DE4518C)
(YUDEN:NR4018T)
3.6
1000
C=20uF
4.2
1000
(MURATA:
GRM31CB31E106KA75L)
2.5
800
L=3.3uH
3.0
800
(TOKO:DE3518)
(YUDEN:NR3015T)
3.6
800
C=10uF
4.2
800
(MURATA:
GRM31CB31E106KA75L)
1.8
1500
L=2.2uH
2.5
1500
(TOKO:DE2815)
(YUDEN:NR3015T)
3.6
1500
C=10uF
4.2
1500
(MURATA:
GRM31CB31E106KA75L)
1.8
800
L=2.2uH
2.5
800
(TOKO:DE2815)
(YUDEN:NR3015T)
3.6
800
C=10uF
4.2
800
(MURATA:
GRM31CB31E106KA75L)
2.5
500
5.0
CH2
Cross
3.3
CH3
Buck
1.1
CH4
Buck
1.8
CH5
Buck
1.8
CH6
VOSEL4
VDD
SCL
SDA
STB1234
SEQ_CTL
CH6
LDO
Fig6. Applied circuit diagram
Boost
3.6
500
4.2
500
5.0
500
2.5
50
condition
(Recommended parts)
L=2.2uH
(TOKO:DE2815)
(YUDEN:NR3015T)
C=10uF (MURATA:
GRM31CB31E106KA75L)
R1=300kΩ,R2=240kΩ
L=10uH
(worth
3.0
50
3 light
4.2
50
(TOKO:DE2815)
(YUDEN:NR3015T)
C=4.7uF (MURATA:
GRM21BB31E475KA75L)
LED)
5.0
50
Diode (RB551V-30)
Boost
1.8
30
L=10uH
(TOKO:DE2815)
(YUDEN:NR3015T)
C=4.7uF (MURATA:
GRM21BB31E475KA75L)
(worth
2.5
30
6 light
3.6
30
LED)
4.2
30
2.8
3.3
200
C=2.2uF
3.6
200
(MURATA:
GRM21BB31E225KA75L)
4.2
200
5.5
200
Diode (RB551V-30)
○ Operation notes
・we are confident that the above applied circuit diagram should be recommended, but please thoroughly confirm its characteristics when using
it. In addition, when using it with the external circuit’s constant changed, please make a decision that allows a sufficient margin in light of the
fluctuations of external components and ROHM’s IC in terms of not only static characteristic but also transient characteristic.
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© 2011 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
10
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Efficiency data (1)
CH1 STEP UP 5.0V Efficiency‐Io
CH2 Cross converter 3.3V Io‐Efficiency
100
100
95
90
85
80
Efficiency [%]
Efficiency [%]
90
70
VBAT=4.2V
60
VBAT=3.6V
50
80
75
VBAT=4.2V
70
VBAT=3.6V
65
VBAT=3.0V
60
VBAT=2.8V
VBAT=2.5V
55
VBAT=2.5V
40
50
10
100
1000
10
100
1000
Io [mA]
Io[mA]
Fig7. CH1 5.0V voltage boost efficiency-Io
Inductor : 2.2uH (YUDEN: NR4018T)
Fig8. CH2 3.3V Cross converter efficiency-Io
Inductor : 3.3uH (YUDEN: NR3015T)
CH3 Step Down 1.15V Io‐Efficiency
CH4 Step Down 1.8V Io‐Efficiency
100
100
95
90
90
85
Efficiency[%]
Efficiency [%]
80
70
60
VBAT=4.2V
50
VBAT=3.6V
VBAT=2.8V
40
VBAT=2.5V
30
80
75
70
VBAT=4.2V
65
VBAT=3.6V
60
VBAT=2.8V
55
VBAT=2.5V
50
10
100
1000
10
10000
Io [mA]
Fig9. CH3 1.15V Step-down efficiency-Io
Inductor : 2.2uH (YUDEN: NR3015T)
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TSZ22111・14・001
100
1000
Io[mA]
Fig10. CH4 1.8V Step-down efficiency-Io
Inductor : 2.2uH (YUDEN: NR3015T)
11
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Efficiency data (2)
CH5 Step Down 1.2V Io‐Efficiency
CH6 Backlight (5LED) Io‐Efficiency
100
100
95
90
90
85
Efficiency[%]
Efficiency [%]
80
70
VBAT=5.5V
VBAT=4.2V
60
VBAT=3.6V
VBAT=2.8V
50
VBAT=2.5V
40
10
100
80
75
70
65
Io=30mA
60
Io=20mA
55
Io=10mA
50
1000
2.000
Io[mA]
3.000
4.000
5.000
VBAT [V]
Fig11. CH5 1.2V Step-down efficiency-Io
Inductor : 2.2uH (YUDEN: NR3015T)
Fig12. CH6 5 LED efficiency-Input voltage
Inductor : 10uH (YUDEN: NR3015T)
IVCCOUT-VBAT (application)
11.20
10.97
11.06
10.87
11
IVCCOUT[mA]
10.29
10.21
10.15
10.02
9
8.64
8.66
8.62
8.52
CH1~4_ON
7
CH1~5_ON
All_CH_ON
5
2
2.5
3
3.5
4
4.5
VBAT [V]
Fig13. VCCOUT Input current - Input voltage
(Recommended application)
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TSZ22111・14・001
12
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Start up and OFF sequence wave form(1)
CH1 Step up 5V (2.0V/div)
CH1 Step up 5V (2.0V/div)
CH2 Cross Converter
3.3V (2.0V/div)
CH2 Cross Converter
3.3V (2.0V/div)
CH3 Step down1.1V (2.0V/div)
CH3 Step down1.1V (2.0V/div)
CH4 Step down1.8V
CH4 Step down1.8V
(2.0V/div)
(2.0V/div)
2.0ms/div
Fig14. CH1~4
Start up wave form
(SEQ_ CTL=H)
2.0ms/div
Fig15. CH1~4
wave form of OFF sequence
(SEQ_ CTL=H)
CH1 Step up 5V
(2.0V/div)
CH1 Step up 5V
(2.0V/div)
CH2 Cross Converter
3.3V (2.0V/div)
CH2 Cross Converter
3.3V (2.0V/div)
CH3 Step down1.1V (2.0V/div)
CH3 Step down1.1V (2.0V/div)
CH4 Step down1.8V
CH4 Step down1.8V
(2.0V/div)
(2.0V/div)
2.0ms/div
Fig16. CH1~4
Start up wave form
(SEQ_ CTL=L)
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TSZ22111・14・001
2.0ms/div
Fig17. CH1~4
wave form of OFF sequence
(SEQ_ CTL=L)
13
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Start up and OFF sequence wave form(2)
SDA (2.0V/div)
SDA (2.0V/div)
CH5 Step down 1.8V
(1.0V/div)
CH5 Step down 1.8V
(1.0V/div)
LDO 2.8V (2.0V/div)
LDO 2.8V (2.0V/div)
2.0ms/div
2.0ms/div
Fig18. CH5, LDO Start up wave form
Fig19. CH5, LDO wave form of OFF sequence
SDA(2.0V/div)
SDA (2.0V/div)
CH6 Backlight 4LED
(5.0V/div)
CH6 Backlight 4LED
(5.0V/div)
1.0ms/div
1.0ms/div
Fig20. CH6 Start up wave form
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TSZ22111・14・001
Fig21. CH6 wave form of OFF sequence
14
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Temperature characteristic
Ta-CH5 base voltage
Frequency temperature characteristic
3
1
difference from 25℃[%]
2.8
Frequency [MHz]
2.6
2.4
2.2
2
1.8
1.6
1.4
1.2
0.5
0
-0.5
-1
1
-25
0
25
50
75
-25
100
25
50
75
100
temp [℃]
temp [℃]
Fig22. Frequency-Temp(2MHz)
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TSZ22111・14・001
0
Fig23. CH5 Base voltage-Temp
15
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Timing chart (1)
SEQ_CTL=H (HX2BAT)
SEQ_CTL=H (HX2BAT)
STB1234
STB1234
Disscharge by 100Ω SW
Vo2
OFF threthold
Tss3
Vo1
Disscharge by 100Ω SW
Vo4
Tss1
Vo3
OFF threthold
Tss4
Disscharge by 100Ω SW
Vo3
OFF threthold
Vo4
Tss2
Vo1
Disscharge by load current
Vo2
SEQ_CTL=L (GND)
SEQ_CTL=L (GND)
STB1234
STB1234
Vo2
Disscharge by 100Ω SW
OFF threthold
Tss4
Vo1
Disscharge by 100Ω SW
Vo3
Tss1
Vo4
OFF threthold
Tss3
Disscharge by 100Ω SW
Vo4
OFF threthold
Vo3
Vo1
Tss2
Disscharge by load current
Vo2
CH5
Serial input
EN5
Serial input
EN5
OFF
Disscharge by 100Ω SW
Tss5
Vo5
(降圧)
Vo5
(降圧)
CH5 OFF
CH6
Serial input
EN6
Serial input
EN6
ERROR AMP output voltage is clamped during soft start
OFF
TDTC
DTC 6( Internal node of IC )
DTC6
Error amp output ( Internal node of IC
)
CH6 OFF
Output voltage correspond to duty of input pulse
VO6
Disscharge by load current
VO6
Tss1 : typ 3.0msec
Tss3 : typ 2.1msec
Tss2 : typ 4.2msec
Tss4 : typ 2.1msec
Tss5 : typ 4.2msec
TDTC: typ 8.2msec
Fig24.CH1~CH6 Start up and OFF Sequence
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TSZ22111・14・001
16
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●SLAVE address
SLAVE address
29h (010 1001)
●Resister map
Attention
¾
¾
¾
¾
“W” is resister bit to write.
“R” is resister bit to read.
“R/W” is resister bit to read or write.
“-” is resister bit not to use.
R/W
D7
D6
D5
D4
D3
D2
D1
D0
Initial
value
SFTRST
W
-
-
-
-
-
-
-
SFT
RST
00h
01h
ENCNT
R/W
-
-
-
-
CH1
PFM
EN
LDO
EN6
EN5
08h
02h
VCNT12
R/W
03h
VCNT34
R/W
Addr
ess
Address
00h
04h
name
VCNT6L
R/W
DO
※※h Æ See resister map
VCNT2[3:0]
-
VCNT4[2:0]
LDOCNT[2:0]
VCNT1[3:0]
64h
VCNT3[3:0]
※8h
VCNT6[4:0]
60h
Function
Input to reset
software
ON/OFF for
each CH
Adjustment to CH1,
CH2 output voltage
Adjustment to CH3,
CH4 output voltage
Adjustment to INV6,
LDO output voltage
Resister reset condition : (Resister reset mean all resister turn into initial value)
① In the operation of HX2BAT UVLO or VCCOUT UVLO.
② Initialized after OFF sequence of CH1~4.
Logic reset condition : Logic reset mean all resister and internal logic circuit (soft start circuit etc.) are initialized in disregard of
sequence with the following condition directly.
① In the operation of HX2BAT UVLO or VCCOUT UVLO.
② Initialized CH1~4 output voltage are OFF with OFF sequence.
Please input “0” to “-“ resister. Empty resisters are used to test mode resister.
Please transmit “0” to “-“ resister to avoid test mode while data is transmitted.
If address “00h” get “01” data, it occur logic reset directly, address “00h” is initialized, and start-up sequence is beginning.
Don’t use this mode, if you don’t need.
●Resister Map 1
Address
00h
Address
01h
Address
name
R/W
SFT
W
RST
D0: SFTRST
Address
name
R/W
ENCN
R/W
T
D0: EN5
D2: ENLDO
D7
D6
D5
D4
D3
D2
D1
D0
Initial
value
Data content
-
-
-
-
-
-
-
SFT
RST
00h
Input to reset
software
D1
D0
Initial
value
Data content
software reset
‘0’: Reset cancel (Initial)
‘1’: reset Æ Reset automatically by 1 shot pulse.
D7
D6
D5
D4
D3
-
-
-
-
CH1P
FM
CH5 ON/OFF signal
‘0’: CH5 OFF (initial value)
‘1’: CH5 ON
LDO ON/OFF signal
‘0’: LDO OFF (initial value)
‘1’: LDO ON
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TSZ22111・14・001
D2
ENLD
EN6
O
D1: EN6
ON/OFF for
each CH
CH6 ON/OFF signal
‘0’: CH6 OFF (initial value)
‘1’: CH6 ON
EN5
08h
D3: CH1PFM
CH1 PFM mode switch signal
‘0’: CH1 synchronous mode
‘1’: CH1 reverse current detect mode (initial value)
17
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Resister Map 2
Address
Address
name
R/W
02h
VCNT12
R/W
03h
VCNT34
R/W
VCNT6
04h
LDO
D7
D6
D5
D4
D3
D2
VCNT2[3:0]
-
R/W
VCNT4[2:0]
LDOCNT[2:0]
D1
D0
Initial
Value
VCNT1[3:0]
64h
VCNT3[3:0]
※8h
VCNT6[4:0]
60h
Function
Adjustment to
CH1,CH2
output voltage
Adjustment to
CH3, CH4
output voltage
Adjustment to
INV6,LDO
output voltage
Output voltage [V]
Data
D4
D3
D2
D1
D0
VCNT1
[D3~D0]
VCNT2
[D3~D0]
0
0
0
0
0
4.800
2.800
0
0
0
0
1
4.800
2.800
0
0
0
1
0
4.800
2.850
0
0
0
1
1
4.900
0
0
1
0
0
5.000
0
0
1
0
1
0
0
1
1
0
0
1
0
1
0
0
1
0
1
0
0
VCNT3
[D3~D0]
VCNT4
[D2~D0]
VCNT6
[D4~D0]
LDOCNT
[D2~D0]
0.900
1.475
0.4000
1.500
0.925
1.500(*1)
0.3875
1.800
0.950
1.525
0.3750
2.700
2.900
0.975
1.550
0.3625
2.800
3.200
1.000
1.775
0.3500
2.900
5.100
3.250
1.025
1.800(*2)
0.3375
3.000
0
5.200
3.300
1.050
1.825
0.3250
3.100
1
1
5.300
3.350
1.075
1.850
0.3125
3.300
0
0
5.300
3.350
1.100
-
0.3000
-
0
0
1
5.300
3.350
1.125
-
0.2875
-
0
1
0
5.300
3.350
1.150
-
0.2750
-
1
0
1
1
5.300
3.350
1.175
-
0.2625
-
1
1
0
0
5.300
3.350
1.200
-
0.2500
-
0
1
1
0
1
5.300
3.350
1.225
-
0.2375
-
0
1
1
1
0
5.300
3.350
1.250
-
0.2250
-
0
1
1
1
1
5.300
3.350
1.250
-
0.2125
-
1
0
0
0
0
-
-
-
-
0.2000
-
1
0
0
0
1
-
-
-
-
0.1875
-
1
0
0
1
0
-
-
-
-
0.1750
-
1
0
0
1
1
-
-
-
-
0.1625
-
1
0
1
0
0
-
-
-
-
0.1500
-
1
0
1
0
1
-
-
-
-
0.1375
-
1
0
1
1
0
-
-
-
-
0.1250
-
1
0
1
1
1
-
-
-
-
0.1125
-
1
1
0
0
0
-
-
-
-
0.1000
-
1
1
0
0
1
-
-
-
-
0.0875
-
1
1
0
1
0
-
-
-
-
0.0750
-
1
1
0
1
1
-
-
-
-
0.0625
-
1
1
1
0
0
-
-
-
-
0.0500
-
1
1
1
0
1
-
-
-
-
0.0375
-
1
1
1
1
0
-
-
-
-
0.0250
-
1
1
1
(*2) VOSEL4 = H
-
-
-
-
0.0125
-
1
1
(*1) VOSEL4 = L
→ Initial value.
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TSZ22111・14・001
18
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Setting method of IC peripheral components
(1) Design of feedback resistor constant
VOUT6
VOUT5
ERROR AMP
R1
INV
R2
INV6
VREF
0.8V
Vo=
(R1+R2)
R2
R3
VREF
12.5,mV~400mV
CH6 output current
CH5 output voltage
×0.8 [V] ・・・ (1)
ERROR AMP6
Io=
INV6
[A] ・・・ (2)
R3
Fig25. Feedback resistor setting method
(a)CH5 setting
The reference voltage of CH5’s ERROR AMP is 0.8V inside IC. Please refer to Formula (1) for determining the output
voltage. This IC has phase compensation. R1 and R2 are recommended as more than 100kΩ.
(b)CH6 setting
LED current is decided (2) formula. Please decide R3 value for LED current range. It is possible to control Dimming by only
serial I/F.
(2) Points for attention in terms of PCB layout of base-plate
○For a switching regulator, in principle a large current transiently flows through the route of power supply – coil – output
capacitor. Ensure that the wiring impedance is lowered as much as possible by making the pattern as wide as possible and
the layout as short as possible.
○Interference of power supply noise with feedback terminals (Vo, INV) may cause the output voltage to oscillate.
Ensure that the power supply noise’s interference is avoided by making the wiring between feedback resistor and feedback
terminal as short as possible.
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TSZ22111・14・001
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2011.12.22 Rev.001
BD9361GUL
●Block explanation
1. SCP, Timer Latch
It is a timer latch type of short-circuit protection circuit.
For CH6, the error AMP output voltage is monitored, and detected when the feedback voltage deviates from control,
for CH1~5, it is detected when the voltage of INV terminal becomes lower than 60%, and in 21ms the latch circuit
operates and the outputs of all the channels are fixed at OFF.
In order to reset the latch circuit, please turn off all the STB terminals before turning them on once again or turning
power supply on once again.
2. U.V.L.O
It is a circuit to prevent malfunction at low voltage.
It is to prevent malfunction of internal circuit at the time of rising or dropping to a lower value of power supply voltage.
If the voltage of VCCOUT terminal becomes lower than 2.3V, or the voltage of HX2BAT terminal becomes lower than
2.1V, then the output of each DC/DC converter is reset to OFF, and SCP’s timer latch & soft start circuit are reset. In
order to cancel UVLO of VCCOUT, it is necessary to set VCCOUT more than 2.5V. And in order to cancel UVLO of
HX2BAT, it is necessary to set HX2BAT more than 2.2V.
3. OSC
It is an oscillation circuit the frequency of which is fixed by a built-in CR.
The operating frequencies of CH3, 4, 5 are set at 2MHz, and the operating frequencies of CH1, 2, 6 are set at 1MHz.
4. ERRAMP 1~6
It is an error amplifier to detect output signal and output PWM control signal.
The reference voltages of ERRAMP (Error Amplifier) of CH1~4 are internally set at 0.6V, and the reference
Voltages of ERRAMP (Error Amplifier) of CH5 are set at 0.8V and the reference voltages of ERRAMP (Error Amplifier)
of CH6 are set at 0.4V.
In addition, each CH incorporates a built-in element for phase compensation.
5. Current mode control block
CH1, 3~6 adopt the PWM method based on current mode.
For a current- mode DC/DC converter, FET at the main side of synchronous rectification is turned on when detecting
the clock edge, and turned off by detecting the peak current by means of the current comparator.
6. Cross Control
DUTY controller for CH2 cross converter. It have PWM comparator that compare 1MHz SLOPE and ERROR AMP
output and logic circuit for control 4 FET ON/OFF switching.. LX21 MAX ON DUTY is 100%, LX21 MAX ON DUTY is
92%.
7. Back gate Control
PchFET backgate selector controller in CH1.
PchFET have body Di between backgate and source,drain ordinary. This circuit intercept CH1 step up output voltage
by cutting body Di line at STB OFF and control soft start .CH1 softstart output voltage from 0V like a slope.
8. Nch DRIVER , Pch DRIVER
Internal Nch, Pch FET driver CMOS inverter type output circuit.
9. ON/OFF LOGIC
It is the voltage applied to STB terminal and can control the ON/OFF of CH1~CH4.
If the voltage more than 1.5V is applied, then it becomes ON, but if open or 0V is applied, then it becomes off,
furthermore, it all the channels are turned off, then the whole IC will be in standby state. In addition, STB1234
terminals contain respectively a built-in pull-down resistor of about 400kΩ.
10. SOFT START
It is a circuit to apply the soft start to the output voltage of DC/DC converter and prevent the rush current at the
start-up. Soft start time varies with the channels.
a.
b.
c.
d.
CH1
CH3,4
CH2,5
CH6
・・・
・・・
・・・
・・・
reach the target voltage in 3.0ms.
reach the target voltage in 2.1ms.
reach the target voltage in 4.2ms.
reach the target voltage in 8.2ms.
11. OVP COMP6
In CH6, When LED is OPEN, INV6 become L and output voltage increase suddenly. If this condition continue,Lx6
voltage increase and exceed break down voltage. CH6 have Over voltage protection (OVP).When VOUT6 pin is
inputted over 28Vtyp,OVP stop CH6 function..OVP latch CH6 function and reset by All STB=L
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TSZ22111・14・001
20
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●PIN equivalent circuit
VOUT6
(CH6 OVP monitor terminal)
INV5,INV6
(Error amplifier’s inversion input)
STB1234
(operating when CH1~4 ON/OFF
switch is High)
Vo1
(CH1 Output voltage Feed-back pin)
Vo3
(CH3 Output voltage Feed-back pin)
Vo2
(CH2 Output voltage Feed-back pin)
VCCOUT
Vo2
274.09kΩ
60.91kΩ
Hx1,2BAT,3,45,VOUT2 (Pch FET source terminal)
Lx1,21,22,3,4,5(Nch,Pch FET drain terminal)
PGND1,2,345 (output stage earthing terminal)
Vo4
(CH4 Output voltage Feed-back pin)
Hx,VOUT2
Lx
VCCOUT
PGND
Fig26. PIN equivalent circuit (1)
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© 2011 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
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TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
INV7(CH7 Error amplifier’s inversion input)
LED(LED cathode connection terminal)
Lx6 (Nch FET drain terminal)
PGND6 (output stage earthing terminal)
Hx1,2BAT(Pch FET source terminal)
Lx1,21(Nch,Pch FET drain terminal)
PGND1,2 (output stage earthing terminal)
VOSEL4(CH4 initial Output voltage control pin)
SEQ_CTL(Sequence control terminal)
REGOUT
(LDO output terminal)
SCL
(2 Line serial clock Input Pin)
VDD
SCL
SDA
(2 Line serial data Input Pin)
VDD
SDA
Fig.27
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© 2011 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
PIN equivalent circuit (2)
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2011.12.22 Rev.001
BD9361GUL
●Usage Notes
1.) Absolute Maximum Ratings
Although the quality of this product has been tightly controlled, deterioration or even destruction may occur if the absolute maximum
ratings, such as for applied pressure and operational temperature range, are exceeded.
open mode destruction conditions.
Furthermore, we are unable to assume short or
If special modes which exceed the absolute maximum ratings are expected, physical safely
precautions such as fuses should be considered.
2.) GND Potential
The potential of the GND pin should be at the minimum potential during all operation status
In addition, please try to do not become electric potential below GND for the terminal other than NON5 including the transient
phenomenon in practice.
Please do not go down below 0.3V for the NON5 terminal with transient phenomenon and the like when you use.
3.) Heat Design
Heat design should consider tolerance dissipation (Pd) during actual use and margins which should be set with plenty of room.
4.) Short-circuiting Between Terminals and Incorrect Mounting
When attaching to the printed substrate, pay special attention to the direction and proper placement of the IC.
If the IC is attached
incorrectly, it may be destroyed. Destruction can also occur when there is a short, which can be caused by foreign objects entering between
outputs or an output and the power GND.
5.) Operation in Strong Magnetic Fields
Exercise caution when operating in strong magnet fields, as errors can occur.
6.) About common impedance
Please do sufficient consideration for the wiring of power source and GND with the measures such as lowering common impedance, making
ripple as small as possible (making the wiring as thick and short as possible, dropping ripple from L.C) and the like.
7.)STB terminal voltage
When you set each channel to standby, set STB terminal voltage as less than 0.3V, and when you set each channel to active, set STB
terminal voltage as more than 1.5V. Use capacitor less than 0.01uF, when you connect STB terminal to capacitor. It becomes a cause of
malfunction.
8.) Heat Protection Circuit (TSD circuit)
This IC has a built-in Temperature Protection Circuit (TSD circuit). The temperature protection circuit (TSD circuit) is only to cut off the IC
from thermal runaway, and has not been designed to protect or guarantee the IC.
Therefore, the user should not plan to activate this
circuit with continued operation in mind.
9.) Rush current at the time of power supply injection.
An IC which has plural power supplies, or CMOS IC could have momentary rush current at the time of power supply injection.
Please take care about power supply coupling capacity and width of power Supply and GND pattern wiring.
10.) Influence by strong light
When large amount of light like strobe is come in,IC can act under wrong operation. Please make light removal system and check
operations adequately.
11.) IC Terminal Input
This IC is a monolithic IC, and between each element there is a P+ isolation and P substrate for element separation. There is a P-N junction
formed between this P-layer and each element’s N-layer, which makes up various parasitic elements.
For example, when resistance and transistor are connected with a terminal as in figure 36:
〇 When GND>(terminal A) at the resistance, or GND>(terminal B) at the transistor (NPN), the P-N junction operates as a parasitic diode.
〇 Also, when GND>(terminal B) at the transistor, a parasitic NPN transistor operates by the N-layer of other elements close to the
aforementioned parasitic diode.
With the IC’s configuration, the production of parasitic elements by the relationships of the electrical potentials is inevitable.
The operation of the parasitic elements can also interfere with the circuit operation, leading to malfunction and even destruction.
Therefore, uses which cause the parasitic elements to operate, such as applying voltage to the input terminal which is lower than
the GND(P-substrate), should be avoided.
Transistor (NPN)
( Terminal B)
B
E
C
~
Resistor
P+
N
P
N
P+
P+
N
N
P
N
P+
Parasitic element
(
Terminal A)
N
P-board
Parasitic element
P-board
GND
N
~
~
( Terminal A)
GND
Parasitic element
GND
Fig. 28 Simplified structure of a Bipolar IC
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TSZ22111・14・001
23
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
BD9361GUL
●Thermal Derating Curves
When mounted on a glass epoxy PCB
of 50mm×50 mm×1.74 mm
Should be derated by 10.0mW/ ℃ at
Ta=25℃ or more.
Heat design should consider tolerance
dissipation (Pd) during actual use and
margins which should be set with
plenty of room.
Fig.29 Power dissipation
●Ordering Information
B
D
9
3
6
1
G
U
L
-
E2
Package
GUL: VCSP50L3
Packaging and forming specification
E2: Embossed tape and reel
●Package and Marking Diagram
0.1±0.05
BD9361
0.55MAX
Lot No.
3.14±0.05
1PIN MARK
S
0.06
S
36-φ0.25±0.05
0.05
AB
A
F
E
D
C
B
A
(φ0.15)INDEX POST
B
P=0.5×5
0.32±0.05
3.14±0.05
12 3 4 5 6
0.32±0.05
Fig.30
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TSZ22111・14・001
P=0.5×5
Package and Marking Diagram
24
TSZ02201-0Q2Q0A400010-1-2
2011.12.22 Rev.001
Datasheet
Notice
●General Precaution
1) Before you use our Products, you are requested to carefully read this document and fully understand its contents.
ROHM shall not be in any way responsible or liable for failure, malfunction or accident arising from the use of any
ROHM’s Products against warning, caution or note contained in this document.
2) All information contained in this document is current as of the issuing date and subject to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the latest information with a ROHM sales
representative.
●Precaution on using ROHM Products
1) Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
intend to use our Products in devices requiring extremely high reliability (such as medical equipment, transport
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
2)
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3)
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4)
The Products are not subject to radiation-proof design.
5)
Please verify and confirm characteristics of the final or mounted products in using the Products.
6)
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7)
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8)
Confirm that operation temperature is within the specified range described in the product specification.
9)
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Notice - Rev.003
© 2012 ROHM Co., Ltd. All rights reserved.
Datasheet
●Precaution for Mounting / Circuit board design
1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2)
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
●Precautions Regarding Application Examples and External Circuits
1) If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2)
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
●Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
●Precaution for Storage / Transportation
1) Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2)
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3)
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4)
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
●Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
●Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
●Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
●Precaution Regarding Intellectual Property Rights
1) All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2)
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Notice - Rev.003
© 2012 ROHM Co., Ltd. All rights reserved.
Datasheet
●Other Precaution
1) The information contained in this document is provided on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate and/or error-free. ROHM shall not be in any way responsible or
liable for any damages, expenses or losses incurred by you or third parties resulting from inaccuracy or errors of or
concerning such information.
2)
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
3)
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
4)
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
5)
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice - Rev.003
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