Rohm BM1P063FJ Pwm control ic Datasheet

Datasheet
AC/DC Drivers
PWM Control IC
BM1P105FJ
● General
The PWM control IC for AC/DC “BM1P105FJ”
provides an optimum system for all products that
include an electrical outlet.
A built-in start circuit that withstands 650 V helps to
keep power consumption low. Both isolated and
non-isolated versions are supported, making for
simpler design of various types of low-power
converters. Switching MOSFET and current detection
resistors are external devices, thus achieving a higher
degree of freedom in power supply design. The
switching frequency is set as fixed. Since current mode
control is used, a current limit is imposed in each cycle,
and excellent performance is demonstrated in
bandwidth and transient response. With a light load,
frequency is reduced and higher efficiency is realized.
A frequency hopping function is also built in,
contributing to low EMI.
Also on chip are soft start and burst functions, a
per-cycle overcurrent limiter, VCC overvoltage
protection, overload protection, and other protection
functions.
● Features
 PWM frequency: 100 kHz
 PWM current mode method
 Frequency hopping function
 Burst operation during light load / Frequency
reduction function
 650 V start circuit
 VCC pin undervoltage protection
 VCC pin overvoltage protection
 CS pin open protection
 CS pin Leading-Edge-Blanking function
 Per-cycle overcurrent limiter function
 Overcurrent limiter with AC voltage compensation
function
 Soft start function
 Secondary overcurrent protection circuit
● Package
SOP-J8
4.90 mm × 6.00 mm × 1.65 mm
(Typ.)
(Typ.)
(Typ.)
pitch 1.27 mm
(Typ.)
● Basic Specifications
 Operating power supply voltage range:
 Operating current:
 Oscillation frequency:
VCC 8.9 V to 26.0 V
VH:
to 600 V
Normal: 0.60 mA (Typ.)
Burst mode: 0.35 mA (Typ.)
BM1P105FJ: 100 kHz (Typ.)
 Operating temperature range:
● Applications
AC adapters, TVs, and household appliances
(vacuum cleaners, humidifiers, air cleaners, air
conditioners, IH cooking heaters, rice cookers, etc.)
-40°C to +85°C
● Application circuit
● Line-up
BM1P061FJ
BM1P062FJ
BM1P063FJ
BM1P064FJ
BM1P065FJ
BM1P066FJ
BM1P067FJ
BM1P068FJ
BM1P101FJ
BM1P102FJ
BM1P103FJ
BM1P104FJ
BM1P105FJ
BM1P106FJ
BM1P107FJ
BM1P108FJ
Frequency
VCCOVP
VCC recharge
65kHz
65kHz
65kHz
65kHz
65kHz
65kHz
65kHz
65kHz
100kHz
100kHz
100kHz
100kHz
100kHz
100kHz
100kHz
100kHz
Auto-restart
Latch
Auto-restart
Latch
Auto-restart
Latch
Auto-restart
Latch
Auto-restart
Latch
Auto-restart
Latch
Auto-restart
Latch
Auto-restart
Latch
〇
〇
〇
〇
×
×
×
×
〇
〇
〇
〇
×
×
×
×
X-cap
discharge
〇
〇
×
×
×
×
×
×
〇
〇
×
×
×
×
×
×
Brown-out
〇
〇
×
×
〇
〇
×
×
〇
〇
×
×
〇
〇
×
×
Figure 1．Application Circuit
○ Product structure：Silicon monolithic integrated circuit
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○This product is not designed for protection against radioactive rays
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Datasheet
BM1P105FJ
● Absolute Maximum Ratings (Ta = 25°C)
Parameter
Symbol
Rating
Unit
Maximum voltage 1
Vmax1
-0.3 ~ 30.0
V
Maximum voltage 2
Vmax2
-0.3 ~ 6.5
V
Maximum voltage 3
Vmax3
-0.3 ~ 15.0
V
Maximum voltage 4
Vmax4
-0.3 ~ 650
V
OUT pin peak current
IOUT
±1.0
A
Allowable dissipation
Pd
674.9 (Note1)
mW
o
Operating temperature range
Topr
-40 ~ +85
C
o
Storage temperature range
Tstr
-55 ~ +150
C
(Note1)
SOP-J8: When mounted, 70 × 70 × 1.6 mm (glass epoxy on single-layer
used at Ta = 25°C or above.
Conditions
VCC
CS, FB, ACMONI
OUT
VH
When mounted
substrate). Reduce to 5.40 mW/°C when
● Recommended Operating Conditions (Ta = 25°C)
Parameter
Supply voltage range 1
Supply voltage range 2
Symbol
VCC
VH
Rating
8.9 ~ 26.0
80 ~ 600
Unit
V
V
● Electrical Characteristics (Unless otherwise noted, Ta = 25°C, VCC = 15 V)
Rating
Parameter
Symbol
Min.
Typ.
Max.
Conditions
VCC pin voltage
VH pin voltage
Unit
Conditions
［Circuit current］
FB = 2.0 V
(during pulse operation)
FB = 0.0 V
(during burst operation)
Circuit current (ON) 1
ION1
-
600
1000
μA
Circuit current (ON) 2
ION2
-
350
450
μA
12.50
7.50
26.00
-
13.50
8.20
5.30
27.50
23.50
4.00
14.50
8.90
29.00
-
V
V
V
V
V
V
VCC rise
VCC drop
VUVLO3 = VUVLO1- VUVLO2
VCC rise
VCC drop
VOUTH
VOUTL
RPDOUT
10.5
75
12.5
100
14.5
1.00
125
V
V
kΩ
IO = -20 mA
IO = +20 mA
VACMONI1
VACMONI2
VACMONI3
TACMONI1
0.92
0.63
0.20
180
1.00
0.70
0.30
256
1.08
0.77
0.40
330
V
V
V
ms
ACMONI rises
ACMONI falls
Start current 1
Start current 2
ISTART1
ISTART2
0.400
1.000
0.700
3.000
1.000
5.000
mA
mA
OFF current
ISTART3
-
10
20
uA
VSC
0.400
0.800
1.400
V
［VCC pin (5 pin) protection function ］
VCC UVLO voltage 1
VUVLO1
VCC UVLO voltage 2
VUVLO2
VCC UVLO hysteresis
VUVLO3
VCC OVP voltage 1
VOVP1
VCC OVP voltage 2
VOVP2
VCC OVP hysteresis
VOVP3
[Output driver block]
OUT pin H voltage
OUT pin L voltage
OUT pin pull-down resistance
[ACMONI detection circuit]
ACMONI detection voltage1
ACMONI detection voltage2
ACMONI Hysteresis
ACMONI Timer
[Start circuit block]
Start current switching voltage
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VCC = 0 V
VCC = 10 V
Inflow current from VH pin
after release of UVLO
TSZ02201-0F2F0A200170-1-2
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Datasheet
BM1P105FJ
● Electrical characteristics of control IC block (Unless otherwise noted, Ta = 25°C, VCC = 15 V)
Rating
Parameter
Symbol
Unit
Min.
Typ.
Max.
Conditions
[PWM type DC/DC driver block]
FB = 2.00 V average
frequency
FB = 0.40 V average
frequency
FB = 2.00 V average
frequency
Oscillation frequency 1a
FSW1a
90
100
110
kHz
Oscillation frequency 2
FSW2
-
25
-
kHz
Frequency hopping range
FDEL1
-
6.0
-
kHz
Hopping fluctuation frequency
Minimum pulse width
Soft start time 1
Soft start time 2
Soft start time 3
Soft start time 4
Maximum duty
FB pin pull-up resistance
FB / CS gain
FB burst voltage 1
FB burst voltage 2
FCH
Tmin
TSS1
TSS2
TSS3
TSS4
Dmax
RFB
Gain
VBST1
VBST2
75
0.30
0.60
1.20
2.40
68.0
22
0.300
0.350
125
400
0.50
1.00
2.00
4.00
75.0
30
4.00
0.400
0.450
175
0.70
1.40
2.80
5.60
82.0
38
0.500
0.550
Hz
ns
ms
ms
ms
ms
%
kΩ
V/V
V
V
FBOLP voltage 1a
VFOLP1A
2.60
2.80
3.00
V
FBOLP voltage 1b
VFOLP1B
-
VFOLP2A-0.2
-
V
TFOLP
44
64
84
ms
VCS
0.380
0.400
0.420
V
VCS_SS1
-
0.100
-
V
VCS_SS2
-
0.150
-
V
TSS1 [ms] ~ TSS2 [ms]
VCS_SS3
-
0.200
-
V
TSS2 [ms] ~ TSS3[ms]
VCS_SS4
-
0.300
-
V
TSS3 [ms] ~ TSS4 [ms]
TLEB
-
250
-
ns
KCS
12
20
28
mV/us
FBOLP detection timer
FB drop
FB rise
When overload is detected
(FB rise)
When overload is detected
(FB drop)
[Overcurrent detection block]
Overcurrent detection voltage
Overcurrent detection voltage
SS1
Overcurrent detection voltage
SS2
Overcurrent detection voltage
SS3
Overcurrent detection voltage
SS4
Leading edge blanking time
Overcurrent
detection
AC
compensation factor
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Ton = 0 us
0 [ms] ~ Tss1 [ms]
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Datasheet
BM1P105FJ
● Pin Descriptions
Table1. I/O Pin Functions
No.
Pin Name
I/O
Function
1
2
3
4
5
6
7
8
ACMONI
FB
CS
GND
OUT
VCC
N.C.
VH
I
I
I
I/O
O
I/O
I
Comparator input pin
Feedback signal input pin
Primary current sense pin
GND pin
External MOS drive pin
Power supply input pin
Non Connection
Start circuit pin
ESD Diode
VCC
○
○
○
○
-
GND
○
○
○
○
○
○
● I/O Equivalent Circuit Diagram
Figure 2. I/O Equivalent Circuit Diagram
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BM1P105FJ
● Block Diagram
Figure 3. Block Diagram
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BM1P105FJ
● Description of application operations in blocks
(1)
Start circuit (VH pin: 8 pin)
This IC has a built-in start circuit (withstands 650 V). This enables both low standby mode power and high-speed
startup.
This start circuit operates only at startup. The current flow when operating is shown in Figure 5.
After startup, the power consumed is only for the idling current ISTART3 (typ = 10 uA).
ex) When Vac = 100 V, power consumption is from start circuit only
PVH = 100 V*√2*10 uA = 1.41 mW
ex) When Vac = 240 V, power consumption is from start circuit only
PVH = 240 V*√2*10 uA = 3.38 mW
Startup time is determined based on the inflow current for the VH pin and the capacitance for the VCC pin.
Startup time reference values are shown in Figure 6. For example, when Cvcc = 10 uF, startup takes about 0.07 seconds.
When the VCC pin has been shorted to GND, the ISTART1 current in Figure 5 flows.
When the VH pin has been shorted to GND, a large current flows to GND from the VH line. To prevent this, insert resistor
RVH (5 kΩ ~ 60 kΩ) to limit the current between the VH line and the VH pin of the IC.
2
When the VH pin is shorted, the power of VH /RVH is applied to the resistor. Therefore, select a resistor size that is able
to tolerate this amount of power.
If one resistor is not enough for the allowable power, connect two or more resistors in series.
Figure 4. Block Diagram of Start Circuit
1.0
0.9
起動時間[sec]
Startup
Time [us]
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
5
10
15
20
25
30
35
40
45
50
Cvcc [uF]
Figure 5. Start Current vs VCC Voltage
(* Start current flows from the VH pin.)
The operating waveform at startup is as follows.
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Figure 6. Startup Time (Reference Value)
(CVCC is capacitance for the VCC pin.)
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BM1P105FJ
The operating waveform at startup is shown in Figure 7.
VH
Voltage
ISTART2
VH input
current
ISTART1
ISTART3
VUVLO1
VCC(5pin)
VSC
Switing
Set voltage
Secondary
output
A
B
C
D
Figure 7. Operating Waveform at Startup
A: VH voltage is applied when plugged into the outlet. At that time, charging starts from the VH pin via the start circuit to
the VCC pin.
At that time, VCC < VSC (typ = 0.8 V), so the VH input current is limited to ISTART1 by the VCC pin short protection
function.
B: Since VCC voltage > VSC (typ = 0.8 V), VCC short protection is cancelled and current flow is from the VH input current.
C: Since VCC voltage > VUVLO1 (typ = 13.5 V), the start circuit is stopped and the VH input current flow is only ISTART3
(typ = 10 uA).
When switching starts, secondary output begins to increase, but since secondary output is low, the VCC pin voltage is
reduced. The drop rate of VCC is determined by the consumption current between the VCC pin capacitor and the IC
and by the load current connected to the VCC pin. (V/t = Cvcc/Icc)
D: Since secondary output has risen to a constant voltage, voltage is applied from the auxiliary winding to the VCC pin,
and VCC voltage is stabilized.
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(2) Startup sequences (soft start operation, light load operation, auto recovery operation during overload protection)
Startup sequences are shown in Figure 8.
See the sections below for detailed descriptions.
Figure 8. Startup Sequence Time Chart
A: Voltage is applied to the input voltage (VH) pin (pin 8).
B: The VCC pin (pin 6) voltage rises, and when VCC ＞ VUVLO1 (13.5 V typ) this IC starts to operate.
When protection functions (ACMONI, VCC, CS, FB pin, temperature) are judged as normal, switching operation begins.
At this time, the VCC pin (pin 6) consumption current necessarily causes the VCC pin voltage to drop. When VCC <
VUVLO2 (8.2 V typ), switching operation stops by VCC UVLO function. For that, set VCC capacitor to finish start-up before
VCC<VUVLO2(8.2V.typ)
C: With the soft start function, excessive rises in voltage and current are prevented by adjusting the voltage level of the CS
pin (pin 3). During a soft start, the IC changes the overcurrent detection voltage from VCC_SS1 to VCC_SS4 to prevent
overshoot of the output voltage. VCC_SS1 is described in Table 2 below.
Table 2 Overcurrent Detection Voltage at Startup
Vlim1
Soft start
0.10 V (12%)
Start ~ 0.5 ms
0.5 ms ~1 ms
0.15 V (25%)
1 ms ~2 ms
0.20 V (50%)
2 ms ~4 ms
0.30 V (75%)
4 ms ~
0.500 V (100%)
D: When the switching operation starts, the secondary output voltage VOUT rises.
After switching has started, set the output voltage to within TFOLP (64 ms typ) to become the rated voltage.
E: When there is a light load, burst operation suppresses power consumption.
F: When there is an overload, the FB pin (pin 2) voltage becomes greater than VFOLP1A to reduce the output voltage.
G: If the FB pin (pin 2) voltage exceeds VFOLP1A for TFOLP (64 ms typ) or longer, the overload protection circuit stops the
switching operation. For that, set to finish the start-up time within TFOLP (64 ms typ).
When the FB pin (pin 2) voltage exceeds VFOLP1B, the IC’s internal timer TFOLP (64 ms typ) is reset.
H: When VCC voltage becomes VCC < VUVLO2 (8.2 V typ), the start circuit operates and VCC charging is started.
I: When VCC voltage becomes VCC> VUVLO1 (13.5 V typ), the start circuit stops charging VCC.
J: Same as F
K: Same as G
Startup waveforms are shown as reference examples in Figure 9 and Figure 10.
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BM1P105FJ
VH voltage
VH voltage
Secondary
output
Secondary
output
VCC voltage
VCC voltage
Within 64ms
Within 64ms
Figure 9. Waveform of No-load Startup
Figure 10. Waveform of High-load Startup
(3) VCC pin protection function
This IC includes a VCC pin under voltage protection function VCC UVLO (Under Voltage Protection) and overvoltage
protection function VCC OVP (Over Voltage Protection).
The VCC UVLO function and VCC OVP function prevent damage to the switching MOSFET that can occur when the VCC
voltage drops or becomes excessive.
(3-1) VCC UVLO and VCC OVP functions
VCC UVLO is an auto recovery type comparator with voltage hysteresis. For VCC OVP, the BM1P105FJ has an auto
recovery type comparator.
After VCCOVP operation detects, switching operation re-start when VCC<VOVP2 (typ=23.5V).
The operation is shown in Figure 11.
A mask time TLATCH (typ = 100 us) is built in for VCC OVP to prevent miss-detection. The detection is performed when the
VCC pin (pin 6) voltage continues to exceed VOVP1 (typ = 27.5 V) for TLATCH (typ = 100 us).
This function masks surges or the like that occur at the pin. (See section (7) below.)
Vovp1=27.5Vtyp
Vovp2= 23.5Vtyp
VCCuvlo1=13.5Vtyp
VCCuvlo2= 8.2Vtyp
ON
ON
ON
ON
ON
OFF
OFF
ON
OFF
OFF
ON
OFF
A
ON
OFF
B C
D E
F
G H
I
J
K
L
M
N
O
P
Figure 11. VCC UVLO / OVP Time Chart
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A: Voltage is applied to the VH pin (pin 8) and voltage at the VCC pin (pin 6) starts to rise.
B: When VCC pin (pin 6) voltage > VUVLO1, the VCC UVLO function is canceled and the DC/DC operation starts.
Then VCC start-up circuit stops charging.
C: When VCC pin (pin 6) voltage < VUVLO2, the VCC UVLO function is operated and the DC/DC operation stops.
Then VCC start-up circuit starts charging.
D: When VCC pin (pin 6) voltage > VUVLO1, the VCC UVLO function is canceled and the DC/DC operation starts.
Then VCC start-up circuit stops charging.
E: After finishing start-up, VCC pin voltage is stable as secondary output voltage is stable.
F: VCC pin voltage rises
G: When VCC pin (pin 6) voltage > VOCP status continues for TLATCH (typ = 100us), switching operation is stopped
by the VCC OVP function.
H: When VCC pin voltage < VOVP2, VCCOVP function is released, and the switching operation re-starts.
I: When VCC pin voltage < VUVLO2, VCCUVLO function operates, and switching operation stops.
J: When VCC pin (pin 6) voltage > VUVLO1, the VCC UVLO function is canceled and the DC/DC operation starts.
K: The same as I.
L: The same as J.
M: The same as K.
N: High voltage line VH is reduced. Then VCC pin voltage drops because IC cannot charge the power to VCC pin.
O: When VCC < VUVLO2, the VCC UVLO function operates.
P: When VCC ＞ VUVLO, start-up circuit stops, and the switching operation re-starts.
・Capacitance value of VCC pin
To ensure stable operation of the IC, set the VCC pin capacitance value to 10 uF or above.
If the capacitor for the VCC pin is too large, it will delay the response of the VCC pin to secondary output. In cases where
the transformer has a low degree of coupling, a large surge can be generated at the VCC pin, which may damage the IC. In
such cases, insert a resistance of 10 Ω to 100 Ω on a bus between the diode and capacitor after the auxiliary winding. As
for constants, perform a waveform evaluation of the VCC pin and enter settings that will prevent any surge at the VCC pin
from exceeding the absolute maximum rating for the VCC pin.
・VCC OVP voltage protection settings for increased secondary output
The VCC pin voltage is determined by the secondary output and the transformer ratio (Np:Ns).
Accordingly, when secondary output has become large, it can be protected by VCC OVP.
The VCC OVP protection settings are as follows.
Vout
Np
Ns
Nb
Figure 12 VCC OVP Settings
This is determined by VCC voltage = Vout x Nb/Ns.
(Vout: Secondary output, Nb: auxiliary winding turns, Ns: secondary winding turns).
When secondary output voltage rises 30% high, and protection is desired, set the number of winding turns so that 1.3 x
Vout x (Nb/Ns) ＞ VOVP1.
For VCC OVP protection, since there is the TLATCH (typ = 100 us) blanking time, VCC OVP protection cannot be detected for
instantaneous surges at the VCC pin.
However, VCC OVP is detected when the VCC pin voltage has become higher than VOVP1 for at least the TLATCH period,
such as due to the impact of a low degree of transformer couplings, so an application evaluation should be done to check
this before setting VCC OVP.
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(4) ACMONI pin protection function
ACMONI(1pin) pin is for brown-out protection. When AC voltage falls, the brown-out function stops switching operation.
The usage is shown in Figure 13. The voltage divide AC voltage by resistors is applied to ACMONI pin.
When ACMONI pin voltage exceeds VACOMONI (1.0Vtyp), IC detects normal state, and IC starts switching operation.
The release condition of this function is different by DC detection and AC detection. (Fig-13 shows AC detection method)
In DC detection, ACMONI pin voltage is lower than VACMONI2（0.7V typ） after switching operation, the internal timer of ＩＣ
starts to operate. When the status which ACMONI pin voltage is lower than VACMONI2 （ 0.7V typ ） continues for
TACMONI1(typ=256ms), the switching operation stops. In AC detection, when the status which ACMONI pin voltage is lower
than VACMONI1（1.0V typ） continues for TACMONI1(typ=256ms), the switching operation stops.
For that, even if AC voltage temporary disappearance occurs, the switching operation continues within TACMONI1(typ=256ms)
period.
+
FUSE
AC
85-265Vac
-
Discharge
AC monitor
ERROR
AMP
RH
RL
Figure 13. Application circuit
The detection value of brown-out sets by external resistors of AMMONI pin.
The setting method is below:
○The setting : When AC line voltage is higher than the voltage “VHstart”, IC starts to operate
VHstart value is calculated by below equation.
*VACMONI1=1.0V
VHstart=(RH+RL)/RL×VACMONI1
Please set RH and RL by the equation.
Then brown-out protection voltage “VHend” is calculated by below equation.
*VACMONI1=0.7V
VHend=(RH+RL)/RL×VACMONI2
When brown-out function does not use, ACMONI pin voltage needs to be set the voltage from 1.3V to 5.0V
As the applied method, apply from outside or apply the voltage divided resistors from VCC.
Vout
Np
Ns
Nb
Figure 14. The setting of ACMONI pin in the case not to use brown-out function
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(5) DC/DC driver (PWM comparator, frequency hopping, slope compensation, OSC, burst)
(5-1) PWM basic operations
Figure 15 shows a PWM basic block diagram and Figure 16 illustrates PWM basic operations.
Ip
Figure 15. Block Diagram of IC Internal PWM Operations
Figure 16. PWM Basic Operations
A: A SET signal is output from the oscillator in the IC, and the MOSFET is turned ON.
At that time, the capacitance between the MOSFET drain and source becomes discharged, and noise is
generated at the CS pin.
This noise is called the leading edge.
This IC has a built-in filter for this noise. (See (6).)
As a result of this filter and delay time, the minimum pulse width of the IC is 400 ns (typ).
Afterward, current flow to the MOSFET and the Vcs = Rs * Ip voltage is applied to the CS pin.
B: When CS pin voltage rises greater than the FB pin voltage/Gain (typ = 4) or the overcurrent detection
voltage Vcs, the RESET signal is output and OUT is turned off.
C: There is a delay time Tondelay between time point B and actual turn-off. This time results from differences in
maximum power that occur based on the AC voltage. This IC includes a function that suppresses these
differences. (See (5-4).)
D: The energy that accumulates in the transformer during Ton status is discharged to the secondary side, and the
drain voltage starts to oscillate freely based on the transformer Lp value and the MOSFET Cds (drain-source
capacitance).
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E: Since the switching frequency within the IC is predetermined, SET signal output from the internal oscillator occurs
for a set period starting from point A, and the MOSFET is turned on.
(5-2) Frequency operations
Figure 17. PWM Operations in IC
The PWM frequency is generated by the OSC block (internal oscillator) in Figure 17.
This oscillator has a switching frequency hopping function and the switching frequency fluctuates such as is shown in
Figure 18.
The fluctuation cycle is 125 Hz. Due to this frequency hopping function, the frequency spectrum is dispersed and the
frequency spectrum peak is lowered. This increases the margin for EMI testing.
Switching Frequency
[kHz]
500us
106
100
94
125 Hz(8ms)
Time
Figure 18. Frequency Hopping Function
In Figure 18, the duty is calculated as Ton * Switching frequency * 100. The maximum duty value is Dmax (typ = 75%).
Since the PWM current mode method is being used, if the duty exceeds 50% sub harmonic oscillation may occur. 22
mV/us slope compensation is built in as a countermeasure to this.
To reduce power consumption when there is a light load, a burst mode circuit and frequency reduction circuit are built in.
These operations are illustrated in Figure19. As shown in this figure, frequency fluctuates according to the FB voltage.
If the FB voltage is in the range shown for mode2, switching loss is reduced by reducing internal oscillations based on the
FB voltage.
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Figure 19. Operation with FB pin voltage
・mode1:
・mode2:
・mode3:
・mode4:
Burst operation
Frequency reduction operation (reduces maximum frequency.)
Fixed frequency operation (operates at maximum frequency.)
Overload operation (overload status is detected and pulse operation is stopped.)
(5-3) Overcurrent detection operation
RFB (30 kΩ.typ) is used as pull-up resistance for the FB pin with regard to the internal power supply (4.0 V).
When the load of the secondary output voltage (secondary load power) changes, the photo-coupler current changes, and
so the FB pin voltage also changes.
FB voltage VFB is determined by the equation FB voltage = 4 V - IFB. (IFB: photo coupler current)
For example, when the load becomes heavier, the FB current is reduced, so the FB voltage rises.
When the load becomes lighter, the FB current is increased, so the FB voltage drops.
In this way, secondary voltage is monitored by the FB pin.
As the FB pin voltage is monitored, if the load becomes lighter (if FB voltage drops), a burst mode operation or frequency
reduction operation is executed.
Figure 20 shows the CS detection voltage with regard to FB voltage.
⊿CS/⊿FB Gain : 1/4
Figure 20 FB Voltage vs CS Voltage Characteristics
When FB voltage is less than 2.0 V or when the CS voltage exceeds the FB voltage / Gain (typ = 4), the MOSFET is
turned off.
(See time point C in Figure 16.)
When the FB voltage exceeds 2.0 V, the CS voltage = Vcs + Kcs * Ton. Kcs * Ton depends on AC voltage compensation.
(See 5-4.)
Therefore, peak current Ip is determined as Ip = Vcs1 / Rs.
The current value for the MOSFET should be set with a margin with regard to the Ip value obtained from this formula.
2
Maximum power is determined as Pmax = 1/2 x Lp x Ip x Fsw. (Lp: primary inductance value, Ip: primary peak current,
Fsw: switching frequency)
Vcs1 is determined as Vcs1 = Vcs (typ = 0.4 V) + Kcs (typ = 20) * Ton + Vdelay.
Vdelay is the amount of CS voltage increase during the delay time Rondelay between B and C in Figure 16.
This is calculated as Vdelay = Vin / Lp * Tondelay * Rs.
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(5-4) AC voltage dependent compensation of overcurrent limiter
This IC has an AC voltage compensation function on chip. This function performs compensation for AC voltage by
increasing the level of the overcurrent limiter over time. In the equation below, (A) and (B) are assigned values similar to
those for AC 100 V and AC 200 V to perform compensation.
Vcs1 = Vcs (typ = 0.4 V) + Kcs (typ = 20) *Ton + Vdelay
(A)
(B)
These operations are shown in Figures 21, 22, and 23.
When there is no AC voltage
compensation, the peak current
becomes offset during the
response time.
Figure 21.
Without AC Voltage Compensation Function
Figure 22.
With AC Voltage Compensation Function
Primary peak current that flows during overload mode is defined as follows.
Primary peak current Ipeak = Vcs/Rs + Kcs * Ton/Rs + Vin/Lp * Tondelay
Vcs:
Overcurrent limiter voltage in IC
Current detection resistor
Rs:
Vin:
Input DC voltage
Primary peak current
Lp:
Tondelay: Delay time after overcurrent limiter detection
Figure 23. Overcurrent Limiter Voltage
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(6) L.E.B period
When the driver MOSFET is turned on, a surge current is generated at time point A in Figure 16.
At that time, the CS voltage (pin 4) rises, which may cause detection errors in the overcurrent limiter circuit.
To prevent these detection errors, the OUT pin in this IC is switched from low to high and the CS voltage (pin 4) is
masked for 250 ns by the built-in L.E.B. function (Leading Edge Blanking function).
This blanking function can reduce the CS pin noise filter for the noise that is generated when switching the OUT pin from
low to high.
However, if the CS pin noise does not stay within this 250 ns period, an RC filter should be applied to this pin, such as
is shown in Figure 24. At this time, a delay time occurs due to the RC filter when the CS pin is detected.
Even if there is no filter, attachment of RCS as a surge countermeasure is recommended.
The recommended resistance for Rcs is 1 kΩ. When a filter ring is desired, use Ccs to adjust for this resistance.
Figure24. Circuits Peripheral to the CS Pin
(7) CS pin open protection
When the CS pin (pin 4) has become an open pin, transient heat (due to noise, etc.) occurs in the IC, which may become
damaged.
An open protection circuit has been built in to prevent such damage. (Auto recovery protection)
VCCOVP
Timeout
Bottom det
OR
POUT
AND
S
Q
FBOLP_OH AND
5 OUT
PRE
Driver
NOUT
R
VREF(4V)
1MΩ
CURRENT SENSE
Leading
Edge
Blanking
(V-V Change)
Normal : ×1.0
3
CS
RS
Figure 25. CS Pin Peripheral Circuit
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(8) Output overload protection function (FB OLP comparator)
As is shown in mode4 of Figure 20, when the FB pin voltage rises to above a certain value, it is called an overload
condition.
The output overload protection function stops switching operations when mode4 has an overload condition.
During an overload condition, the output voltage drops and so current no longer flows to the photo coupler while the FB
voltage (pin 2) rises.
When the FB voltage (pin 2) exceeds VFOLP1A (2.8 V typ) continuously for TFOLP2 (64 ms typ), it is judged as an overload
condition and switching is stopped.
While the FB pin (pin 2) exceeds VFOLP1A (2.8 V typ), if the FB pin (pin 2) voltage drops below VFOLP1B (2.6 V typ) during the
TFOLP (64 ms typ) period, the overload protection timer is reset. Switching operation are performed during the TFOLP (64
ms typ) period. At startup, the FB pin (pin 2) voltage is pulled up by a resistance to the IC internal voltage, and operations
start when the voltage reaches VFOLP1A (2.8 V typ) or above. Therefore, at startup the start time of secondary output
voltage must be set so that the FB voltage (pin 2) drops to VFOLP1B (2.6 V typ) or below within the TFOLP (64 ms typ) period.
Once FBOLP is detected, the switching operation stops, and VCC voltage falls down because secondary output voltage
falls down. When VCC voltage is lower than Vuvlo2(8.2V.typ), IC is reset, and IC starts by starter circuit shown in (1).
The switching stop time is calculated by VCC pin voltage and VCC capacitor and Icc current
Stop time : Tstop
Tstop=Cvcc*(VCC – Vuvlo2) / Icc
Figure 26. Overload Protection (Auto Recovery)
A: Since FB > VFOLP1A, the FBOLP comparator detects an overload.
B: When FB<VFOLP1B within TFOLP（typ=64ms） period, FB overload detection is released, and FBOLP timer is reset.
C: Since FB > VFOLP1A, the FBOLP comparator detects an overload.
D: When the condition at C continues for TFOLP (typ = 64 ms), switching is stopped by the overload protection function.
As switching operation stops, VCC pin voltage falls down because output voltage falls down.
E: When VCC pin voltage < VUVLO2, IC is reset by VCC UVLO function, and start-up circuit operates.
F: When VCC pin voltage > VUVLO1, VCC UVLO is released, and switching operation starts.
G: Because secondary output voltage is stable, VCC pin voltage is also stable.
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(9-1) OUT pin clamp function
To protect the external MOSFET, the high voltage level of the OUT pin (pin 5) is clamped to VOUTH (typ = 12.5 V).
The VCC pin (pin 6) voltage is raised to prevent MOSFET gate damage. (Shown in Figure27.)
Figure 27. OUT Pin (Pin 5) Schematic
(9-2) OUT pin driver circuit
Figure 28. OUT Pin (Pin 5) Driver Circuit
Switching noise that occurs when OUT is turned on or off may cause EMI-related problems.
In such cases, the MOSFET turn-on time and turn-off time must be delayed.
However, when the turn off time is delayed, switching loss increases.
Figure 28 shows a delay circuit for the OUT pin. In Figure 28, ① is valid during both turn-on and turn-off operations.
② shows a delay in the turn-on only, while turn-off is accelerated.
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(10)
Caution points for board layout pattern
Figure 29. Board Layout Pattern
・Caution points
① The red lines shown in Figure 29 are large current pathways. In the layout, these should be as short as possible since
they can cause ringing, dissipation, etc.
Also, any loops that occur in the red line should be made as small as possible in this layout.
② The orange lines in the secondary side of Figure 29 should also be made short and thick like the red lines and
should be made with small loops in this layout.
③ Be sure to implement grounding for the red lines, brown lines, blue lines, and green lines.
④ The green lines are pathways for surges on the secondary side to escape to the primary side, and since a large
current may flow instantaneously, they should be laid out independently of the red lines and blue lines.
⑤ The blue lines are GND lines for IC control. They do not have any large current flow, but they are susceptible to noise
effects, so they should be laid out independently of the red lines, green lines, and brown lines.
⑥ The brown lines are current pathways for the VCC pin. A current flows on these lines during switching, so they should
also be laid out independently.
⑦ Do not route any IC control lines directly under the transformer, since they may be affected by magnetic flux.
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BM1P105FJ
(Application circuit example)
ACIN_L
F1
3.15A
AC250V
LP01
C21
2200pF/Y1
C2
0.22uF/X2
DA1
800V 10A
AC90V
-264V
ACIN_N
T1
10,11,12
1
R6
47k
2W
C3
450V
100uF
C1
0.22uF/X2
24V
2A
D3
FRD
800V 0.5A
D4
SBD 60V
1A
D1
800V 0.1A
R7
10
R8
150
Vout
C4
2200pF
500V
7,8,9
3
Q1
800V 5A
D2
800V 0.1A
D6
FRD
300V 5A
C11
35V
470uF
C12
35V
470uF
GND
R9
100k
R10
0.18
1W
R11
1k
4
R1
10k
R2
10k
C6
50V
10uF
R3
3.9M
R12
10
D5
200V 0.5A
IC1
BM1P061FJ
R15
2k
R16
1k
5
R4
short
R5
39k
R17
120k
R18
9.1k
C20
2200pF/Y1
C8
47pF
PC1
PC81
7
C7
1000pF
4
1
3
2
C10
0.1uF
U2
TL431
R20
12k
R19
15k
Figure 30. Application Circuit Example
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Datasheet
BM1P105FJ
● Operation modes of protection circuit
Table 3 lists the operation mode of each protection function.
Table 3. Operation Modes of Protection Circuit
Function
Operation mode
VCC Undervoltage Locked Out
Auto recovery
VCC Overvoltage Protection
Auto recovery (with 100-us timer)
FB Over Limited Protection
Auto recovery (with 64-us timer)
CS OPEN Protection
Auto recovery (with 100-us timer)
● Sequence
The sequence for this IC is shown in Figure 31.
A transition to OFF mode occurs under all conditions when VCC exceeds 8.2 V.
OFF MODE
Soft Start1
Soft Start2
Soft Start3
VCC OVP
( Pulse Stop)
Soft Start4
CS OPEN MODE
( Pulse Stop)
Normal MODE
OLP MODE
( Pulse Stop)
Burst & Low Power MODE
Figure 31. Sequence Diagram
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● Thermal loss
In the thermal design, set operations for the following conditions.
(The temperature shown below is the guaranteed temperature, so be sure that a margin is taken into account.)
1. Ambient temperature Ta must be 85°C or less.
2. IC loss must be within the allowable dissipation Pd.
The thermal abatement characteristics are follows. (PCB: 70 mm x 70 mm x 1.6 mm, when mounted on glass epoxy
substrate)
1000
900
800
700
Pd[mW]
600
500
400
300
200
100
0
0
25
図-19
50
75
SOP8 熱軽減特性
Ta[℃]
100
125
150
Figure 32. Thermal Abatement Characteristics
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Operational Notes
1.
Reverse Connection of Power Supply
Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when
connecting the power supply, such as mounting an external diode between the power supply and the IC’s power
supply pins.
2.
Power Supply Lines
Design the PCB layout pattern to provide low impedance supply lines. Separate the ground and supply lines of the
digital and analog blocks to prevent noise in the ground and supply lines of the digital block from affecting the analog
block. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and
aging on the capacitance value when using electrolytic capacitors.
3.
Ground Voltage
Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition.
4.
Ground Wiring Pattern
When using both small-signal and large-current ground traces, the two ground traces should be routed separately but
connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal
ground caused by large currents. Also ensure that the ground traces of external components do not cause variations
on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance.
5.
Thermal Consideration
Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in
deterioration of the properties of the chip. The absolute maximum rating of the Pd stated in this specification is when
the IC is mounted on a 70mm x 70mm x 1.6mm glass epoxy board. In case of exceeding this absolute maximum
rating, increase the board size and copper area to prevent exceeding the Pd rating.
6.
Recommended Operating Conditions
These conditions represent a range within which the expected characteristics of the IC can be approximately obtained.
The electrical characteristics are guaranteed under the conditions of each parameter.
7.
Inrush Current
When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush
current may flow instantaneously due to the internal powering sequence and delays, especially if the IC
has more than one power supply. Therefore, give special consideration to power coupling capacitance,
power wiring, width of ground wiring, and routing of connections.
8.
Operation Under Strong Electromagnetic Field
Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction.
9.
Testing on Application Boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may
subject the IC to stress. Always discharge capacitors completely after each process or step. The IC’s power supply
should always be turned off completely before connecting or removing it from the test setup during the inspection
process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during
transport and storage.
10. Inter-pin Short and Mounting Errors
Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in
damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin.
Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and
unintentional solder bridge deposited in between pins during assembly to name a few.
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Operational Notes – continued
11.
Unused Input Pins
Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and
extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small
charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and
cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the
power supply or ground line.
12. Regarding the Input Pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example (refer to figure below):
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to
operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should
be avoided.
Figure 31. Example of monolithic IC structure
13.
Ceramic Capacitor
When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with
temperature and the decrease in nominal capacitance due to DC bias and others.
14. Area of Safe Operation (ASO)
Operate the IC such that the output voltage, output current, and power dissipation are all within the Area of Safe
Operation (ASO).
15. Thermal Shutdown Circuit(TSD)
This IC has a built-in thermal shutdown circuit that prevents heat damage to the IC. Normal operation should always
be within the IC’s power dissipation rating. If however the rating is exceeded for a continued period, the junction
temperature (Tj) will rise which will activate the TSD circuit that will turn OFF all output pins. When the Tj falls below
the TSD threshold, the circuits are automatically restored to normal operation.
Note that the TSD circuit operates in a situation that exceeds the absolute maximum ratings and therefore, under no
circumstances, should the TSD circuit be used in a set design or for any purpose other than protecting the IC from
heat damage.
16. Over Current Protection Circuit (OCP)
This IC incorporates an integrated overcurrent protection circuit that is activated when the load is shorted. This
protection circuit is effective in preventing damage due to sudden and unexpected incidents. However, the IC should
not be used in applications characterized by continuous operation or transitioning of the protection circuit.
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Datasheet
BM1P105FJ
● Part Number selection
B
M
1
P
1
0
5
F
J
Package
FJ: SOP-J8
Part name
● Marking diagram
-
E2
Packaging and forming specifications
E2: Reel type embossed tape
● Line-up
1PIN MARK
1P105
LOT No.
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Model name
(BM1PXXXFJ)
BM1P061FJ
BM1P062FJ
BM1P063FJ
BM1P064FJ
BM1P065FJ
BM1P066FJ
BM1P067FJ
BM1P068FJ
BM1P101FJ
BM1P102FJ
BM1P103FJ
BM1P104FJ
BM1P105FJ
BM1P106FJ
BM1P107FJ
BM1P108FJ
TSZ02201-0F2F0A200170-1-2
2.Oct.2013.Rev.001
Datasheet
BM1P105FJ
Physical Dimension, Tape and Reel Information
Package Name
SOP-J8
<Tape and Reel information>
Tape
Embossed carrier tape
Quantity
2500pcs
Direction
of feed
E2
The direction is the 1pin of product is at the upper left when you hold
( reel on the left hand and you pull out the tape on the right hand
Direction of feed
1pin
Reel
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)
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Revision History
Date
Revision
20.Jan.2014
001
Changes
New Release
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Datasheet
Notice
Precaution on using ROHM Products
1.
Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment,
OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you
(Note 1)
, transport
intend to use our Products in devices requiring extremely high reliability (such as medical equipment
equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car
accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or
serious damage to property (“Specific Applications”), please consult with the ROHM sales representative in advance.
Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any
damages, expenses or losses incurred by you or third parties arising from the use of any ROHM’s Products for Specific
Applications.
(Note1) Medical Equipment Classification of the Specific Applications
JAPAN
USA
EU
CHINA
CLASSⅢ
CLASSⅡb
CLASSⅢ
CLASSⅢ
CLASSⅣ
CLASSⅢ
2.
ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor
products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate
safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which
a failure or malfunction of our Products may cause. The following are examples of safety measures:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure
3.
Our Products are designed and manufactured for use under standard conditions and not under any special or
extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way
responsible or liable for any damages, expenses or losses arising from the use of any ROHM’s Products under any
special or extraordinary environments or conditions. If you intend to use our Products under any special or
extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of
product performance, reliability, etc, prior to use, must be necessary:
[a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents
[b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust
[c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2,
H2S, NH3, SO2, and NO2
[d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves
[e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items
[f] Sealing or coating our Products with resin or other coating materials
[g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of
flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning
residue after soldering
[h] Use of the Products in places subject to dew condensation
4.
The Products are not subject to radiation-proof design.
5.
Please verify and confirm characteristics of the final or mounted products in using the Products.
6.
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
7.
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual
ambient temperature.
8.
Confirm that operation temperature is within the specified range described in the product specification.
9.
ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in
this document.
Precaution for Mounting / Circuit board design
1.
When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product
performance and reliability.
2.
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
ROHM representative in advance.
For details, please refer to ROHM Mounting specification
Notice - GE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
Precautions Regarding Application Examples and External Circuits
1.
If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the
characteristics of the Products and external components, including transient characteristics, as well as static
characteristics.
2.
You agree that application notes, reference designs, and associated data and information contained in this document
are presented only as guidance for Products use. Therefore, in case you use such information, you are solely
responsible for it and you must exercise your own independent verification and judgment in the use of such information
contained in this document. ROHM shall not be in any way responsible or liable for any damages, expenses or losses
incurred by you or third parties arising from the use of such information.
Precaution for Electrostatic
This Product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. Please take proper
caution in your manufacturing process and storage so that voltage exceeding the Products maximum rating will not be
applied to Products. Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron,
isolation from charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
Precaution for Storage / Transportation
1.
Product performance and soldered connections may deteriorate if the Products are stored in the places where:
[a] the Products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] the temperature or humidity exceeds those recommended by ROHM
[c] the Products are exposed to direct sunshine or condensation
[d] the Products are exposed to high Electrostatic
2.
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using Products of which storage time is
exceeding the recommended storage time period.
3.
Store / transport cartons in the correct direction, which is indicated on a carton with a symbol. Otherwise bent leads
may occur due to excessive stress applied when dropping of a carton.
4.
Use Products within the specified time after opening a humidity barrier bag. Baking is required before using Products of
which storage time is exceeding the recommended storage time period.
Precaution for Product Label
QR code printed on ROHM Products label is for ROHM’s internal use only.
Precaution for Disposition
When disposing Products please dispose them properly using an authorized industry waste company.
Precaution for Foreign Exchange and Foreign Trade act
Since our Products might fall under controlled goods prescribed by the applicable foreign exchange and foreign trade act,
please consult with ROHM representative in case of export.
Precaution Regarding Intellectual Property Rights
1.
All information and data including but not limited to application example contained in this document is for reference
only. ROHM does not warrant that foregoing information or data will not infringe any intellectual property rights or any
other rights of any third party regarding such information or data. ROHM shall not be in any way responsible or liable
for infringement of any intellectual property rights or other damages arising from use of such information or data.:
2.
No license, expressly or implied, is granted hereby under any intellectual property rights or other rights of ROHM or any
third parties with respect to the information contained in this document.
Other Precaution
1.
This document may not be reprinted or reproduced, in whole or in part, without prior written consent of ROHM.
2.
The Products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written
consent of ROHM.
3.
In no event shall you use in any way whatsoever the Products and the related technical information contained in the
Products or this document for any military purposes, including but not limited to, the development of mass-destruction
weapons.
4.
The proper names of companies or products described in this document are trademarks or registered trademarks of
ROHM, its affiliated companies or third parties.
Notice - GE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.002
Datasheet
General Precaution
1. Before you use our Pro ducts, you are requested to care fully read this document and fully understand its contents.
ROHM shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny
ROHM’s Products against warning, caution or note contained in this document.
2. All information contained in this docume nt is current as of the issuing date and subj ect to change without any prior
notice. Before purchasing or using ROHM’s Products, please confirm the la test information with a ROHM sale s
representative.
3.
The information contained in this doc ument is provi ded on an “as is” basis and ROHM does not warrant that all
information contained in this document is accurate an d/or error-free. ROHM shall not be in an y way responsible or
liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or
concerning such information.
Notice – WE
© 2014 ROHM Co., Ltd. All rights reserved.
Rev.001
Datasheet
BM1P105FJ - Web Page
Part Number
Package
Unit Quantity
Minimum Package Quantity
Packing Type
Constitution Materials List
RoHS
BM1P105FJ
SOP-J8
2500
2500
Taping
inquiry
Yes