EVALUATION KIT AVAILABLE MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module General Description The MAXM17514 is a fixed-frequency, step-down power module in a thermally-efficient system-in-package (SiP) package that operates from a 2.4V to 5.5V input supply voltage and supports output currents up to 4A. The device includes switch-mode power-supply controller, dual nMOSFET power switches, a fully shielded inductor, as well as compensation components. The device supports 0.75V to 3.6V programmable output voltage. The high level of integration significantly reduces design complexity, manufacturing risks, and offers a true plugand-play power-supply solution, reducing the time to market. The MAXM17514 is available in a thermally enhanced, compact 28-pin, 10mm x 6.5mm x 2.8mm SiP package and can operate over the -40°C to +125°C industrial temperature range. Applications ● ● ● ● ● ● FPGA and DSP Point-of-Load Regulator Base Station Point-of-Load Regulator Industrial Control Equipment Servers ATE Equipment Medical Equipment OUT OUT OUT IN 22µF PGND PGND PGND PGND PGND PGND PGND IN MAXM17514 IN VOUT 1.1V, 4A OUT VCC OUT OUT VCC OUT OUT EN 220µF 22µF (OPTIONAL) 22.1kΩ FB GND 19-7430; Rev 1; 4/15 GND GND POK ●● Saves Board Space in Space-Constrained Applications • Small Form Factor 6.5mm x 10mm x 2.8mm SiP Package • Simplified PCB Design with as Few as Four External Components ●● Offers Flexibility for Power-Design Optimization • 2.4V to 5.5V Input Voltage Range • 0.75V to 3.6V Programmable Output Voltage • 4A Output Current • Fixed 1MHz Switching Frequency • Enable Input • Power-Good Output ●● Operates Reliably and Reduces System Downtime • Voltage-Controlled Internal Soft-Start • Fault Protection • Output Undervoltage/Overvoltage Protection • Thermal-Fault Protection • Peak Current Limit • -40°C to +125°C Operation Typical Application Circuit IN ●● Reduces Design Complexity, Manufacturing Risks, and Time-to-Market • Complete Integrated Step-Down Power Supply in a Single Package • Passes EN55022 (CISPR22) Class-B Radiated and Conducted EMI Standard ●● Reduces Power Dissipation • Up to 94% Efficiency • Autoswitch, Light-Load, Pulse-Skipping Mode • High Impedance Shutdown • < 1μA Shutdown Current Ordering Information appears at end of data sheet. VIN 5V Benefits and Features 47.5kΩ MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module Absolute Maximum Ratings IN to PGND..............................................................-0.3V to +6V VCC to GND.............................................................-0.3V to +6V VCC to IN..................................................................-0.3V to +6V EN to GND...............................................................-0.3V to +6V FB, POK to GND....................................... -0.3V to (VCC + 0.3V) OUT, EP3 to GND.......................................-0.6V to (VIN + 0.3V) PGND to GND.......................................................-0.3V to +0.3V EP1 to GND..........................................................-0.3V to +0.3V EP2 to PGND.......................................... -0.3V to + (VIN + 0.3V) EP2 to GND............................................ -0.6V to + (VIN + 0.3V) Continuous Power Dissipation (TA = +70°C) 28-Pin SIP (derate 37mW/°C above +70°C) .............2000mW Operating Temperature Range.......................... -40°C to +125°C Junction Temperature.......................................................+125°C Storage Temperature Range............................. -55°C to +150°C Lead Temperature (soldering, 10s).................................. +245°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Package Thermal Characteristics (Note 1) SiP Junction-to-Ambient Thermal Resistance (qJA)...........25°C/W Junction-to-Case Thermal Resistance (qJC)..................6°C/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. Electrical Characteristics (VIN = VCC = VEN = 5V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C, unless otherwise noted. See Typical Application Circuit.) (Note 2) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS INPUT SUPPLY (VIN) IN Input Voltage Range VIN IN Undervoltage Threshold IN Standby Supply Current IQ 2.4 5.5 VIN = VCC 4.5 5.5 Rising edge (100mV hysteresis) 2.05 VIN = VCC = 4.5V, no load V 2.19 2.4 V 1 5.5 μA 5.5 V 4.2 4.5 V VCC SUPPLY VCC Input Voltage Range VCC VCC Undervoltage Threshold 4.5 Rising edge (160mV hysteresis) 3.9 IVCC_SHD EN = GND, POK unconnected, measured at VCC, TA = +25°C 0.1 1.0 μA IVCC Regulator enabled, no load, no switching (VFB = 1V) 62 135 μA VOUT VIN = VCC = 5.2V, ILOAD = 2A (see derating curve for VOUT > 2.5V) 0.754 3.6 V Unity Gain Output-Voltage Tolerance/FB accuracy FB = OUT, no load 0.757 0.770 0.783 V FB Load Regulation Accuracy (RDROOP) 2A < IOUT < 4A, FB = OUT -7.5 -4.4 -1 mV/A FB Line Regulation Accuracy FB = OUT, no load, 2.4V < VIN < 5.5V 1.253 4.5 mV/V FB Input Bias Current TA = -40°C to +125°C (Note 3) -0.015 +0.1 μA VCC Shutdown Supply Current VCC Supply Current OUTPUT Output Voltage Programmable Range www.maximintegrated.com -0.1 Maxim Integrated │ 2 MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module Electrical Characteristics (continued) (VIN = VCC = VEN = 5V, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C, unless otherwise noted. See Typical Application Circuit.) (Note 2) PARAMETER SYMBOL Average Output Current Limit CONDITIONS VIN = 5V MIN TYP 4 MAX UNITS 8 A EFFICIENCY Efficiency VIN = 5V, VOUT = 1.1V, IOUT = 2A 86 VIN = 5V, VOUT = 1.1V, IOUT = 4A 80 % SWITCHING FREQUENCY Switching Frequency fSW 0.9 1 1.1 MHz SOFT-START Soft-Start Ramp Time Soft-Start Fault Blanking Time tSS 1.79 ms tSSLT 3 ms POWER-GOOD OUTPUT (POK) POK Upper Trip Threshold and Overvoltage-Fault Threshold Rising edge, 50mV hysteresis 830 850 870 mV POK Lower Trip Threshold Falling edge, 50mV hysteresis 658 690 725 mV 0.1 1 μA POK Leakage Current IPOK TA = +25°C, VPOK = 5.5V POK Propagation Delay Time tPOK FB forced 50mV beyond POK trip threshold 2 μs POK Output Low Voltage ISINK = 3mA 100 mV Overvoltage-Fault Latch-Delay Time FB forced 50mV above POK upper-trip threshold 2 μs Undervoltage-Fault Latch-Delay Time FB forced 50mV below POK lower-trip threshold, TUV 1.6 ms LOGIC INPUTS EN Input High Threshold Rising, hysteresis = 215mV (typ) EN Input Leakage Current TA = +25°C 1.0 1.4 1.6 V 0.1 1 μA THERMAL SHUTDOWN Thermal-Shutdown Threshold TSHDN Hysteresis = 15°C +160 °C Note 2: Limits are 100% tested at TA = +25°C. Maximum and minimum limits are guaranteed by design and characterization over temperature. Note 3: Design guaranteed by ATE characterization. Limits are not production tested. www.maximintegrated.com Maxim Integrated │ 3 MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module Typical Operating Characteristics (VCC = 5V, VIN = 3.3V - 5V, VOUT = 0.9V - 3.3V, IOUT = 0–4A, TA = +25°C, unless otherwise noted.) EFFICIENCY vs. OUTPUT CURRENT 100 toc01 100 VOUT = 2.5V 95 80 VOUT = 1.2V 75 VOUT = 0.9V 70 0.765 85 80 VOUT = 1.8V VOUT = 1.2V 75 65 1000 VIN = 5.0V VCC = 5.0V 100 toc04 VOUT = 1.2V VCC = 5.0V 1.810 1.790 VIN = 5.0V 1.780 1.770 0.5 1.0 1.5 VIN = 3.3V 2.5 3.0 3.5 4.0 1.730 0.5 4.0 toc06 2.440 1.0 1.5 VIN = 3.3V 2.0 2.5 3.0 3.5 4.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 OUTPUT CURRENT (A) INPUT VOLTAGE RIPPLE VIN = 5V, VOUT = 1.2V, IOUT = 4A toc07 10mV/div (ACCOUPLED) 1us/div 3.5 VIN = 5.0V OUTPUT CURRENT (A) VOUT www.maximintegrated.com 2.460 2.380 0.0 OUTPUT CURRENT (A) OUTPUT VOLTAGE RIPPLE VIN = 5V, VOUT = 1.2V, IOUT = 4A 3.0 2.400 1.740 2.0 2.5 VOUT = 2.5V VCC = 5.0V 2.420 1.750 VIN = 3.3V 2.0 2.480 1.760 1.160 1.5 2.500 VOUT (V) VOUT (V) 1.170 0.0 1.0 2.520 VOUT = 1.8V VCC = 5.0V 1.820 VIN = 5.0V 1.150 0.5 LOAD REGULATION VOUT = 2.5V toc05 1.800 1.180 0.0 OUTPUT CURRENT (A) LOAD REGULATION VOUT = 1.8V 1.830 1.190 VOUT (V) 0.735 OUTPUT CURRENT (mA) LOAD REGULATION VOUT = 1.2V 1.200 VIN. = 3 3V 0.740 1000 OUTPUT CURRENT (mA) 1.210 VIN = 5.0V 0.755 0.745 65 60 100 0.760 0.750 VOUT = 0.9V 70 VIN = 3.3V VCC = 5.0V toc03 VOUT = 0.75V VCC = 5.0V 0.770 VOUT (V) EFFICIENCY (%) EFFICIENCY (%) VOUT = 1.8V LOAD REGULATION VOUT = 0.75V 0.775 90 85 1.140 toc02 VOUT = 3.3V VOUT = 2.5V 95 90 60 EFFICIENCY vs. OUTPUT CURRENT toc08 50mV/div (ACCOUPLED) VIN 1us/div Maxim Integrated │ 4 MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module Typical Operating Characteristics (continued) (VCC = 5V, VIN = 3.3V - 5V, VOUT = 0.9V - 3.3V, IOUT = 0–4A, TA = +25°C, unless otherwise noted.) LOAD CURRENT TRANSIENT RESPONSE VIN = 5.0V, VOUT = 1.2V, IOUT = 2 TO 4A LOAD CURRENT TRANSIENT RESPONSE VIN = 3.3V, VOUT = 1.2V, IOUT = 2 TO 4A toc10 toc09 2A/div IOUT 2A/div IOUT 50mV/div (ACCOUPLED) VOUT 50mV/div (ACCOUPLED) VOUT 10µs/div 10µs/div LOAD CURRENT TRANSIENT RESPONSE VIN = 3.3V, VOUT = 2.5V, IOUT = 2 TO 4A LOAD CURRENT TRANSIENT RESPONSE VIN = 5.0V, VOUT = 2.5V, IOUT = 2 TO 4A toc11 toc12 2A/div IOUT 50mV/div (ACCOUPLED) VOUT 2A/div IOUT VOUT 50mV/div (ACCOUPLED) 10µs/div 10µs/div STARTUP WAVEFORM VIN = 3.3V, VOUT = 1.2V, IOUT = 0A SHUTDOWN WAVEFORM VIN = 3.3V, VOUT = 1.2V, IOUT = 30mA toc13 toc14 5V/div VEN 5V/div VEN IIN 200mA/div IIN 200mA/div VOUT 500mV/div VOUT 500mV/div VPOK 2V/div VPOK 2V/div 400µs/div www.maximintegrated.com 400µs/div Maxim Integrated │ 5 MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module Typical Operating Characteristics (continued) (VCC = 5V, VIN = 3.3V - 5V, VOUT = 0.9V - 3.3V, IOUT = 0–4A, TA = +25°C, unless otherwise noted.) STARTUP WAVEFORM VIN = 3.3V, VOUT = 1.2V, IOUT = 4A SHUTDOWN WAVEFORM VIN = 3.3V, VOUT = 1.2V, IOUT = 4A toc15 toc16 5V/div VEN 5V/div VEN 2A/div IIN VOUT 500mV/div 2V/div VPOK 2A/div IIN VOUT 500mV/div VPOK 2V/div 400µs/div 400µs/div SHUTDOWN WAVEFORM VIN = 5.0V, VOUT = 1.2V, IOUT = 30mA STARTUP WAVEFORM VIN = 5.0V, VOUT = 1.2V, IOUT = 0A toc18 toc17 5V/div 5V/div VEN VEN 200mA/div IIN 500mV/div IIN 200mA/div VOUT 500mV/div VPOK 2V/div VOUT 2V/div VPOK 400µs/div 400µs/div STARTUP WAVEFORM VIN = 5V, VOUT = 1.2V, IOUT = 4A SHUTDOWN WAVEFORM VIN = 5V, VOUT = 1.2V, IOUT = 4A toc19 toc20 5V/div VEN 2A/div IIN VEN 5V/div IIN 2A/div VOUT 500mV/div VOUT 500mV/div VPOK 2V/div VPOK 2V/div 400µs/div www.maximintegrated.com 400µs/div Maxim Integrated │ 6 MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module Typical Operating Characteristics (continued) (VCC = 5V, VIN = 3.3V - 5V, VOUT = 0.9V - 3.3V, IOUT = 0–4A, TA = +25°C, unless otherwise noted.) LOAD SHORT-CIRCUIT VIN = 5.0V, VOUT = 1.2V, IOUT = 4A LOAD SHORT-CIRCUIT VIN = 5.0V, VOUT = 1.2V, IOUT = 0A toc22 toc21 IOUT 5A/div IOUT IIN 2A/div IIN VOUT 2A/div VOUT 1V/div VPOK 5A/div 2V/div 1V/div 2V/div VPOK 400µs/div 400µs/div OUTPUT CURRENT vs. AMBIENT TEMPERATURE VIN = 5V NO AIR FLOW 4.5 4.0 VOUT = 1.1V 3.5 OUTOPUT CURRENT (A) toc23 3.0 VOUT = 1.8V 2.5 2.0 1.5 VOUT = 3.3V 1.0 0.5 0 50 60 70 80 90 100 110 120 AMBIENT TEMPERATURE (°C) www.maximintegrated.com Maxim Integrated │ 7 MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module IN PGND PGND PGND PGND PGND PGND PGND OUT OUT Pin Configuration 28 27 26 25 24 23 22 21 20 19 MAXM17514 IN 1 18 OUT IN 2 17 OUT EP 1 IN 3 EP 2 EP 3 16 OUT POK 4 9 10 GND GND VCC FB EN 11 12 13 14 OUT 8 OUT 7 N.C. 6 N.C. 5 GND 15 OUT Pin Description PIN NAME FUNCTION 1–3, 28 IN Input Supply Connection. Bypass to GND with a 22µF or 2 x 10µF ceramic capacitor. Supply range for this pin is 4.5V to 5.5V. When VCC can be supplied separately from a 4.5V to 5.5V source, the IN pin can then be powered from a 2.4V to 5.5V supply. 4 POK Open-Drain Power-Good Output. POK is pulled low if FB is more than 12% (typ) above or below the nominal regulation threshold. POK is held low in shutdown. POK becomes high impedance when FB is in regulation range. Pull this pin up with 10kΩ (typ) resistor value. 5–7 GND GND. Connect PGND and GND together at a single point. 8 VCC 5V Bias Supply Input for the Internal Switching Regulator Drivers. For IN from 4.5V to 5.5V, VCC can be connected to the IN supply. For IN supply voltages lower than the above range, VCC should be powered from a separate 5V ±10% supply and bypassed with a 1µF or greater ceramic capacitor. 9 FB Feedback Input for the Internal Step-Down Converter. Connect FB to a resistive divider between OUT and GND to adjust the typical output voltage between 0.765V to 3.6V. Keep equivalent divider resistance lower than 50kΩ. 10 EN Regulator Enable Input. When EN is pulled low, the regulator is disabled. When EN is driven high, the regulator is enabled. 11, 12 N.C. No Connection 13–20 OUT Regulator Output Pins. Connect an output capacitor between OUT and PGND with a 220µF (typ) POSCAP low-ESR capacitor. 21–27 PGND — EP1 Exposed Pad 1. Connect this pad to the PGND ground plane of 1in by 1in copper for cooling. — EP2 Exposed Pad 2. Connect this pad to the PCB for better thermal performance, but do not connect to any other node. Minimize area of copper island. — EP3 Exposed Pad 3. Connect this pad to the OUT pins and the copper area of 1in by 1in. Power GND Return. Connect to GND. www.maximintegrated.com Maxim Integrated │ 8 MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module Functional Diagram MAXM17514 VCC IN 2.2µF 0.1µF EN CURRENT MODE CONTROLLER 1µH OUT 2.2µF POK PGND POK LOGIC GND www.maximintegrated.com FB Maxim Integrated │ 9 MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module Design Procedure The minimum input capacitor required can be calculated by the following equation: Adjusting Output Voltage The MAXM17514 produces an adjustable 0.75V to 3.6V output voltage from a 2.4V to 5.5V input voltage range by using a resistive feedback divider from OUT to FB. The device can deliver up to 4A output current up to an output voltage of 2.5V at +70°C. The output current derates for output voltages above 2.5V. Adjusting the output voltage of the device requires a resistive divider network from OUT to FB, according to the equation below. From the initial output voltage, the loadline regulation reduces the effective feedback voltage by a typical 5mV/A as the output current increases. V R U =× R B OUT − 1 kΩ, where RB is in kΩ. 0.765 Input Voltage Range (IIN_ AVG ) × (1 − D) (∆VIN ) × f SW where: IIN_AVG is the average input current given by: IN_ Avg OUT η × IN D is the operating duty cycle, which is approximately equal to VOUT/VIN where: ∆ VIN is the required input-voltage ripple, fSW is the operating switching frequency, POUT is the output power, which is equal to VOUT x IOUT, η is the efficiency. The maximum value (VIN(MAX)) and minimum value (VIN(MIN)) must accommodate the worst-case conditions accounting for the input voltage soars and drops. If there is a choice at all, lower input voltages result in better efficiency. With a maximum duty cycle of 87.5%, VOUT is limited to 0.875 x VIN. Input Capacitor Selection The input capacitor must meet the ripple-current requirement (IRMS) imposed by the switching currents. The IRMS requirements of the regulator can be determined by the following equation: IRMS = I OUT × D × (1 − D) The worst-case RMS current requirement occurs when operating with D = 0.5. At this point, the above equation simplifies to IRMS = 0.5 x IOUT. VOUT OUT MAXM17514 RU FB RB Figure 1. Adjusting Output Voltage www.maximintegrated.com C IN = For the device’s system (IN) supply, ceramic capacitors are preferred due to their resilience to inrush surge currents typical of systems, and due to their low parasitic inductance, which helps reduce the high-frequency ringing on the IN supply when the internal MOSFETs are turned off. Choose an input capacitor that exhibits less than +10°C temperature rise at the RMS input current for optimal circuit longevity. Output Capacitor Selection The output capacitor selection requires careful evaluation of several different design requirements (e.g., stability, transient response, and output ripple voltage) that place limits on the output capacitance and the effective series resistance (ESR). Based on these requirements, a combination of low-ESR polymer capacitors (lower cost but higher output ripple voltage) and ceramic capacitors (higher cost but low output ripple voltage) should be used to achieve stability with low output ripple. Loop Compensation The gain portion of the loop gain is a result of erroramplifier gain, current-sensing gain, and load with an overall typical value at 1kHz of 36dB at VIN = 5V, and 46dB at VIN = 3V, with a typical limit to the gain-bandwidth (GBW) product of 120,000. The crossover should occur before this error-amplifier bandwidth limit of 120kHz (gain = 1). The output capacitor and load introduces a pole with the worst case at the maximum load (4A). If the load pole location is further than a frequency where the gain exceeds the GBW, the gain drop starts earlier at Maxim Integrated │ 10 MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module the location where the loop gain is limited. This situation applies typically to an output voltage less than 1.8V, so zero frequency from the ESR is needed to increase the phase margin at the crossover frequency. The recommended relationship between ESR and total output capacitance values are shown in Table 1. When a low-ESR type capacitor is used with a ceramic capacitor, a recommended value of 44µF to 100µF ceramic capacitor should be used to make up the total capacitance value with the relationship between ESR and total output capacitance value, such that the zero frequency is between 32kHz and 40kHz. When only a low-ESR type capacitor is used, the zero frequency should be between 62kHz and 80kHz. Optionally, a small 10µF–22µF ceramic capacitor can be used to reduce output ripple. Optionally, for an output greater than or equal to 1.8V, an all-ceramic capacitor solution can be used with a minimum capacitance value that locates the pole location below 1kHz with resistive load (4A), and with a simplified equation given by COUTMIN (µF) = 900/VOUT. Output Ripple Voltage With polymer capacitors, the ESR dominates and determines the output ripple voltage. The step-down regulator’s output ripple voltage (VRIPPLE) equals the total inductor ripple current (ΔIL) multiplied by the output capacitor’s ESR. Therefore, the maximum ESR to meet the output ripple-voltage requirement is: R ESR ≤ VRIPPLE ∆I L where: 1 V − VOUT VOUT = ∆IL IN × × V L f IN SW where fSW is the switching frequency and L is the inductor (1µH). The actual capacitance value required relates to the physical case size needed to achieve the ESR requirement, as well as to the capacitor chemistry. Thus, polymer capacitor selection is usually limited by ESR and voltage rating rather than by capacitance value. With ceramic capacitors, the ripple voltage due to capacitance dominates the output ripple voltage. Therefore, the minimum capacitance needed with ceramic output capacitors is: ∆IL 1 = C OUT × × 8 f V SW RIPPLE Alternatively, combining ceramics (for the low ESR) and polymers (for the bulk capacitance) helps balance the output capacitance vs. output ripple-voltage requirements. Load-Transient Response The load-transient response depends on the overall output impedance over frequency, and the overall amplitude and slew rate of the load step. In applications with large, fast-load transients (load step > 80% of full load and slew rate > 10A/μs), the output capacitor’s high-frequency response (ESL and ESR) needs to be considered. To prevent the output voltage from spiking too low under a load-transient event, the ESR is limited by the following equation (ignoring the sag due to finite capacitance): R ESR ≤ VRIPPLESTEP ∆I OUTSTEP where VRIPPLESTEP is the allowed voltage drop during load current transient, and IOUTSTEP is the maximum load current step. The capacitance value dominates the mid-frequency output impedance and continues to dominate the loadtransient response as long as the load transient’s slew rate is fewer than two switching cycles. Under these Table 1. Output Capacitor Selection vs. ESR TOTAL COUT (µF) LOW-ESR TYPE WITH CERAMIC-TYPE ESR (mΩ) LOW-ESR TYPE WITHOUT CERAMIC-TYPE ESR (mΩ) 250 16–20 8–10 300 13–17 7–9 350 11–14 6, 7 400 10–12 5, 6 450 9–11 4–6 500 8–10 4, 5 550 7–9 4, 5 600 7, 8 3, 4 www.maximintegrated.com Maxim Integrated │ 11 MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module conditions, the sag and soar voltages depend on the output capacitance, inductance value, and delays in the transient response. Low inductor values allow the inductor current to slew faster, replenishing charge removed from or added to the output filter capacitors by a sudden load step, especially with low differential voltages across the inductor. The minimum capacitance needed to handle the sag voltage (VSAG) that occurs after applying the load current can be estimated by the following equation: 1 C OUT_SAG = × VSAG 2 1 L × ∆IOUT STEP + (∆IOUTSTEP × (t sw − ∆T)) 2 (VIN × D MAX ) − VOUT where: DMAX is the maximum duty factor (87.5%), tSW is the switching period (1/fSW), ΔT equals VOUT/VIN x tSW when in PWM mode, or L x IIDLE/(VIN - VOUT) when in Idle Mode (1.5A). The minimum capacitance needed to handle the overshoot voltage (VSOAR) that occurs after load removal (due to stored inductor energy) can be calculated as: C OUT_SOAR ≈ (∆IOUTSTEP ) 2 L 2VOUT VSOAR When the device is operating under low duty cycle, the output capacitor size is usually determined by the COUT_SOAR. Detailed Description The MAXM17514 is a complete step-down switch-mode power-supply solution that can deliver up to 4A output current and up to 3.6V output voltage from a 2.4V to 5.5V input voltage range. The device includes switch-mode power-supply controller, dual n-channel MOSFET power switches, and an inductor. The device uses a fixed-frequency current-mode control scheme. The device provides peak current-limit protection, output undervoltage protection, output overvoltage protection, and thermal protection. The device operates in skip mode at light loads to improve the light-load efficiency. Independent enable and an open-drain power-good output allow flexible system power sequencing. The fixed voltage soft-start reduces the inrush current by gradually ramping up the internal reference voltage. Fixed-Frequency Current-Mode Controller The heart of the current-mode PWM controller is a multistage, open-loop comparator that compares the output voltage-error signal with respect to the reference voltage, the current-sense signal, and the slope-compensation ramp (see the Functional Diagram). The device uses a direct summing configuration, approaching ideal cycle-to-cycle control over the output voltage without a traditional error amplifier and the phase shift associated with it. Light-Load Operation The device features an inherent automatic switchover to pulse skipping (PFM operation) at light loads. This switchover is affected by a comparator that truncates the low-side switch on-time at the inductor current’s zero crossing. The zero-crossing comparator senses the inductor current during the off-time. Once the current through the low-side MOSFET drops below the zerocrossing trip level, it turns off the low-side MOSFET. This prevents the inductor from discharging the output capacitors and forces the switching regulator to skip pulses under light-load conditions to avoid overcharging the output. Therefore, the controller regulates the valley of the output ripple under light-load conditions. The switching waveforms can appear noisy and asynchronous at lightload pulse-skipping operation, but this is a normal operating condition that results in high light-load efficiency. Idle Mode™ Current-Sense Threshold In Idle Mode, the on-time of the step-down controller terminates when both the output voltage exceeds the feedback threshold, and the internal current-sense voltage falls below the Idle Mode current-sense threshold (IIDLE = 1.5A). Another on-time cannot be initiated until the output voltage drops below the feedback threshold. In this mode, the behavior appears like PWM operation with occasional pulse skipping, where inductor current does not need to reach the light-load level. Power-On Reset (POR) and UVLO Power-on reset (POR) occurs when VCC rises above approximately 2.1V, resetting the undervoltage, overvoltage, and thermal-shutdown fault latches. The VCC input undervoltage-lockout (UVLO) circuitry prevents the switching regulators from operating if the 5V bias supply (VCC) is below its 4V UVLO threshold. Idle Mode is a trademark of Maxim Integrated Products, Inc www.maximintegrated.com Maxim Integrated │ 12 MAXM17514 Soft-Start The internal step-down controller starts switching and the output voltage ramps up using soft-start. If the VCC bias supply voltage drops below the UVLO threshold, the controller stops switching and disables the drivers (LX becomes high impedance) until the bias supply voltage recovers. Once the 5V VCC bias supply and VIN rise above their respective input UVLO thresholds, and EN is pulled high, the internal step-down controller becomes enabled and begins switching. The internal voltage soft-starts gradually increment the feedback voltage by approximately 25mV every 61 switching cycles, making the output voltage reach its nominal regulation voltage 1.79ms after the regulator is enabled (see the Soft-Start Waveforms in the Typical Operating Characteristics section). Power-Good Output (POK) POK is the open-drain output of the window comparator that continuously monitors the output for undervoltage and overvoltage conditions. POK is actively held low in shutdown (EN = GND). POK becomes high impedance after the device is enabled and the output remains within ±10% of the nominal regulation voltage set by FB. POK goes low once the output drops 12% (typ) below or rises 12% (typ) above its nominal regulation point, or the output shuts down. For a logic-level POK output voltage, connect an external pullup resistor between POK and VCC. A 10kΩ pullup resistor works well in most applications. Output Overvoltage Protection (OVP) If the output voltage rises to 112% (typ) of its nominal regulation voltage, the controller sets the fault latch, pulls POK low, shuts down the regulator, and immediately pulls the output to ground through its low-side MOSFET. Turning on the low-side MOSFET with 100% duty cycle rapidly discharges the output capacitors and clamps the output to ground. However, this commonly undamped response causes negative output voltages due to the energy stored in the output LC at the instant of 0V fault. If the load cannot tolerate a negative voltage, place a power Schottky diode across the output to act as a reversepolarity clamp. If the condition that caused the overvoltage persists (such as a shorted high-side MOSFET), the input source also fails (short-circuit fault). Cycle VCC www.maximintegrated.com 4A, 2.4V to 5.5V Input, High-Efficiency Power Module below 1V or toggle the enable input to clear the fault latch and restart the regulator. Output Undervoltage Protection (UVP) The device includes an output undervoltage-protection (UVP) circuit that begins to monitor the output once the startup blanking period has ended. If the output voltage drops below 88% (typ) of its nominal regulation voltage, the regulator pulls the POK output low and begins the UVP fault timer. Once the timer expires after 1.6ms, the regulator shuts down, forcing the high-side MOSFET off and disabling the low-side MOSFET once the zerocrossing threshold has been reached. Cycle VCC below 1V, or toggle the enable input to clear the fault latch and restart the regulator. Thermal-Fault Protection The device features a thermal-fault protection circuit. When the junction temperature rises above +160°C (typ), a thermal sensor activates the fault latch, pulls down the POK output, and shuts down the regulator. Toggle EN to clear the fault latch, and restart the controllers after the junction temperature cools by 15°C (typ). Power Dissipation The device output current needs to be derated if the output voltage is above 2.5V or if the device needs to operate in high ambient temperature. The amount of current derating depends upon the input voltage, output voltage, and ambient temperature. The derating curves given in the Typical Operating Characteristics section can be used as a guide. The maximum allowable power losses can be calculated using the following equation: T − TA PD MAX = JMAX q JA where: PDMAX is the maximum allowed power losses with maximum allowed junction temperature, TJMAX is the maximum allowed junction temperature, TA is operating ambient temperature, qJA is the junction-to-ambient thermal resistance. Maxim Integrated │ 13 MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module PCB Layout Guidelines Figure 2 VOUT Careful PCB layout is critical to achieving low switching losses and clean, stable operation. Use the following guidelines for good PCB layout: ●● Keep the input capacitors as close as possible to the IN and PGND pins. ●● Keep the output capacitors as close as possible to the OUT and PGND pins. 28 27 26 25 24 23 22 21 20 EP1 1 V ●● Connect all the PGND connections to as large a copper plane area as possible on the top layer. EP2 EP3 2 18 17 3 16 4 15 5 6 7 8 10 11 12 13 14 ●● Connect EP1 to the PGND and GND planes on the top layer. ●● Use multiple vias to connect internal PGND planes to the top-layer PGND plane. VOUT ●● Do not keep any solder mask on EP1–EP3 on bottom layer. Keeping solder mask on exposed pads decreases the heat-dissipating capability. ●● Keep the power traces and load connections short. This practice is essential for high efficiency. Using thick copper PCBs (2oz vs. 1oz) can enhance fullload efficiency. Correctly routing PCB traces is a difficult task that must be approached in terms of fractions of centimeters, where a single milliohm of excess trace resistance causes a measurable efficiency penalty. Package Information Ordering Information PART TEMP RANGE MAXM17514ALI+T -40°C to +125°C MSL PIN-PACKAGE 3 28 SiP +Denotes a lead(Pb)-free/RoHS-compliant package. T = Tape and reel. Chip Information PROCESS: BiCMOS www.maximintegrated.com Figure 2. Layout Recommendation For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 28 SiP L286510+1 21-0701 90-0445 Maxim Integrated │ 14 MAXM17514 4A, 2.4V to 5.5V Input, High-Efficiency Power Module Revision History REVISION NUMBER REVISION DATE 0 11/14 Initial release 1 4/15 Tightend FB accuracy and added MSL 3 rating DESCRIPTION PAGES CHANGED — 2, 14 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com. Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2015 Maxim Integrated Products, Inc. │ 15