Fujitsu MB3793-42PNF-G Power-voltage monitoring ic with watchdog timer Datasheet

FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27402-4E
ASSP
POWER-VOLTAGE MONITORING IC
WITH WATCHDOG TIMER
MB3793-42
■ DESCRIPTION
The MB3793 is an integrated circuit to monitor power voltage; it incorporates a watchdog timer.
A reset signal is output when the power is cut or falls abruptly. When the power recovers normally after resetting,
a power-on reset signal is output to microprocessor units (MPUs). An internal watchdog timer with two inputs for
system operation diagnosis can provide a fail-safe function for various application systems.
There is also a mask option that can detect voltages of 4.9 to 2.4V in 0.1-V steps.
The model number and package code are as shown below.
Model No.
Package code
Detection voltage
MB3793-42
3793-A
4.2 V
■ FEATURES
•
•
•
•
•
•
•
Precise detection of power voltage fall: ±2.5%
Detection voltage with hysteresis
Low power dispersion: ICC = 27 µA (reference)
Internal dual-input watchdog timer
Watchdog timer halt function (by inhibition terminal)
Independently-set watchdog and reset times
Mask option for detection voltage (4.9 to 2.4 V, 0.1-V steps)
■ PACKAGES
8-pin plastic DIP
8-pin plastic SOP
8-pin plastic SOP
(DIP-8P-M01)
(FPT-8P-M01)
(FPT-8P-M02)
MB3793-42
■ PIN ASSIGNMENT
(TOP VIEW)
RESET
1
8
CK1
CTW
2
7
CK2
CTP
3
6
INH
GND
4
5
VCC
(DIP-8P-M01)
(FPT-8P-M01)
(FPT-8P-M02)
■ PIN DESCRIPTION
2
Pin No.
Symbol
1
RESET
2
Description
Pin No.
Symbol
Description
Outputs reset
5
VCC
Power supply
CTW
Sets monitoring time
6
INH
Inhibits watchdog timer function
3
CTP
Sets power-on reset hold time
7
CK2
Inputs clock 2
4
GND
Ground
8
CK1
Inputs clock 1
MB3793-42
■ BLOCK DIAGRAM
To VCC of all blocks
I1 ≅ 3 µA
CTP
3
Q
Output
buffer
VCC
4
GND
S
RSFF2
Comp. O
5
I2 ≅ 30 µA
Q
R
Q
S
R1 ≅
590 kΩ
+
RESET
1
−
RSFF1
Q
INH
R
6
Comp. S
CTW
2
Watchdog
timer
Reference
voltage
generator
−
VS
+
Pulse generator 1
CK1
VREF ≅ 1.24 V
8
R2 ≅
240 kΩ
Pulse generator 2
CK2
7
To GND of all blocks
3
MB3793-42
■ BLOCK FUNCTIONS
1. Comp. S
Comp. S is a comparator with hysteresis to compare the reference voltage with a voltage (VS) that is the result
of dividing the power voltage (VCC) by resistors R1 and R2. When VS falls below 1.24 V, a reset signal is output.
This function enables the MB3793 to detect an abnormality within 1 µs when the power is cut or falls abruptly.
2. Comp. O
Comp. O is a comparator to control the reset signal (RESET) output and compares the threshold voltage with
the voltage at the CTP terminal for setting the power-on reset hold time. When the voltage at the CTP terminal
exceeds the threshold voltage, resetting is canceled.
3. Reset output buffer
Since the reset (RESET) output buffer has CMOS organization, no pull-up resistor is needed.
4. Pulse generator
The pulse generator generates pulses when the voltage at the CK1 and CK2 clock terminals changes to High
from Low level (positive-edge trigger) and exceeds the threshold voltage; it sends the clock signal to the watchdog
timer.
5. Watchdog timer
The watchdog timer can monitor two clock pulses. Short-circuit the CK1 and CK2 clock terminals to monitor a
single clock pulse.
6. Inhibition terminal
The inhibition (INH) terminal forces the watchdog timer on/off. When this terminal is High level, the watchdog
timer is stopped.
7. Flip-flop circuit
The flip-flop circuit RSFF1 controls charging and discharging of the power-on reset hold time setting capacity
(CTP). The flip-flop circuit RSFF2 switches the charging accelerator for charging CTP during resetting on/off. This
circuit only functions during resetting and does not function at power-on reset.
4
MB3793-42
■ ABSOLUTE MAXIMUM RATINGS
(Ta = +25°C)
Parameter
Power voltage*
Input voltage*
Reset output voltage
(direct current)
Rating
Symbol
VCC
Unit
Min
Max
−0.3
+7
V
−0.3
+7
V
CK1
VCK1
CK2
VCK2
INH
VINH
RESET
IOL
IOH
−10
+10
mA
PD

200
mW
Tstg
−55
+125
°C
Power dissipation (Ta ≤ +85°C)
Storage temperature
*: The power voltage is based on the ground voltage (0 V).
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Value
Min
Typ
Max
Unit
Power supply voltage
VCC
1.2
5.0
6.0
V
Reset (RESET) output current
IOL
IOH
−5

+5
mA
Power-on reset hold time setting capacity
CTP
0.001
0.1
10
µF
Watchdog timer monitoring time setting capacity
CTW
0.001
0.1
1
µF
Watchdog timer monitoring time
tWD
0.1

1500
ms
Operating ambient temperature
Ta
−40
+25
+85
°C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
5
MB3793-42
■ ELECTRICAL CHARACTERISTICS
1. DC Characteristics
(VCC = +5 V, Ta = +25°C)
Value
Parameter
Symbol
Conditions

27
50
ICC2
Watchdog timer halt*2

25
45
4.20
4.30
VCC falling
Ta = +25°C
4.10
VSL
Ta = −40 to +85°C
4.05
4.20
4.35
Ta = +25°C
4.20
4.30
4.40
Ta = −40 to +85°C
4.15
4.30
4.45
50
100
150
mV
VSH
VSHYS
VCC rising
VSH - VSL
µA
V
V
VCIH

(1.4)
1.9
(2.5)
V
VCIL

(0.8)
1.3
(1.8)
V
VCHYS

(0.4)
0.6
(0.8)
V
VIIH

3.5

VCC
V
VIIL

0
0
0.8
V
CK input threshold voltage
INH input voltage
IIH
VCK = VCC

0
1.0
µA
IIL
VCK = 0 V
−1.0
0

µA
VOH
IRESET = −5 mA
4.5
4.75

V
VOL
IRESET = +5 mA

0.12
0.4
V
VCCL
IRESET = +50 µA

0.8
1.2
V
Input current
(CK1,CK2,INH)
Reset output voltage
Reset-output minimum
power voltage
Max
Watchdog timer operation*1
Detection voltage
CK input hysteresis
Typ
ICC1
Power current
Detection voltage
hysteresis difference
Unit
Min
*1: At clock input terminals CK1 and CK2, the pulse input frequency is 1 kHz and the pulse amplitude is 0 V to VCC.
*2: Inhibition input is at High level.
6
MB3793-42
2. AC Characteristics
(VCC = +5 V, Ta = +25°C)
Parameter
Symbol
Conditions
Value
Min
Typ
Max
Unit
Power-on reset hold time
tPR
CTP = 0.1 µF
80
130
180
ms
Watchdog timer monitoring time
tWD
CTW = 0.01 µF
CTP = 0.1 µF
7.5
15
22.5
ms
Watchdog timer reset time
tWR
CTP = 0.1 µF
5
10
15
ms
CK input pulse duration
tCKW

500


ns
CK input pulse cycle
tCKT

20


µs
Reset (RESET) output transition time
Rising
tr*
CL = 50 pF


500
ns
Falling
tf*
CL = 50 pF


500
ns
*: The voltage range is 10% to 90% at testing the reset output transition time.
7
MB3793-42
■ TIMING DIAGRAM
1. Basic operation (Positive clock pulse)
VSH
VSL
VCC
VCCL
tCKW
CK1
CK2
INH
Vth
CTP
VH
CTW
VL
RESET
tPR
(1) (2)
8
(3) (4) (5) (5)
tWD
tPR
tWR
(6) (7)
(8) (9)
(10)
(11)
(12)
(13) (14)
MB3793-42
2. Basic operation (Negative clock pulse)
VSH
VSL
VCC
VCCL
tCKW
CK1
CK2
INH
Vth
CTP
VH
CTW
VL
RESET
tPR
(1) (2)
tWD
(3) (4) (5) (5)
tPR
tWR
(6) (7)
(8) (9)
(10)
(11)
(12)
(13) (14)
9
MB3793-42
3. Single-clock input monitoring (Positive clock pulse)
tCKW
CK1
CK2
tCKT
Vth
CTP
VH
CTW
VL
RESET
tWD
tWR
Note: The MB3793 can monitor only one clock.
The MB3793 checks the clock signal at every other input pulse. Therefore, set watchdog
timer monitor time tWD to the time that allows the MB3793 to monitor the period twice as
long as the input clock pulse.
10
MB3793-42
4. Inhibition operation (Positive clock pulse)
VSH
VSL
VCC
VCCL
tCKW
CK1
CK2
INH
Vth
CTP
VH
CTW
VL
RESET
tPR
(1) (2)
(3) (4) (5) (5)
tWD
tWR
(6) (7)
tPR
(8) (9) (10)
(11)
(12)
(13) (14)
11
MB3793-42
5. Clock pulse input (Positive clock pulse)
*1
CK1
*2
CK2
VH
CTW
VL
Note: The MB3793 watchdog timer monitors Clock 1 (CK1) and Clock 2 (CK2) pulses alternately. When a CK2 pulse is detected after detecting a CK1 pulse, the monitoring time setting capacity (CTW) switches to charging from discharging.
When two consecutive pulses occur on one side of this alternation before switching, the second pulse is ignored. In the above figure, pulses *1 and *2 are ignored.
6. Inhibition input rising and falling time
VCC
90 %
90 %
INH
10 %
10 %
0V
tri
12
tfi
MB3793-42
■ OPERATION SEQUENCE
The operation sequence is explained by using “■ TIMING DIAGRAM 1. Basic operation (Positive clock pulse)”.
The following item numbers correspond to the numbers in “■ TIMING DIAGRAM 1. Basic operation (Positive
clock pulse)”.
(1) When the power voltage (VCC) reaches about 0.8 V (VCCL), a reset signal is output.
(2) When VCC exceeds the rising-edge detection voltage (VSH), charging of power-on reset hold time setting
capacitance (CTP) is started. VSH is about 4.3 V.
(3) When the voltage at the CTP terminal setting the power-on reset hold time exceeds the threshold voltage
(Vth), resetting is canceled and the voltage at the RESET terminal changes to High level to start charging of
the watchdog timer monitoring time setting capacitance (CTW). Vth is about 3.6 V.
The power-on reset hold time (tPR) can be calculated by the following equation.
tPR (ms) ≈ A × CTP (µF)
Where, A is about 1300.
(4) When the voltage at the CTW terminal setting the monitoring time reaches High level (VH), CTW switches to
discharging from charging. VH is about 1.24 V (reference value).
(5) When clock pulses are input to the CK2 terminal during CTW discharging after clock pulses are input to the
CK1 terminal—positive-edge trigger, CTW switches to charging.
(6) If clock pulse input does not occur at either the CK1 or CK2 clock terminals during the watchdog timer
monitoring time (tWD), the CTW voltage falls below Low level (VL), a reset signal is output, and the voltage at
the RESET terminal changes to Low level. VL is about 0.24 V.
tWD can be calculated from the following equation.
tWD (ms) ≈ B × CTW (µF) + C × CTP (µF)
Where, B is about 1500. C is about 3; it is much smaller than B.
Hence, when CTP / CTW ≤ 10, the calculation can be simplified as follows:
tWD (ms) ≈ B × CTW (µF)
(7) When the voltage of the CTP terminal exceeds Vth again as a result of recharging CTP, resetting is canceled
and the watchdog timer restarts monitoring.
The watchdog timer reset time (tWR) can be calculated by the following equation.
tWR (ms) ≈ D × CTP (µF)
Where, D is about 100.
(8) When VCC falls below the rising-edge detection voltage (VSL), the voltage of the CTP terminal falls and a reset
signal is output, and the voltage at the RESET terminal changes to Low level. VSL is about 4.2 V.
(9) When VCC exceeds VSH, CTP begins charging.
(10)When the voltage of the CTP terminal exceeds Vth, resetting is canceled and the watchdog timer restarts.
(11)When an inhibition signal is input (INH terminal is High level), the watchdog timer is halted forcibly.
In this case, VCC monitoring is continued without the watchdog timer.
The watchdog timer does not function unless this inhibition input is canceled.
(12)When the inhibition input is canceled (INH terminal is Low level), the watchdog timer restarts.
(13)When the VCC voltage falls below VSL after power-off, a reset signal is output.
(14)When the power voltage (VCC) falls below about 0.8 V (VCCL) , a reset signal is released.
Similar operation is also performed for negative clock-pulse input (“■ TIMING DIAGRAM 2. Basic operation
(Negative clock pulse)”).
Short-circuit the clock terminals CK1 and CK2 to monitor a single clock. The basic operation is the same but
the clock pulses are monitored at every other pulse (■ TIMING Diagram 3. Single-clock input monitoring).
13
MB3793-42
■ TYPICAL CHARACTERISTICS
Detection Voltage - Ambient Temperature
Power Current - Power Voltage
40
4.5
Watchdog timer monitoring
35
Power current
ICC (µA)
25
Watchdog timer stopping
(VINH = VCC)
20
Inhibited
Reset
15
(VCC < VSH)
Detection voltage
VSH and VSL (V)
(VINH = 0 V)
30
4.4
VSH
4.3
VSL
4.2
10
MB3793-42
f = 1 kHz
Duty = 10%
VL = 0 V
VH = VCC
VINH VCC
4.1
CTP
CTW
0.01 µF 0.1 µF
4.0
0
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10
Power voltage VCC (V)
4.7
4.6
4.5
4.4
4.3
4.2
Ta = +85 °C
Ta
VRESET
RON IRESET
−40 °C 4.800 V 40 Ω
+25 °C 4.750 V 50 Ω −5 mA
+85 °C 4.707 V 58.6 Ω
Reset output voltage
VRESET (mV)
Reset output voltage
VRESET (V)
Ta = +25 °C
60
400
Ta = +25 °C
300
Ta = +85 °C
200
100
Ta = −40 °C
4.1
4.0
0
−1 −2 −3 −4 −5 −6 −7
−8 −9 −10
Reset output current IRESET (mA)
80 100
Ta
VRESET
RON IRESET
−40 °C 98 mV 19.6 Ω
+25 °C 135 mV 27 Ω +5 mA
+85 °C 167 mV 33.4 Ω
500
4.8
40
Reset Output Voltage - Reset Output Current
(N-MOS side)
Ta = −40 °C
4.9
20
Ambient temperature Ta (°C)
Reset Output Voltage - Reset Output Current
(P-MOS side)
5.0
−40 −20 0
0
0
1
2
3
4
5
6
7
8
9
10
Reset output current IRESET(mA)
(Continued)
14
MB3793-42
Reset-on Reset Time - Ambient Temperature
(when VCC rising)
Reset Output Voltage - Power Voltage
260
7
Pull-up resistance: 100 kΩ
240
6
5
200
Power-on reset time
tPR (ms)
Reset output voltage
VRESET (V)
220
4
3
Ta = +85 °C
2
Ta = +25 °C
1
Ta = −40 °C
0
0
1
2
3
4
5
6
180
160
140
120
100
80
60
7
40
Power voltage VCC (V)
20
0
−40 −20
0
20 40
60 80 100
Ambient temperature Ta (°C)
Watchdog Timer Monitoring Time - Ambient
Temperature
26
26
24
24
22
22
Watchdog timer monitoring time
tWD (ms)
Watchdog timer reset time
tWR (ms)
Watchdog Timer Reset Time - Ambient Temperature
(when monitoring)
20
18
16
14
12
10
8
6
20
18
16
14
12
10
8
6
4
4
2
2
0
−40 −20
0
0
20 40
60 80 100
Ambient temperature Ta (°C)
−40 −20
0
20 40
60 80 100
Ambient temperature Ta (°C)
(Continued)
15
MB3793-42
(Continued)
Power-on Reset Time - CTP Capacitance
Reset Time - CTP Capacitance
103
102
103
Ta = −40 °C
Reset Time
tWR (ms)
Power-on reset time
tPR (ms)
104
102
Ta = +25 °C
101
Ta = +85 °C
1
10 −1
10−4
10
−3
10
−2
10
Ta = −40 °C
10
1
1
Ta = +25 °C
Ta = +85 °C
10−1
−1
1
10
1
10
10−2
10−4
2
10−2
10−1
1
101
102
Power-on reset time setting capacitance
CTP (µF)
Power-on reset time setting capacitance
CTP (µF)
Watchdog Timer Monitoring Time - CTW Capacitance
(under Ta condition)
10−3
Watchdog Timer Monitoring Time - CTW Capacitance
103
Ta = −40 °C
2
10
Ta = +25 °C
101
1
Ta = +85 °C
10−1
10−5
10−4
10−3
10−2
10−1
1
101
Watchdog timer monitoring time setting capacitance
CTW (µF)
16
Watchdog timer monitoring time
tWD (ms)
Watchdog timer monitoring time
tWD (ms)
104
103
CTP = 1 µF
10
2
CTP = 0.1 µF
101
1
10−1
CTP = 0.01 µF
10−5
10−4
10−3
10−2
10−1
1
101
Watchdog timer monitoring time setting capacitance
CTW (µF)
MB3793-42
■ STANDARD CONNECTION
VCC
5
VCC
RESET
2
1
CTW
MB3793
3
RESET VCC
CK
CK
CTP
CK1 8
CTW
RESET VCC
CTP
Microprocessor 1
GND
INH
6
GND
4
Microprocessor 2
GND
CK2 7
Equation of time-setting capacitances (CTP and CTW) and set time
tPR (ms) ≈ A × CTP (µF)
tWD (ms) ≈ B × CTW (µF) + C × CTP (µF)
However, when CTP/CTW ≤ 10,
tWD (ms) ≈ B × CTW (µF)
tWR (ms) ≈ D × CTP (µF)
Value of A, B, C and D
A
B
C
D
1300
1500
3
100
Remark
(Example) When CTP = 0.1 µF and CTW = 0.01 µF,
tPR ≈ 130 [ms]
tWD ≈ 15 [ms]
tWR ≈ 10 [ms]
17
MB3793-42
■ APPLICATION EXAMPLE
1. Monitoring Single Clock
VCC
5
VCC
RESET 1
2 CTW
RESET VCC
MB3793
3 CTP
CK Micro-
CK1 8
CTW
processor
CTP
GND
INH
6
GND
4
CK2 7
2. Watchdog Timer Stopping
VCC
5
VCC
RESET 1
6 INH
2 CTW
MB3793
3 CTP
CK1 8
CTW
RESET VCC
Microprocessor1
CK
HALT
CTP
GND
GND
4
18
CK2 7
RESET VCC
Microprocessor2
CK
HALT
GND
MB3793-42
■ NOTES ON USE
• Take account of common impedance when designing the earth line on a printed wiring board.
• Take measures against static electricity.
- For semiconductors, use antistatic or conductive containers.
- When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container.
- The work table, tools and measuring instruments must be grounded.
- The worker must put on a grounding device containing 250 kΩ to 1 MΩ resistors in series.
• Do not apply a negative voltage
- Applying a negative voltage of −0.3 V or less to an LSI may generate a parasitic transistor, resulting in
malfunction.
■ ORDERING INFORMATION
Part number
Package
MB3793-42P
8-pin plastic DIP
(DIP-8P-M01)
MB3793-42PF
8-pin plastic SOP
(FPT-8P-M01)
MB3793-42PNF
8-pin plastic SOP
(FPT-8P-M02)
Remarks
19
MB3793-42
■ PACKAGE DIMENSIONS
8-pin plastic DIP
(DIP-8P-M01)
+0.40
9.40 –0.30
+.016
.370 –.012
6.20±0.25
(.244±.010)
1 PIN INDEX
0.51(.020)MIN
4.36(.172)MAX
0.25±0.05
(.010±.002)
3.00(.118)MIN
+0.30
0.99 –0
.039
0.89
.035
C
+.012
–0
+0.35
–0.30
+.014
–.012
0.46±0.08
(.018±.003)
+0.30
1.52 –0
.060
+.012
–0
7.62(.300)
TYP
15°MAX
2.54(.100)
TYP
1994 FUJITSU LIMITED D08006S-2C-3
Dimensions in mm (inches) .
Note : The values in parentheses are reference values.
(Continued)
20
MB3793-42
Note 1) *1 : These dimensions include resin protrusion.
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
8-pin plastic SOP
(FPT-8P-M01)
+0.25
+.010
+0.03
*1 6.35 –0.20 .250 –.008
0.17 –0.04
+.001
8
.007 –.002
5
*2 5.30±0.30 7.80±0.40
(.209±.012) (.307±.016)
INDEX
Details of "A" part
+0.25
2.00 –0.15
+.010
.079 –.006
1
1.27(.050)
"A"
4
0.47±0.08
(.019±.003)
0.13(.005)
(Mounting height)
0.25(.010)
0~8˚
M
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
+0.10
0.10 –0.05
+.004
.004 –.002
(Stand off)
0.10(.004)
C
2002 FUJITSU LIMITED F08002S-c-6-7
Dimensions in mm (inches) .
Note : The values in parentheses are reference values.
(Continued)
21
MB3793-42
(Continued)
Note 1) *1 : These dimensions include resin protrusion.
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
8-pin plastic SOP
(FPT-8P-M02)
+0.25
+.010
+0.03
*1 5.05 –0.20 .199 –.008
0.22 –0.07
+.001
.009 –.003
8
5
*2 3.90±0.30 6.00±0.40
(.154±.012) (.236±.016)
Details of "A" part
45˚
1.55±0.20
(Mounting height)
(.061±.008)
0.25(.010)
0.40(.016)
1
"A"
4
1.27(.050)
0.44±0.08
(.017±.003)
0.13(.005)
0~8˚
M
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.15±0.10
(.006±.004)
(Stand off)
0.10(.004)
C
2002 FUJITSU LIMITED F08004S-c-4-7
Dimensions in mm (inches) .
Note : The values in parentheses are reference values.
22
MB3793-42
FUJITSU LIMITED
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