IRF IRF9383MPBF Isolation switch for input power or battery application Datasheet

IRF9383MPbF
DirectFET® P-Channel Power MOSFET ‚
Typical values (unless otherwise specified)
Applications
VDSS
l Isolation Switch for Input Power or Battery Application
l High Side Switch for Inverter Applications
VGS
RDS(on)
RDS(on)
-30V max ±20V max 2.3mΩ@-10V 3.8mΩ@-4.5V
Features and Benefits
Qg tot
Qgd
Qgs2
Qrr
Qoss
Vgs(th)
67nC
29nC
9.4nC
315nC
59nC
-1.8V
l Environmentaly Friendly Product
l RoHs Compliant Containing no Lead,
no Bromide and no Halogen
S
l Common-Drain P-Channel MOSFETs Provides
D
High Level of Integration and Very Low RDS(on)
G
S
D
DirectFET™ ISOMETRIC
MX
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ
SX
ST
MQ
MX
MT
MP
MC
Description
The IRF9383MTRPbF combines the latest HEXFET ® P-Channel Power MOSFET Silicon technology with the advanced DirectFET ®
packaging to achieve the lowest on-state resistance in a package that has the footprint of a SO-8 and only 0.6 mm profile. The DirectFET®
package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or
convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET®
package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%.
Orderable part number
Package Type
IRF9383MTRPbF
DirectFET Medium Can
IRF9383MTR1PbF
Standard Pack
Form
Quantity
®
Tape and Reel
4800
®
Tape and Reel
1000
DirectFET Medium Can
Note
"TR1" suffix EOL notice #264
Absolute Maximum Ratings
Max.
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
VGS
ID @ TA = 25°C
ID @ TA = 70°C
ID @ TC = 25°C
IDM
Pulsed Drain Current
g
e
e
f
Typical RDS(on) (mΩ)
12
ID = -22A
10
8
6
TJ = 125°C
4
2
T J = 25°C
0
2
4
6
8
10
12
14
16
18
20
-VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
Notes:
 Click on this section to link to the appropriate technical paper.
‚ Click on this section to link to the DirectFET® Website.
ƒ Surface mounted on 1 in. square Cu board, steady state.
1
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Units
-30
±20
-22
-17
-160
-180
-VGS, Gate-to-Source Voltage (V)
VDS
14.0
ID= -18A
12.0
V
A
VDS= -24V
VDS= -15V
VDS= -6.0V
10.0
8.0
6.0
4.0
2.0
0.0
0
20
40
60
80
100 120 140 160 180
QG Total Gate Charge (nC)
Fig 2. Typical Total Gate Charge vs Gate-to-Source Voltage
„ TC measured with thermocouple mounted to top (Drain) of part.
Repetitive rating; pulse width limited by max. junction temperature.
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IRF9383MPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min.
VGS = 0V, ID = -250μA
Reference
to 25°C, ID = -1.0mA
V/°C
VGS = -10V, ID = -22A
mΩ
VGS = -4.5V, ID = -18A
Drain-to-Source Breakdown Voltage
-30
ΔΒVDSS/ΔTJ
RDS(on)
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
––– 0.0159 –––
–––
2.3
2.9
VGS(th)
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
–––
-1.3
–––
3.8
-1.8
-5.9
Drain-to-Source Leakage Current
–––
–––
–––
–––
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
–––
–––
–––
–––
gfs
Qg
Forward Transconductance
Total Gate Charge
Total Gate Charge
56
–––
–––
–––
130
67
Pre- Vth Gate-to-Source Charge
Post -Vth Gate-to-Source Charge
–––
–––
12
9.4
Gate-to-Drain Charge
Gate Charge Overdrive
Switch charge (Qgs2 + Qgd)
–––
–––
29
16.6
–––
–––
Output Charge
Gate Resistance
–––
–––
–––
38.4
59
6.5
–––
–––
–––
Turn-On Delay Time
Rise Time
–––
–––
29
160
–––
–––
Turn-Off Delay Time
Fall Time
Input Capacitance
–––
–––
–––
115
110
7305
–––
–––
–––
Output Capacitance
Reverse Transfer Capacitance
–––
–––
1780
1030
–––
–––
Min.
Typ. Max. Units
ΔVGS(th)/ΔTJ
IDSS
Qg
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
RG
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Conditions
Typ. Max. Units
BVDSS
–––
–––
4.8
-2.4
–––
V
h
h
V
VDS = VGS, ID = -150μA
mV/°C
VDS = -24V, VGS = 0V
-1.0
μA
VDS = -24V, VGS = 0V, TJ = 125°C
-150
VGS = -20V
-100
nA
VGS = 20V
100
VDS = -10V, ID = -18A
–––
S
VDS = -15V, VGS = -10V, ID = -18A
–––
–––
VDS = -15V
–––
–––
nC
VGS = -4.5V
ID = -18A
See Fig.15
nC
VDS = -24V, VGS = 0V
Ω
VDD = -15V, VGS = -4.5V
ns
pF
ID = -18A
h
RG = 1.8Ω
See Fig.17
VGS = 0V
VDS = -15V
ƒ = 1.0KHz
Diode Characteristics
Parameter
IS
Continuous Source Current
(Body Diode)
Pulsed Source Current
ISM
g
(Body Diode)
Diode Forward Voltage
VSD
trr
Reverse Recovery Time
Reverse Recovery Charge
Qrr
–––
–––
-114
–––
–––
-180
–––
–––
-1.2
V
–––
–––
52
315
78
470
ns
nC
A
Conditions
MOSFET symbol
showing the
integral reverse
D
G
S
p-n junction diode.
TJ = 25°C, IS = -18A, VGS = 0V
TJ = 25°C, IF = -18A, ,VDD = -15V
h
di/dt = 500A/μs
h
Notes:
† Pulse width ≤ 400μs; duty cycle ≤ 2%.
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IRF9383MPbF
Absolute Maximum Ratings
Max.
Parameter
e
e
f
PD @TA = 25°C
PD @TA = 70°C
PD @TC = 25°C
TP
TJ
TSTG
Units
2.1
1.3
113
270
-40 to + 150
Power Dissipation
Power Dissipation
Power Dissipation
Peak Soldering Temperature
Operating Junction and
Storage Temperature Range
W
°C
Thermal Resistance
e
i
j
fk
RθJA
RθJA
RθJA
RθJC
RθJ-PCB
Parameter
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case ,
Junction-to-PCB Mounted
Linear Derating Factor
e
Typ.
Max.
Units
–––
12.5
20
–––
1.0
60
–––
–––
1.1
–––
°C/W
0.02
W/°C
100
Thermal Response ( Z thJA )
10
1
D = 0.50
0.20
0.10
0.05
0.02
0.01
0.1
τJ
0.01
0.001
0.0001
1E-006
R1
R1
τJ
τ1
R2
R2
R3
R3
R4
R4
τ2
τ1
τ2
τ3
τ4
τ3
Ci= τi/Ri
Ci= τi/Ri
0.0001
0.001
τ4
τA
τi (sec)
2.7194
0.0138004
23.1599
55.766563
10.2579
0.6520047
23.6469
7.7259631
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-005
Ri (°C/W)
τA
0.01
0.1
1
10
100
1000
t1 , Rectangular Pulse Duration (sec)
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient 
Notes:
‡ Used double sided cooling, mounting pad with large heatsink.
ˆ Mounted on minimum footprint full size board with metalized
‰ Rθ is measured at TJ of approximately 90°C.
back and with small clip heatsink.
ƒ Surface mounted on 1 in. square Cu
board (still air).
3
‰ Mounted to a PCB with small
clip heatsink (still air)
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‰ Mounted on minimum footprint full size
board with metalized back and with small
clip heatsink (still air)
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IRF9383MPbF
1000
1000
100
BOTTOM
10
TOP
-ID, Drain-to-Source Current (A)
-I D, Drain-to-Source Current (A)
TOP
VGS
-10V
-5.0V
-4.5V
-3.5V
-3.25V
-3.0V
-2.75V
-2.5V
100
1
-2.5V
0.1
≤60μs PULSE WIDTH
BOTTOM
10
-2.5V
≤60μs PULSE WIDTH
Tj = 25°C
Tj = 150°C
1
0.01
0.1
1
10
0.1
100
Fig 4. Typical Output Characteristics
10
100
Fig 5. Typical Output Characteristics
1000
1.6
VDS = -15V
≤60μs PULSE WIDTH
ID = -22A
Typical RDS(on) (Normalized)
-I D, Drain-to-Source Current (A)
1
-V DS, Drain-to-Source Voltage (V)
-V DS, Drain-to-Source Voltage (V)
100
10
T J = 150°C
T J = 25°C
T J = -40°C
1.0
1.4
V GS = -10V
V GS = -4.5V
1.2
1.0
0.8
0.6
1
2
3
4
5
12
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
T J = 25°C
Typical RDS(on) ( mΩ)
Ciss
Coss
Crss
1000
Vgs = -3.5V
Vgs = -4.5V
Vgs = -5.0V
Vgs = -6.0V
Vgs = -8.0V
Vgs = -10V
Vgs = -12V
Vgs = -15V
10
C oss = C ds + C gd
10000
20 40 60 80 100 120 140 160
Fig 7. Normalized On-Resistance vs. Temperature
Fig 6. Typical Transfer Characteristics
100000
-60 -40 -20 0
T J , Junction Temperature (°C)
-VGS, Gate-to-Source Voltage (V)
C, Capacitance(pF)
VGS
-10V
-5.0V
-4.5V
-3.5V
-3.25V
-3.0V
-2.75V
-2.5V
8
6
4
100
2
1
10
100
-VDS, Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
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0
20
40
60
80 100 120 140 160 180
-I D, Drain Current (A)
Fig 9. Typical On-Resistance vs.
Drain Current and Gate Voltage
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IRF9383MPbF
1000
100
-I D, Drain-to-Source Current (A)
-I SD, Reverse Drain Current (A)
1000
T J = 150°C
T J = 25°C
T J = -40°C
10
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
10
10msec
1
DC
0.1
Tc = 25°C
Tj = 150°C
Single Pulse
VGS = 0V
0.01
0
0.01
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2
0.1
Fig 10. Typical Source-Drain Diode Forward Voltage
15
10
5
2.4
2.2
2.0
1.8
1.6
1.4
100
125
ID = -150μA
ID = -250μA
ID = -1.0mA
ID = -1.0A
1.2
1.0
0
75
100
2.6
-Typical VGS(th) Gate threshold Voltage (V)
20
50
10
Fig 11. Maximum Safe Operating Area
25
25
1
-V DS, Drain-to-Source Voltage (V)
-VSD, Source-to-Drain Voltage (V)
-I D, Drain Current (A)
100μsec
1msec
-75 -50 -25
150
0
25
50
75 100 125 150
T J , Temperature ( °C )
T C , Case Temperature (°C)
Fig 12. Maximum Drain Current vs. Case Temperature
Fig 13. Typical Threshold Voltage vs. Junction
Temperature
EAS , Single Pulse Avalanche Energy (mJ)
2500
ID
-1.6A
-2.3A
BOTTOM -18A
TOP
2000
1500
1000
500
0
25
50
75
100
125
150
Starting T J , Junction Temperature (°C)
Fig 14. Maximum Avalanche Energy vs. Drain Current
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IRF9383MPbF
Id
Vds
Vgs
L
VCC
DUT
0
20K
1K
Vgs(th)
SS
Qgodr
Fig 17a. Gate Charge Test Circuit
I AS
D.U.T
RG
IAS
-V
GS
-20V
tp
Qgs2 Qgs1
Fig 17b. Gate Charge Waveform
L
VDS
Qgd
VDD
A
DRIVER
0.01Ω
tp
V(BR)DSS
15V
Fig 18b. Unclamped Inductive Waveforms
Fig 18a. Unclamped Inductive Test Circuit
VDS
RD
td(on)
VGS
RG
D.U.T.
-
+
t d(off)
tf
10%
V DD
-V GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 19a. Switching Time Test Circuit
6
tr
VGS
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90%
VDS
Fig 19b. Switching Time Waveforms
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IRF9383MPbF
D.U.T *
Driver Gate Drive
+
ƒ
+
‚
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
di/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D=
Period
P.W.
V DD
+
Re-Applied
Voltage
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Body Diode
InductorCurent
Current
Inductor
VDD
Forward Drop
ISD
Ripple ≤ 5%
*
* VGS = 5V for Logic Level Devices
Reverse Polarity of D.U.T for P-Channel
Fig 20. Diode Reverse Recovery Test Circuit for P-Channel HEXFET® Power MOSFETs
DirectFET® Board Footprint, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET® application note AN-1035 for all details regarding the assembly of DirectFET®.
This includes all recommendations for stencil and substrate designs.
G=GATE
D=DRAIN
S=SOURCE
D
D
S
G
S
D
7
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D
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IRF9383MPbF
DirectFET® Outline Dimension, MX Outline
(Medium Size Can, X-Designation).
Please see DirectFET® application note AN-1035 for all details regarding the assembly of DirectFET®. This includes
all recommendations for stencil and substrate designs.
DIMENSIONS
CODE
A
B
C
D
E
F
G
H
J
K
L
M
R
P
METRIC
MIN MAX
6.25
6.35
4.80
5.05
3.85
3.95
0.35
0.45
0.68
0.72
0.68
0.72
1.38
1.42
0.80
0.84
0.38
0.42
0.88
1.02
2.28
2.42
0.59
0.70
0.03
0.08
0.08
0.17
IMPERIAL
MIN
MAX
0.246
0.250
0.199
0.189
0.156
0.152
0.018
0.014
0.028
0.027
0.028
0.027
0.054
0.056
0.031
0.033
0.017
0.015
0.040
0.035
0.095
0.090
0.028
0.023
0.001
0.003
0.007
0.003
Dimensions are shown in
millimeters (inches)
DirectFET® Part Marking
GATE MARKING
LOGO
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRF9383MPbF
DirectFET® Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF9383MTRPBF). For 1000 parts on 7"
reel, order IRF9383MTR1PBF
CODE
A
B
C
D
E
F
G
H
REEL DIMENSIONS
STANDARD OPTION (QTY 4800)
METRIC
IMPERIAL
MIN
MAX
MIN
MAX
330
N.C
12.992
N.C
20.2
N.C
0.795
N.C
12.8
13.2
0.504
0.520
1.5
N.C
0.059
N.C
100.0
N.C
3.937
N.C
N.C
18.4
N.C
0.724
12.4
14.4
0.488
0.567
11.9
15.4
0.469
0.606
LOADED TAPE FEED DIRECTION
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
A
B
C
D
E
F
G
H
DIMENSIONS
METRIC
IMPERIAL
MIN
MAX
MAX
MIN
0.311
0.319
8.10
7.90
0.154
4.10
0.161
3.90
0.469
0.484
11.90
12.30
0.215
0.219
5.45
5.55
0.201
0.209
5.10
5.30
0.256
0.264
6.70
6.50
0.059
N.C
N.C
1.50
0.059
0.063
1.50
1.60
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRF9383MPbF
†
Qualification Information
Qualification level
Moisture Sensitivity Level
RoHS Compliant
†
††
†††
Consumer ††
(per JEDEC JESD47F††† guidelines)
MSL1
DirectFET®
(per JEDEC J-STD-020D†††)
Yes
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
Higher qualification ratings may be available should the user have such requirements.
Please contact your International Rectifier sales representative for further information:
http://www.irf.com/whoto-call/salesrep/
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comments
• Updated ordering information to reflect the End-Of-life (EOL) of the mini-reel option (EOL notice #264).
2/17/2014
• Updated data sheet with new IR corporate template.
2/25/2014 • Change MSL3 to MSL1, on page 9.
• Updated schematics from "N-Channel" to "P-Channel" on page 1.
6/2/2015
• Updated "IFX logo" on page 1 and page 10..
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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