Confidential Datasheet Version 1.0 6MHz, 800mA Buck Converter for RFPA General Description Features The MAP7154 is synchronous buck converter for 3G, 3.5G and 4G RFPA (RF Power Amplifier). The MAP7154 can operate at 6MHz switching frequency and has 2.7V to 5.5V input voltage range, 800mA output current capability. The MAP7154 has three output modes. In Seep mode, output regulation is not required and MAP7154 may be entering in Sleep mode by setting VREF nominally to 100mV, also very low IQ operation. In Buck mode, output voltage can be programmed from 0.4V to 3.50V in proportion to VREF input voltage ranged from 0.16V to 1.40V. Output voltage is the same with input voltage in bypass mode. Bypass mode reduces the voltage drop to less than 60mV. These features enable RFPA to operate at higher power efficiency saving its output power. The MAP7154 has the protections, input under voltage lockout, thermal shutdown and over current limit. The MAP7154 is available in 1.32mm x 1.27mm 0.40mm pitch, 9 bumps WLCSP package 2.7V to 5.5V input voltage range 0.4V to 3.50V output voltage in Buck mode Low drop output voltage in Bypass mode 800mA output current 6MHz switching frequency Up to efficiency : 96% Soft-Start : 50us Quiescent current in sleep mode :Typ.70uA Shutdown current : Typ. 1uA 100% max duty Fast load transient Protections : Current limit, Thermal Shutdown Package : 1.32mm x 1.27mm, 0.40mm-pitch, 9 bumps, WLCSP package Applications Mobile phones Digital cameras USB devices Ordering Information Part Number Top Marking Ambient Temperature Range Package RoHS Status MAP7154WCRH 54LLL -40℃ to +85℃ 1.32mmX1.27mm, 0.40mm pitch, 9 bumps WLCSP Halogen Free Typical Application MAP7154 L1 ` VIN VIN SW C2 C1 FB EN VREF BYP Aug. 2013 VOUT SGND PGND MAP7154 – 6MHz, 800mA Buck Converter for RFPA Datasheet – MAP7154 Confidential Datasheet Version 1.0 SGND PGND 1-1 1-2 1-3 EN NC SW 2-1 2-2 2-3 BYP FB VIN 3-1 3-2 3-3 1.27 mm VREF 0.4 mm Top View 0.4 mm 1.32 mm Pin Description 1.32mmX1.27mm 9 bumps WLCSP Name 1-1 VREF Voltage control analog input for output voltage setting, 2.5×VREF=VOUT 1-2 SGND Signal ground. Reference ground for the IC 1-3 PGND Power ground. Power ground of the internal Power MOSFET switches. 2-1 EN 2-2 NC 2-3 SW Switch node. Connect to external inductor. 3-1 BYP When BYP is high, MAP7154 enters into the forced Bypass mode. When BYP is low, MAP7154 enter into the auto Bypass mode. This pin must not be left floating. Aug. 2013 Description Enable, Normal operation when EN High, Shut down when EN Low. This pin must not be left floating. 3-2 FB Output voltage feedback sense 3-3 VIN IC supply input. MAP7154 – 6MHz, 800mA Buck Converter for RFPA Pin Configuration Confidential Datasheet Version 1.0 VIN FB Bypass Controller EN PMOS Current Limit VREF SW PFM / PWM Controller BYP CLK NMOS Current Limit SGND Aug. 2013 PGND MAP7154 – 6MHz, 800mA Buck Converter for RFPA Functional Block Diagram Confidential Datasheet Version 1.0 Symbol VVIN VSW, VEN, VFB, VVREF, VBYP TPAD TJ TS ESD Parameter Supply Voltage on VIN pin SW, EN, FB, VREF, BYP Pin Voltage to GND Soldering Lead / Pad Temperature, 10sec Junction Temperature Storage Temperature HBM on All Pins (Note 2) MM on All Pins (Note 3) Min -0.3 -0.3 -40 -65 -2000 -200 Max 6 VIN + 0.3 +260 +125 +150 +2000 +200 Unit V V °C °C °C V Note 1: Stresses beyond the above listed maximum ratings may damage the device permanently. Operating above the recommended conditions for extended time may stress the device and affect device reliability. Also the device may not operate normally above the recommended operating conditions. These are stress ratings only. Note 2: ESD tested per JESD22A-114. Note 3: ESD tested per JESD22A-115. Recommended Operating Conditions (Note 1) VVIN IOUT_Buck Mode IOUT_Bypass Mode VOUT TA TJ Parameter Supply Input Voltage Output current in Buck Mode Output current in Bypass Mode Output voltage Ambient Temperature (Note 2) Junction Temperature Min 2.7 0 0 0.4 -40 -40 Max 5.5 0.8 2.4 ≤Vin +85 +125 Note 1: Normal operation of the device is not guaranteed if operating the device over outside range of recommended conditions. Note 2: The ambient temperature may have to be derated if used in high power dissipation and poor thermal resistance conditions. Aug. 2013 Unit V A A V °C °C MAP7154 – 6MHz, 800mA Buck Converter for RFPA Absolute Maximum Ratings (Note 1) Confidential Datasheet Version 1.0 VIN = 3.7V, IOUT=200mA, CIN = 4.7F, EN=VIN, TA=-40°C to 85°C, unless otherwise noted. Typical values are at TA=+25°C Parameter General Input Output Specifications VVIN Input Voltage Range IQ Quiescent Current ISHUTDOWN Shutdown Current VEN IEN VUVLO Logic Input Level on EN pin Enable Input Current VIN Rising Vin hysteresis Test Condition Min Typ. 2.7 IOUT = 0mA, Sleep Mode EN = Low VEN_L : Logic Low VEN_H : Logic High EN=VIN or GND Input High Threshold 70 1 Max Unit 5.5 V uA uA 3 0.5 1.2 2.3 200 V 1.0 2.6 uA V mV 6.3 MHz 100 % +3 +50 % mV mV mV Oscillator FSW Internal Oscillator Frequency 5.7 6.0 DMAX Maximum Duty Cycle (1) Output Regulation VOUT_ACC VOUT Accuracy (2) VLINE_REG VLOAD_REG Line Regulation (1) Load Regulation (1) VVREF_SL_IN VREF Sleep Mode Enter VVREF_SL_OUT VREF Sleep Mode Exit VVREF_BYP_IN VREF Bypass Mode Enter VVREF_BYP_OUT VREF Bypass Mode Exit Threshold voltage to enter VVREF_TH_IN Bypass Mode Threshold voltage to exit VVREF_TH_OUT Bypass Mode TSL_IN Sleep mode enter time (1) TSL_OUT Sleep mode exit time (1) Output voltage step TBUCK_TR response rise time (1) Output voltage step TBUCK_TF response fall time (1) Internal Switches High-side Switch On RDS(ON)_H Resistance –PMOS (1) Low-side Switch On RDS(ON)_L Resistance – NMOS (1) RDS(ON)_BYP Bypass FET Resistance (1) Protection TSD Thermal Shutdown Temperature TSS Soft-Start time (1) Ideal = 2.5 x VREF (0.16V VREF 1.4V) -3 -50 ±5 ±25 VREF voltage that force MAP7154 into Sleep mode VREF voltage that exit MAP7154 from Sleep mode VREF voltage that force MAP7154 into Bypass mode VREF voltage that exit MAP7154 from Bypass mode 50 135 1.6 mV V 1.4 V VIN - VOUT 140 200 260 mV VIN - VOUT 265 380 495 mV VREF < 50mV VREF > 135mV VIN = 3.7V, VOUT from 5% to 95% (VOUT =1.4V ~ 3.4V), Rout=7Ω VIN = 3.7V, VOUT from 5% to 95% (VOUT =3.4V ~ 1.4V), Rout=7Ω 40 11 us us 10 us 10 us VIN = VGS =3.7V 0.23 Ω VIN = VGS =3.7V 0.15 Ω VIN = VGS =3.7V 0.21 Ω Shutdown Temperature Hysteresis, ΔTSD EN=Low to High; VIN =4.2V, VOUT =3.4V , COUT =4.7uF 150 25 °C Note 1: Guaranteed by design; not test in production. Note 2: Test condition: Open Loop test (only internal test setup), Linearity limits are ±3% or 50mV, whichever is larger. Aug. 2013 mV 50 us MAP7154 – 6MHz, 800mA Buck Converter for RFPA Electrical Characteristics Confidential Datasheet Version 1.0 Unless otherwise noted, VIN = EN = 3.7V, L1 = 0.47uH, COUT = 4.7uF, and TA = 25C. Shutdown Current vs Temperature Efficiency vs Output Voltage vs Input Voltage, RPA=10Ω Efficiency vs Output Current vs Input Voltage Aug. 2013 Quiescent Current vs Temperature Efficiency vs Output Voltage vs Input Voltage, RPA=5Ω Efficiency vs Output Current vs Input Voltage MAP7154 – 6MHz, 800mA Buck Converter for RFPA Typical Operating Characteristics Confidential Datasheet Version 1.0 Unless otherwise noted, VIN = EN = 3.7V, L1 = 0.47uH, COUT = 4.7uF and TA = 25C. Efficiency vs Output Current vs Input Voltage Load Regulation vs Output Current vs Input Voltage Load Regulation vs Output Current vs Input Voltage Load Regulation vs Output Current vs Input Voltage Output Voltage Ripple and Switching Waveform Output Voltage Ripple and Switching Waveform VOUT=0.5V, RAP=10Ω VOUT=2.5V, RAP=10Ω VSW(2V/div) VSW(2V/div) IL(500mA/div) IL(500mA/div) VOUT(10mV/div) VOUT(50mV/div) 2us/div Aug. 2013 200ns/div MAP7154 – 6MHz, 800mA Buck Converter for RFPA Typical Operating Characteristics - Continued Confidential Datasheet Version 1.0 Unless otherwise noted, VIN = EN = 3.7V, L1 = 0.47uH, COUT = 4.7uF and TA = 25C. Line Transient Response Line Transient Response VIN=3.6V to 4.2V, VOUT=1.0V, RAP=10Ω VIN=3.6V to 4.2V, VOUT=2.5V, RAP=10Ω VIN(500mV/div) VIN(500mV/div) VOUT(100mV/div) VOUT(100mV/div) 200us/div 200us/div Load Transient Response Load Transient Response VOUT=1.0V, IOUT=200mA to 800mA VOUT=2.5V, IOUT=200mA to 800mA IOUT(500mA/div) IOUT(500mA/div) VOUT(50mV/div) VOUT(50mV/div) 20us/div 20us/div Output Voltage Transient Response Output Voltage Transient and BYP Response VOUT=1.4V to 3.4V (ΔVOUT=2.0V), RAP=10Ω VREF=0.2V to 1.5V (ΔVREF=1.3V), RAP=10Ω VREF(1.0V/div) VREF(1.0V/div) VOUT(1.0V/div) VOUT(1.0V/div) 20us/div Aug. 2013 200us/div MAP7154 – 6MHz, 800mA Buck Converter for RFPA Typical Operating Characteristics - Continued Confidential Datasheet Version 1.0 Device Information The MAP7154 is a simple, a high efficiency synchronous step-down DC-DC converter optimized for powering RF power amplifiers (PA) with a single Li-Ion battery. It adjusts the output voltage by an external DAC. Regulated Vout is set to 2.5 Vref. The DC-DC operates in PWM mode or PFM mode, depending on the output voltage and load current. Bypass mode is supported where the output voltage is shorted to the input voltage via a low on-state resistance bypass FET. The inductor current is continuously monitored. A current sense flags when the P-MOS switch current exceeds the current limit and the switcher is turned off to decrease the inductor current sense flags when the N-MOS switch current exceeds the current limit and redirects discharging current through the inductor back to the battery. The output voltage of the DC-DC is determined by Vref, provided by an external DAC or voltage reference 2.5 VREF VOUT (1) The MAP7154 supports a wide range of load currents. High-current applications up to a DC output of 800mA, mandated by enabling the DCDC to run at either a 6MHz switching rate. Sleep mode The MAP7154 offers a sleep mode to minimize current, while also enabling a rapid return to regulation. Sleep mode is entered when Vref is held below 50mV for at least 40us. In this mode, current consumption is reduced to under 70uA. Sleep mode is exited after approximately 11us when Vref is set above 135mV. PFM (Pulse Frequency Modulation) Mode The MAP7154 automatically transitions to from PWM into PFM operation. At low output voltages and light load currents, typically less than 100mA; the DC-DC operates in a constant on-time mode. In the on-state, the P-MOS switch is turned on during a well-defined on time before switching to the off state, whereby the N-MOS switch is turned on and the inductor current is decreased to 0A. The switcher output is put into high-resistance state until the new regulation cycle starts. PFM mode realizes high efficiency while maintaining RF power amplifiers system performance down to low load currents. PWM (Pulse Width Modulation) Mode The MAP7154 operation in PWM mode, regulation starts with an on state where a P-MOS switch is turn on and inductor current is ramped up until the off state begins. In the off state, the P MOS switch is off and a N-MOS switch is turned on. The inductor current decreases to maintain an average value equal to the DC output load current. Aug. 2013 The DC-DC is able to provide a regulated Vout Bypass Mode The MAP7154 operates at 100% duty cycle with the bypass P-MOS switch turned on. This enables a very low voltage dropout with up to 2.4A DC output load current. In applications with 3G, 3.5G and 4G Pas, the Bypass mode typically handles 800mA. The trigger to enter bypass mode is based on the voltage difference between the battery voltage and the internally generated reference voltage, reference voltage, as depiction in below Figure. The DC-DC enters bypass mode when Vin=Vout+200mV. It then turns into 100% duty cycle and the low Rds(on) bypass P-MOS switch is turn on with switching P-MOS switcher. So In the bypass mode, enables a very low voltage dropout (=60mV) with up to 2.4A. As Vout approaches Vin the DC-DC operates in a constant off time mode, the frequency is decreased to achieve a high duty cycle and the system continues to run in a regulated mode until the bypass condition is satisfied. As noted above, bypass mode is also entered when Vref exceeds 1.5V. MAP7154 – 6MHz, 800mA Buck Converter for RFPA Operation Description Confidential Datasheet Version 1.0 VIN Bypass Controller FB BYP VREF SW PFM/PWM Controller Vout dynamic after Bypass EN, when BYP enters high, the controller dismisses the internal bypass flags and sensors and enables BYP. However, the dynamic is managed with the same current limit Thermal Protection If the junction temperature exceeds the maximum specified junction temperature, the MAP7154 enters Power Down Mode (Except the thermal detection circuit). PGND The bypass P-MOS switch is turned on progressively using a slew rate controller to limit the inrush current. The inrush current is expressed as a function of the specified slew rate as follow; I INRUSH COUT VOUT COUT VBP _ SLEW (2) t The slew rate controller is not used when releasing the bypass mode. Dynamic Adjustment Output Voltage The output of the MAP7154 can be dynamically adjusted by changing the voltage on the Vref pin. The MAP7154 realizes less than 10us transition times with a large output capacitor and output voltage ranges. Vout Positive Step and Vout Negative Step after a Vref positive step and Vref negative step, the DC-DC enters a current limit mode, where Vout ramps with a constant slew rate dictated by the output capacitor and the current limit. The Vout dynamic to or from bypass mode requires the bypass conditions be met. The MAP7154 performs detection of the bypass conditions after Vref dynamic and enables the required charging or discharging circuit to realize a transition time of 10us. Aug. 2013 Table 1. Mode Operation Descriptions NO 1 2 3 4 Mode Shutdown Mode Sleep Mode DCDC Mode Bypass Mode Operation Description Conditions BYP EN IC is disabled X X IC is disabled X H IC is enable X H Bypass FET is forced ON, DCDC is set to 100% Duty Cycle H H When Vout exceeds Vin-200mV, the bypass PMOS is enabled and the DC-DC operate by 100% duty cycle. When Vout Vin-380mV, the bypass P-MOS is disabled and the DC-DC operates by Auto Mode. MAP7154 – 6MHz, 800mA Buck Converter for RFPA Vout dynamic at start up, after EN rising edge is detected, the system requires 50us to enable all internal voltage references and amplifiers before enabling the DC-DC function. Confidential Datasheet Version 1.0 The below Figure illustrates an application of the MAP7154 in 3G, 3.5G, 4G transmitter. The MAP7154 is designed for driving multiple Pas. DAC (VREF) Control An analog voltage to the VREF pin can dynamically program the output voltage from 0.4V to 3.5V in both PFM and PWM modes of operation, without the need for external resistors. The output voltage is governed by V OUT = VREF * 2.5 ( VREF = 0.16V to 1.4V) MAP7154 Vbatt 2.7~4.5V VIN SW L1 0.47uH 0.4V to 3.4V Up to 800mArms Vout Cin 10uF Cout 4.7uF PA FB BB or RFIC GPIO EN GPIO BYP SGND VREF DAC PA PGND PA [Typical Application Diagram Supplying 3G, 3.5G, 4G Pas] EN VREF = 1.36V VREF = 1.36V VREF = 0.56V VREF VREF < 160mV VREF = 1.36V VREF = 0.56V ≤10us ≤10us ≤10us 3.4V VREF < 100mV ≤10us 3.4V 3.4V ≤10us 1.4V 1.4V VOUT 0.4V 10ms 10ms 10ms RF Power [Dynamic Timing Adjustment of Output Voltage and 3G ~ 4G Transmitters] Aug. 2013 0V MAP7154 – 6MHz, 800mA Buck Converter for RFPA Application Information Confidential Datasheet Version 1.0 Table 2. Recommended Inductors Inductor Fsw Description 0.47uH, 20%,3.1A 2520 TOKO:DFE252010C L1 6MHz 0.47uH, 20%,3.1A 2520 Murata:LQM2HPNR47MG0 Capacitor Selection The minimum required output capacitor Cout is 4.7uF, 6.3V, X5R with an ESR of 10m or lower and an ESL of 0.3nH or lower. Larger case sizes result in increased loop parasitic inductance and higher noise. Table3. Recommended Capacitors Capacitor Description CVin 10uF, 20%, X5R, 10V CVout 4.7uF, 20%, X5R, 6.3V CVref 470pF, 20%, X5R Vref Filter Vref is the analog control pin of the DC-DC and should be connected to an external Digital to Analog Converter (DAC). It is recommended to place up to 470pF decoupling capacitance between Vref and AGND to filter the DAC from the DC-DC high frequency switching noise coupled through the Vref pin. Any noise on the Vref input is transferred to Vout with a gain of two and a half(2.5). If the DAC output is noisy, a series resistor may be inserted the DAC output and the capacitor to form an RC filter. Follow these guidelines: Use a low noise source or a driver with good PSRR to generate Vref. The Vref driver must be referenced to AGND. Vcon routing must be protected against VIN, SW, PGND signals, and other noisy signals. Use AGND shielding for better isolation. Be sure the DAC output can drive the 470pF capacitor on Vref. It may be necessary to insert a low value resistor to ensure DAC stability without slowing Vref fast transition times. Aug. 2013 No Floating Inputs The MAP7154 does not have internal pull down resistors on its inputs. Therefore, unused inputs should not be left floating and should be pulled High or Low. PCB Layout and Component Placement Make the power ground PGND connection shared between U1, C1 and C2 compact. This minimizes the parasitic inductance of the switching loop paths. Place PGND on the top layer and connect it to the AGND ground plane next to Cout using several vias. Ensure that the routing loop, VIN PGND VOUT is the very shortest possible. Place the inductor away from the feedback pins to prevent unpredictable loop behavior. Use the application circuit layout from the datasheet whenever possible. Its performance has been verified. VIN and PGND must rout with the widest and shortest traces possible. It is acceptable for the traces connecting the inductor to be long rather than having long VIN or PGND traces. The SW node is a source of electrical switching noise. Do not route it near sensitive analog signals. Two small vias are used to connect the SW node to the inductor L1. Use solders filled vias if available. The connection from Cout to FB should be wide to minimize the Bypass mode voltage drop and the series inductance. Even if the current in Bypass Mode is small, keep this trace short and at least 5mm wide. MAP7154 – 6MHz, 800mA Buck Converter for RFPA Inductor Selection The MAP7154 is operating at 6MHz switching frequency, which allows for the use of a 0.47uH inductor. Confidential Datasheet Version 1.0 PCB Layout Example [ PCB Top Side ] Each capacitor should have at least two dedicated ground vias. Place vias within 0.1mm of the capacitors. Ensure the traces are wide enough to handle the maximum current value, especially in Bypass Mode. Ensure the vias are able to handle the current density. Use metal filled vias if available. Assembly Use metal-filled or solder-filled vias if available. Poor soldering can cause low DC-DC conversion efficiency. If the efficiency is low, Xray the solder connections to verify their integrity. [ PCB Bottom Side ] Aug. 2013 MAP7154 – 6MHz, 800mA Buck Converter for RFPA The ground plane should be not be broken into pieces. Ground currents must have a direct, wide path from input to output. Confidential Datasheet Version 1.0 MAP7154 – 6MHz, 800mA Buck Converter for RFPA Physical Dimensions - 1.32mmX1.27mm, 0.40mm pitch, 9 bumps WLCSP MagnaChip Semiconductor Ltd. doesn’t not recommend the use of its products in hostile environments, including, without limitation, aircraft, nuclear power generation, medical appliances, and devices or systems in which malfunction of any product can reasonably be expected to result in a personal injury. Seller’s customers using or selling Seller’s products for use in such applications do so at their own risk and agree to fully defend and indemnify Seller. MagnaChip reserves the right to change the specifications and circuitry without notice at any time. MagnaChip does not consider responsibility for use of any circuitry other than circuitry entirely included in a MagnaChip product. is a registered trademark of MagnaChip Semiconductor Ltd. MagnaChip Semiconductor Ltd. 891, Daechi-Dong, Kangnam-Gu, Seoul, 135-738 Korea Tel : 82-2-6903-3451 / Fax : 82-2-6903-3668 ~9 www.magnachip.com Aug. 2013