GeneSiC GA20JT06-CAL Normally â off silicon carbide junction transistor Datasheet

Die Datasheet
Normally – OFF Silicon Carbide
Junction Transistor
GA20JT06-CAL
VDS
RDS(ON)
ID (Tc = 25°C)
hFE(Tc = 25°C)
=
=
=
=
600 V
65 mΩ
45 A
110
Features
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
250°C maximum operating temperature
Gate Oxide Free SiC switch
Exceptional Safe Operating Area
Excellent Gain Linearity
Temperature Independent Switching Performance
Low Output Capacitance
Positive Temperature Co-efficient of RDS,ON
Suitable for connecting an anti-parallel diode
Advantages
Applications




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

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Compatible with Si MOSFET/IGBT gate-drivers
> 20 µs Short-Withstand Capability
Lowest-in-class Conduction Losses
High Circuit Efficiency
Minimal Input Signal Distortion
High Amplifier Bandwidth
Down Hole Oil Drilling, Geothermal Instrumentation
Hybrid Electric Vehicles (HEV)
Solar Inverters
Switched-Mode Power Supply (SMPS)
Power Factor Correction (PFC)
Induction Heating
Uninterruptible Power Supply (UPS)
Motor Drives
Electrical Specifications
Absolute Maximum Ratings
Parameter
Drain – Source Voltage
Continuous Drain Current
Gate Peak Current
Symbol
VDS
ID
IGM
Turn-Off Safe Operating Area
RBSOA
Short Circuit Safe Operating Area
SCSOA
Reverse Gate – Source Voltage
Reverse Drain – Source Voltage
Operating and Storage Temperature
Conditions
VGS = 0 V
TVJ < 250 °C
TVJ = 250 oC, IG = 1 A,
Clamped Inductive Load
TVJ = 250 oC, IG = 1 A, VDS = 400 V,
Non Repetitive
VGS
VDS
Tj, Tstg
Values
600
20
10
ID,max = 20
@ VDS ≤ VDSmax
Unit
V
A
A
20
µs
30
40
-55 to 250
V
V
°C
A
Electrical Characteristics
Parameter
Values
typ.
Symbol
Conditions
Drain – Source On Resistance
RDS(ON)
ID = 20 A, IG = 400 mA, Tj = 25 °C
ID = 20 A, IG = 500 mA, Tj = 125 °C
ID = 20 A, IG = 1000 mA, Tj = 175 °C
ID = 20 A, IG = 1000 mA, Tj = 250 °C
Gate Forward Voltage
VGS(FWD)
IG = 1000 mA, Tj = 25 °C
IG = 1000 mA, Tj = 250 °C
hFE
VDS = 5 V, ID = 20 A, Tj = 25 °C
VDS = 5 V, ID = 20 A, Tj = 125 °C
VDS = 5 V, ID = 20 A, Tj = 175 °C
VDS = 5 V, ID = 20 A, Tj = 250 °C
65
90
110
165
3.0
2.7
110
78
73
69
10
100
20
2500
160
min.
max.
Unit
On Characteristics
DC Current Gain
mΩ
V
Off Characteristics
Drain Leakage Current
IDSS
Gate – Source Leakage Current
IGSS
VR = 600 V, VGS = 0 V, Tj = 25 °C
VR = 600 V, VGS = 0 V, Tj = 250 °C
VGS = -20 V, Tj = 25 °C
Ciss
Crss/Coss
VGS = 0 V, VD = 100 V, f = 1 MHz
VD = 100 V, f = 1 MHz
µA
nA
Capacitance Characteristics
Input Capacitance
Reverse Transfer/Output Capacitance
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pF
pF
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Die Datasheet
GA20JT06-CAL
Figure 1: Typical Output Characteristics at 25 °C
Figure 2: Typical Output Characteristics at 125 °C
Figure 3: Typical Output Characteristics at 175 °C
Figure 4: Typical Output Characteristics at 250 °C
Figure 5: Typical Gate Source I-V Characteristics vs.
Temperature
Figure 4: Normalized On-Resistance and Current Gain vs.
Temperature
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Die Datasheet
Figure 7: Typical Blocking Characteristics
August 2014
GA20JT06-CAL
Figure 8: Capacitance Characteristics
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Die Datasheet
GA20JT06-CAL
Gate Drive Theory of Operation
The SJT transistor is a current controlled transistor which requires a positive gate current for turn-on as well as to remain in on-state. An ideal
gate current waveform for ultra-fast switching of the SJT, while maintaining low gate drive losses, is shown in Figure 9.
Figure 9: Idealized Gate Current Waveform
Gate Currents, IG,pk/-IG,pk and Voltages during Turn-On and Turn-Off
An SJT is rapidly switched from its blocking state to on-state, when the necessary gate charge, QG, for turn-on is supplied by a burst of high
gate current, IG,on, until the gate-source capacitance, CGS, and gate-drain capacitance, CGD, are fully charged.
,
The IG,pon pulse should ideally terminate, when the drain voltage falls to its on-state value, in order to avoid unnecessary drive losses during
the steady on-state. In practice, the rise time of the IG,on pulse is affected by the parasitic inductances, Lpar in the package and drive circuit. A
voltage developed across the parasitic inductance in the source path, Ls, can de-bias the gate-source junction, when high drain currents begin
to flow through the device. The applied gate voltage should be maintained high enough, above the VGS,ON level to counter these effects.
A high negative peak current, -IG,off is recommended at the start of the turn-off transition, in order to rapidly sweep out the injected carriers from
the gate, and achieve rapid turn-off. While satisfactory turn off can be achieved with VGS = 0 V, a negative gate voltage VGS may be used in
order to speed up the turn-off transition.
Steady On-State
After the device is turned on, IG may be advantageously lowered to IG,steady for reducing unnecessary gate drive losses. The IG,steady is
determined by noting the DC current gain, hFE, of the device
The desired IG,steady is determined by the peak device junction temperature TJ during operation, drain current ID, DC current gain hFE, and a
50 % safety margin to ensure operating the device in the saturation region with low on-state voltage drop by the equation:
,
August 2014
,
1.5
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Die Datasheet
GA20JT06-CAL
Mechanical Specifications
Mechanical Parameters
mm
2
112 x 112
mil
2
8.12/6.60
mm
2
12544/10237
mil
2
Thickness
360
µm
14
mil
Wafer Size
100
mm
3937
mil
0
deg
0
deg
Raster Size
2.85 x 2.85
Area total / active
Flat Position
Passivation frontside
Polyimide
Pad Metal (Anode)
4000 nm Al
Backside Metal (Cathode)
400 nm Ni + 200 nm Au -system
Die Bond
Electrically conductive glue or solder
Wire Bond
Al ≤ 10 mil (Source)
Al ≤ 3 mil (Gate)
Reject ink dot size
Φ ≥ 0.3 mm
Store in original container, in dry nitrogen,
Recommended storage environment
< 6 months at an ambient temperature of 23 °C
Chip Dimensions:
A
C
mm
E
DIE
F
G
D
B
SOURCE
WIREBONDABLE
H
GATE
WIREBONDABLE
August 2014
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mil
A
2.85
112
B
2.85
112
C
2.23
88
D
2.29
90
E
0.30
12
F
0.53
21
G
0.44
17
H
0.43
17
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Die Datasheet
GA20JT06-CAL
Revision History
Date
Revision
Comments
2014/08/26
3
Updated Electrical Characteristics
2014/04/29
2
Updated Electrical Characteristics
2014/02/27
1
Updated Electrical Characteristics
2013/12/04
0
Initial release
Supersedes
Published by
GeneSiC Semiconductor, Inc.
43670 Trade Center Place Suite 155
Dulles, VA 20166
GeneSiC Semiconductor, Inc. reserves right to make changes to the product specifications and data in this document without notice.
GeneSiC disclaims all and any warranty and liability arising out of use or application of any product. No license, express or implied to any
intellectual property rights is granted by this document.
Unless otherwise expressly indicated, GeneSiC products are not designed, tested or authorized for use in life-saving, medical, aircraft
navigation, communication, air traffic control and weapons systems, nor in applications where their failure may result in death, personal
injury and/or property damage.
August 2014
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GA20JT06-CAL
SPICE Model Parameters
This is a secure document. Please copy this code from the SPICE model PDF file on our website
(http://www.genesicsemi.com/images/hit_sic/baredie/sjt/GA20JT06-CAL_SPICE.pdf) into LTSPICE
(version 4) software for simulation of the GA20JT06-CAL.
*
MODEL OF GeneSiC Semiconductor Inc.
*
*
$Revision:
1.1
$
*
$Date:
27-FEB-2014
$
*
*
GeneSiC Semiconductor Inc.
*
43670 Trade Center Place Ste. 155
*
Dulles, VA 20166
*
*
COPYRIGHT (C) 2013 GeneSiC Semiconductor Inc.
*
ALL RIGHTS RESERVED
*
* These models are provided "AS IS, WHERE IS, AND WITH NO WARRANTY
* OF ANY KIND EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED
* TO ANY IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE."
* Models accurate up to 2 times rated drain current.
*
.model GA20JT06 NPN
+ IS
5.00E-47
+ ISE
1.26E-28
+ EG
3.23
+ BF
114
+ BR
0.55
+ IKF
700
+ NF
1
+ NE
2
+ RB
0.26
+ RE
0.01
+ RC
0.045
+ CJC
8.2281E-10
+ VJC
3.311262797257
+ MJC
0.4811772789929
+ CJE
2.33957E-9
+ VJE
2.91486059646
+ MJE
0.4821112143335
+ XTI
3
+ XTB
-1.2
+ TRC1
6.20E-03
+ VCEO
600
+ ICRATING 20
+ MFG
GeneSiC_Semiconductor
*
* End of GA20JT06-CAL SPICE Model
April 2014
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
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