Lyontek LY61L25732A 256k x 32 bit high speed cmos sram Datasheet


LY61L25732A
256K X 32 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
REVISION HISTORY
Revision
Rev. 1.0
Description
Initial Issued
Issue Date
Jan.04.2017
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
0

LY61L25732A
256K X 32 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
FEATURES
GENERAL DESCRIPTION
 Fast access time : 10ns
 Low power consumption:
Operating current : 125mA (TYP.)
Standby current : 4mA (TYP.)
 Single 3.3V power supply
 All inputs and outputs TTL compatible
 Fully static operation
 Tri-state output
 Data byte control : B0# (DQ0 ~ DQ7)
B1# (DQ8 ~ DQ15)
B2# (DQ16~DQ23)
B3# (DQ24~DQ31)
 Data retention voltage : 1.5V (MIN.)
 Green package available
 Package : 90-ball 8mm x 13mm TFBGA
The LY61L25732A is a 8M-bit high speed CMOS
static random access memory organized as 256K
words by 32 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of operating
temperature.
The LY61L25732A operates from a single power
supply of 3.3V and all inputs and outputs are fully
TTL compatible
PRODUCT FAMILY
Product
Family
LY61L25732A
LY61L25732A(I)
Operating
Temperature
0 ~ 70℃
-40 ~ 85℃
VCC Range
Speed
2.7 ~ 3.6V
2.7 ~ 3.6V
10ns
10ns
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
Vcc
Vss
A0-A17
DECODER
256Kx32
MEMORY ARRAY
DQ0-DQ7
DQ8-DQ15
DQ16-DQ23
I/O DATA
CIRCUIT
COLUMN I/O
DQ24-DQ31
CE#
CE2
WE#
OE#
B0#-B3#
Power Dissipation
Standby(ISB1,TYP.) Operating(ICC,TYP.)
4mA
125mA
4mA
125mA
SYMBOL
DESCRIPTION
A0 - A17
Address Inputs
DQ0 - DQ31
Data Inputs/Outputs
CE#, CE2
Chip Enable Input
WE#
Write Enable Input
OE#
Output Enable Input
B0# - B3#
Byte Control
VCC
Power Supply
VSS
Ground
NC
No Connection
CONTROL
CIRCUIT
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
1

LY61L25732A
256K X 32 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
PIN CONFIGURATION
A
DQ1 DQ0 Vss
Vcc DQ31 DQ30
B
DQ2 Vcc
Vcc
C
Vss DQ3 DQ4
DQ27 DQ28 Vcc
D
Vss DQ6 DQ5
DQ26 DQ25 Vcc
E
Vcc DQ7
NC
NC DQ24 Vss
F
Vss
B0#
A3
A4
B3#
Vcc
G
A0
A1
A2
A10
A5
A6
H
A15
A14
A13
A8
A7
A11
J
CE2 A17
A16
A9
A12 CE#
K
B1#
NC
OE# WE# B2#
L
Vcc DQ8 Vss
Vcc DQ23 Vss
M
Vss DQ9 DQ10
DQ21 DQ22 Vcc
N
Vss DQ12 DQ11
DQ20 DQ19 Vcc
P
DQ13 Vcc
R
DQ14 DQ15 Vss
1
Vss
Vcc
Vss DQ29
LY61L25732A
XXXXXXXX
XXXXXXXX
NC
Vss
Vss DQ18
Vcc DQ16 DQ17
2
3
7
8
TFBGA(See through with Top View)
9
TFBGA (Top View)
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
2

LY61L25732A
256K X 32 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
ABSOLUTE MAXIMUN RATINGS*
PARAMETER
Voltage on VCC relative to VSS
Voltage on any other pin relative to VSS
SYMBOL
VT1
VT2
Operating Temperature
TA
Storage Temperature
Power Dissipation
DC Output Current
TSTG
PD
IOUT
RATING
-0.5 to 4.6
-0.5 to VCC+0.5
0 to 70(C grade)
-40 to 85(I grade)
-65 to 150
1
50
UNIT
V
V
℃
℃
W
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is
not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
Standby
Output Disable
Read
Write
Note:
CE# CE2 OE# WE# B0# B1# B0# B1#
H
X
L
L
L
L
L
L
L
L
L
L
L
L
X
L
H
H
H
H
H
H
H
H
H
H
H
H
X
X
H
X
L
L
L
L
L
X
X
X
X
X
X
X
H
X
H
H
H
H
H
L
L
L
L
L
X
X
X
H
L
H
H
H
L
L
H
H
H
L
X
X
X
H
H
L
H
H
L
H
L
H
H
L
X
X
X
H
H
H
L
H
L
H
H
L
H
L
X
X
X
H
H
H
H
L
L
H
H
H
L
L
I/O OPERATION
DQ8-15 DQ16-23 DQ24-31 CURRENT
High-Z
High-Z
High-Z
High-Z
DOUT
High-Z
High-Z
High-Z
DOUT
DIN
High-Z
High-Z
High-Z
DIN
High-Z
High-Z
High-Z
High-Z
High-Z
DOUT
High-Z
High-Z
DOUT
High-Z
DIN
High-Z
High-Z
DIN
H = VIH, L = VIL, X = Don't care.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
3
SUPPLY
DQ0-7
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
DOUT
High-Z
DOUT
High-Z
High-Z
DIN
High-Z
DIN
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
DOUT
DOUT
High-Z
High-Z
High-Z
DIN
DIN
ISB1
ICC
ICC
ICC

LY61L25732A
256K X 32 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
DC ELECTRICAL CHARACTERISTICS
PARAMETER
Supply Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage
Current
Output High Voltage
Output Low Voltage
Average Operating
Power supply
Current
Standby Power
Supply Current
SYM.
TEST CONDITION
VCC
VIH*1
VIL*2
ILI
VCC ≧ VIN ≧ VSS
VCC ≧ VOUT ≧ VSS,
ILO
Output Disabled
VOH
IOH = -4mA
VOL
IOL = 8mA
CE# ≦ 0.2V and CE2 ≧ VCC-0.2V,
ICC
other pins at 0.2V or VCC-0.2V,
II/O = 0mA; f=max.
CE# ≧ VCC - 0.2V;
ISB1
other pins at 0.2V or VCC-0.2V.
MIN.
2.7
2.2
- 0.3
-1
TYP. *4 MAX.
3.3
3.6
VCC+0.3
0.8
1
-1
-
1
µA
2.4
-
-
0.4
V
V
-10
-
125
180
mA
-12
-
115
170
mA
-
4
40
mA
Notes:
1. VIH(MAX.) = VCC + 2.0V for pulse width less than 6ns.
2. VIL(MIN.) = VSS - 2.0V for pulse width less than 6ns.
3. Over/Undershoot specifications are characterized on engineering evaluation stage, not for mass production test.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at VCC = VCC(TYP.) and TA = 25℃
CAPACITANCE (TA = 25℃, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
CIN
CI/O
MIN.
-
MAX.
8
10
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Speed
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
10/12ns
0.2V to VCC-0.2V
3ns
VCC/2
CL = 30pF + 1TTL, IOH/IOL = -4mA/8mA
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
4
UNIT
V
V
V
µA
UNIT
pF
pF

LY61L25732A
256K X 32 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
Byte Control Access Time
Byte Control to High-Z Output
Byte Control to Low-Z Output
SYM.
tRC
tAA
tACE
tOE
tCLZ*
tOLZ*
tCHZ*
tOHZ*
tOH
tBA
tBHZ*
tBLZ*
LY61L25732A-10
MIN.
MAX.
10
10
10
4.5
2
0
4
4
2
4.5
4
0
-
LY61L25732A-12
MIN.
MAX.
12
12
12
5
3
0
5
5
2
5
5
0
-
LY61L25732A-10
MIN.
MAX.
10
8
8
0
8
0
6
0
2
4
8
-
LY61L25732A-12
MIN.
MAX.
12
10
10
0
10
0
7
0
2
5
10
-
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
Byte Control Valid to End of Write
SYM.
tWC
tAW
tCW
tAS
tWP
tWR
tDW
tDH
tOW *
tWHZ*
tBW
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
5
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

LY61L25732A
256K X 32 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
tRC
Address
tAA
Dout
tOH
Previous Data Valid
Data Valid
READ CYCLE 2 (CE# and CE2 and OE# Controlled) (1,3,4,5)
tRC
Address
tAA
CE#
tACE
CE2
B0#-B3#
tBA
OE#
tOE
tOH
tOHZ
tBHZ
tCHZ
tOLZ
tBLZ
tCLZ
Dout
High-Z
Data Valid
High-Z
Notes :
1.WE# is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low, CE2 = high, and B0#, B1#, B2# or B3# = low.
3.Address must be valid prior to or coincident with CE# = low, CE2 = high, and B0#, B1#, B2# or B3# = low transition; otherwise tAA is the
limiting parameter.
4.tCLZ, tBLZ, tOLZ, tCHZ, tBHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tBHZ is less than tBLZ, tOHZ is less than tOLZ.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
6

LY61L25732A
256K X 32 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
WRITE CYCLE 1 (WE# Controlled) (1,2,4,5)
tWC
Address
tAW
CE#
tCW
CE2
tBW
B0#-B3#
tAS
tWP
tWR
WE#
tWHZ
Dout
tOW
High-Z
(4)
(4)
tDW
Din
tDH
Data Valid
WRITE CYCLE 2 (CE# and CE2 Controlled) (1,4,5)
tWC
Address
tAW
CE#
tAS
tWR
tCW
CE2
tBW
B0#-B3#
tWP
WE#
tWHZ
Dout
High-Z
(4)
tDW
Din
tDH
Data Valid
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
7

LY61L25732A
256K X 32 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
WRITE CYCLE 3 (B0# ~ B3# Controlled) (1,4,5)
tWC
Address
tAW
tWR
CE#
tAS
tCW
CE2
tBW
B0#-B3#
tWP
WE#
tWHZ
Dout
High-Z
(4)
tDW
Din
tDH
Data Valid
Notes :
1.A write occurs during the overlap of a low CE#, high CE2, low WE#, and B0#, B1#, B2# or B3# = low.
2.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be placed
on the bus.
3.During this period, I/O pins are in the output state, and input signals must not be applied.
4.If the CE#, B0# ~ B3# low transition and CE2 high transition occurs simultaneously with or after WE# low transition, the outputs remain in a
high impedance state.
5.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
8

LY61L25732A
256K X 32 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
DATA RETENTION CHARACTERISTICS
PARAMETER
VCC for Data Retention
SYMBOL
TEST CONDITION
VDR
CE# ≧ VCC - 0.2V or CE2 ≦ 0.2V
VCC = 1.5V
Data Retention Current
IDR
CE# ≧ VCC - 0.2V or CE2 ≦ 0.2V
Other pins at 0.2V or VCC-0.2V
Chip Disable to Data
tCDR
See Data Retention Waveforms (below)
Retention Time
Recovery Time
tR
tRC* = Read Cycle Time
MIN.
1.5
TYP.
-
MAX.
3.6
UNIT
V
-
4
40
mA
0
-
-
ns
tRC*
-
-
ns
DATA RETENTION WAVEFORM
Low VCC Data Retention Waveform (1) (CE# controlled)
VDR ≧ 1.5V
Vcc
Vcc(min.)
Vcc(min.)
tCDR
CE#
VIH
tR
CE# ≧ Vcc-0.2V
VIH
Low VCC Data Retention Waveform (2) (CE2 controlled)
VDR ≧ 1.5V
Vcc
Vcc(min.)
Vcc(min.)
tCDR
CE2
tR
CE2 ≦ 0.2V
VIL
VIL
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
9

LY61L25732A
Rev. 1.0
256K X 32 BIT HIGH SPEED CMOS SRAM
PACKAGE OUTLINE DIMENSION
90-ball 8mm × 13mm TFBGA Package Outline Dimension
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
10

LY61L25732A
256K X 32 BIT HIGH SPEED CMOS SRAM
Rev. 1.0
ORDERING INFORMATION
Package Type
90-ball
Access Time
Temperature
(Speed/ns)
Range(℃)
10
0℃~70℃
(8mm x 13mm)
TFBGA
-40℃~85℃
Packing
Type
Tray
Tape Reel
Tray
Tape Reel
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
11
Lyontek Item No.
LY61L25732AGL-10
LY61L25732AGL-10T
LY61L25732AGL-10I
LY61L25732AGL-10IT

LY61L25732A
Rev. 1.0
256K X 32 BIT HIGH SPEED CMOS SRAM
THIS PAGE IS LEFT BLANK INTENTIONALLY.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
2F, No.17, Industry E. Rd. II, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
12
Similar pages