Fairchild IRFR120ATM Avalanche rugged technology Datasheet

IRFR/U120A
Advanced Power MOSFET
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
RDS(on) = 0.2 Ω
Rugged Gate Oxide Technology
Lower Input Capacitance
ID = 8.4 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V
Lower RDS(ON) : 0.155 Ω (Typ.)
D-PAK
I-PAK
2
1
1
3
2
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
VDSS
Characteristic
Drain-to-Source Voltage
Value
Ο
ID
Continuous Drain Current (TC=25 C)
Continuous Drain Current (TC=100 C)
VGS
Gate-to-Source Voltage
EAS
Single Pulsed Avalanche Energy
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
dv/dt
Peak Diode Recovery dv/dt
34
A
+
_ 20
O
1
O
1
O
3
O
2
Total Power Dissipation (TA=25 C ) *
Ο
Ο
Total Power Dissipation (TC=25 C )
Linear Derating Factor
TJ , TSTG
A
5.3
1
O
Drain Current-Pulsed
V
8.4
Ο
IDM
PD
Units
100
Operating Junction and
V
141
mJ
8.4
A
3.2
mJ
6.5
V/ns
2.5
W
32
W
0.26
W/ C
Ο
- 55 to +150
Storage Temperature Range
Ο
TL
Maximum Lead Temp. for Soldering
C
300
Purposes, 1/8” from case for 5-seconds
Thermal Resistance
Symbol
Characteristic
Typ.
Max.
R θ JC
Junction-to-Case
--
3.9
R θ JA
Junction-to-Ambient *
--
50
Rθ JA
Junction-to-Ambient
--
110
Units
Ο
C /W
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B
©1999 Fairchild Semiconductor Corporation
N-CHANNEL
POWER MOSFET
IRFR/U120A
Electrical Characteristics (TCC=25 C unless otherwise specified)
Ο
Symbol
Characteristic
BVDSS
Drain-Source Breakdown Voltage
∆ BV/ ∆TJ
VGS(th)
IGSS
IDSS
RDS(on)
Min. Typ. Max. Units
Breakdown Voltage Temp. Coeff.
100
--
--
0.12
--
--
4.0
Gate-Source Leakage , Forward
--
--
100
Gate-Source Leakage , Reverse
--
--
-100
--
--
10
--
--
100
--
--
0.2
Ω
VGS=10V,ID=4.2A
4
O
Ω
VDS=40V,ID=4.2A
4
O
Drain-to-Source Leakage Current
Static Drain-Source
On-State Resistance
--
6.29
--
Ciss
Input Capacitance
--
370
480
Coss
Output Capacitance
--
95
110
Crss
Reverse Transfer Capacitance
--
38
45
td(on)
Turn-On Delay Time
--
14
40
Rise Time
--
14
40
Turn-Off Delay Time
--
36
90
Fall Time
--
28
70
Qg
Total Gate Charge
--
16
22
Qgs
Gate-Source Charge
--
2.7
--
Qgd
Gate-Drain(“Miller”) Charge
--
7.8
--
tf
Ο
--
Forward Transconductance
td(off)
VGS=0V,ID=250 µA
See Fig 7
V/ C ID=250µ A
VDS=5V,ID=250 µA
V
V
2.0
Gate Threshold Voltage
gfs
tr
Test Condition
nA
µA
pF
VGS=20V
VGS=-20V
VDS=100V
Ο
VDS=80V,TC=125 C
VGS=0V,VDS=25V,f =1MHz
See Fig 5
VDD=50V,ID=9.2A,
ns
RG=18Ω
See Fig 13
4 O
5
O
VDS=80V,VGS=10V,
nC
ID=9.2A
See Fig 6 & Fig 12
4 O
5
O
Source-Drain Diode Ratings and Characteristics
Symbol
Characteristic
Min. Typ. Max. Units
Test Condition
IS
Continuous Source Current
--
--
ISM
Pulsed-Source Current
1
O
--
--
34
VSD
Diode Forward Voltage
4
O
--
--
1.5
V
TJ=25 C ,IS=8.4A,VGS=0V
trr
Reverse Recovery Time
--
98
--
ns
TJ=25 C ,IF=9.2A
Qrr
Reverse Recovery Charge
--
0.34
--
µC
diF/dt=100A/ µs
8.4
A
Notes ;
Temperature
1
O Repetitive Rating : Pulse Width Limited by Maximum Junction
o
2
L=3mH, I AS=8.4A, V DD=25V, R G=27Ω , Starting T J =25 C
O
O3 ISD <_ 9.2A, di/dt <_ 300A/ µs, V DD <_ BVDSS , Starting T J =25oC
_2%
4 Pulse Test : Pulse Width = 250 µs, Duty Cycle <
O
Essentially
Independent
of
Operating
Temperature
5
O
Integral reverse pn-diode
in the MOSFET
Ο
Ο
4
O
N-CHANNEL
POWER MOSFET
IRFR/U120A
Fig 1. Output Characteristics
Fig 2. Transfer Characteristics
VGS
101
ID , Drain Current
ID , Drain Current
101
[A]
15V
10 V
8.0 V
7.0 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
[A]
Top :
100
@ Notes :
1. 250 µs Pulse Test
2. TC = 25 oC
10-1
100
150 oC
100
25 oC
@ Notes :
1. VGS = 0 V
2. VDS = 40 V
- 55 oC
10-1
101
2
4
6
8
10
VGS , Gate-Source Voltage [V]
[A]
VDS , Drain-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
0.4
IDR , Reverse Drain Current
RDS(on) , [Ω]
Drain-Source On-Resistance
3. 250 µs Pulse Test
VGS = 10 V
0.3
0.2
VGS = 20 V
0.1
@ Note : TJ = 25 oC
10
20
30
100
40
@ Notes :
1. VGS = 0 V
2. 250 µs Pulse Test
150 oC
25 oC
10-1
0.4
0.0
0
101
ID , Drain Current [A]
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
Fig 6. Gate Charge vs. Gate-Source Voltage
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
Crss= Cgd
400
C oss
@ Notes :
1. VGS = 0 V
200
C rss
00
10
VDS = 20 V
10
2. f = 1 MHz
101
VDS , Drain-Source Voltage [V]
VGS , Gate-Source Voltage
Capacitance
[pF]
C iss
[V]
600
VDS = 50 V
VDS = 80 V
5
@ Notes : ID = 9.2 A
0
0
5
10
15
QG , Total Gate Charge [nC]
20
N-CHANNEL
POWER MOSFET
Fig 7. Breakdown Voltage vs. Temperature
1.2
1.1
1.0
0.9
Fig 8. On-Resistance vs. Temperature
RDS(on) , (Normalized)
Drain-Source On-Resistance
BVDSS , (Normalized)
Drain-Source Breakdown Voltage
IRFR/U120A
@ Notes :
1. VGS = 0 V
2. ID = 250 µA
0.8
-75
-50
-25
0
25
50
75
100
125
150
3.0
2.5
2.0
1.5
1.0
@ Notes :
1. VGS = 10 V
0.5
2. ID = 4.6 A
0.0
-75
175
-50
-25
0
25
50
75
100
125
150
175
TJ , Junction Temperature [ oC]
TJ , Junction Temperature [ oC]
Fig 9. Max. Safe Operating Area
Fig 10. Max. Drain Current vs. Case Temperature
[A]
ID , Drain Current
Operation in This Area
is Limited by R DS(on)
10 µs
100 µs
101
1 ms
10 ms
DC
100
@ Notes :
1. TC = 25 oC
8
6
4
2
2. TJ = 150 oC
3. Single Pulse
10-1
100
101
0
25
102
50
75
100
Tc , Case Temperature [ oC]
VDS , Drain-Source Voltage [V]
Thermal Response
Fig 11. Thermal Response
D=0.5
100
0.2
@ Notes :
1. Zθ J C (t)=3.9
0.1
0.05
10- 1
0.02
0.01
o C/W
Max.
2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
PDM
single pulse
t1
t2
θ
Z JC(t) ,
ID , Drain Current
[A]
10
102
10- 5
10- 4
10- 3
10- 2
10- 1
t 1 , Square Wave Pulse Duration
100
[sec]
101
125
150
N-CHANNEL
POWER MOSFET
IRFR/U120A
Fig 12. Gate Charge Test Circuit & Waveform
“ Current Regulator ”
12V
VGS
Same Type
as DUT
50K Ω
Qg
200nF
10V
300nF
VDS
Qgd
Qgs
VGS
DUT
3mA
R1
R2
Current Sampling (I G)
Resistor
Charge
Current Sampling (I D)
Resistor
Fig 13. Resistive Switching Test Circuit & Waveforms
RL
Vout
Vout
90%
VDD
Vin
( 0.5 rated V DS )
RG
DUT
Vin
10V
10%
td(on)
tr
td(off)
t on
tf
t off
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- LL IAS2 -------------------2
BVDSS -- VDD
LL
VDS
Vary tp to obtain
required peak ID
BVDSS
IAS
ID
RG
C
DUT
ID (t)
VDD
VDS (t)
VDD
10V
tp
tp
Time
N-CHANNEL
POWER MOSFET
IRFR/U120A
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
--
IS
L
Driver
VGS
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by “RG”
• IS controlled by Duty Factor “D”
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
IS
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
Vf
Body Diode
Forward Voltage Drop
VDD
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effectiveness.
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Definition of Terms
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Definition
Advance Information
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In Design
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product development. Specifications may change in
any manner without notice.
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supplementary data will be published at a later date.
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changes at any time without notice in order to improve
design.
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