Diodes DMP56D0UFB-7 Low on-resistance Datasheet

DMP56D0UFB
Green
Product Summary
V(BR)DSS
RDS(ON)
-50V
6Ω @ VGS = -4 V
8Ω @ VGS = -2.5V
P-CHANNEL ENHANCEMENT MODE MOSFET
Features and Benefits







ID
TA = +25°C
-200mA
-160mA
Description
This new generation MOSFET is designed to minimize the on-state
resistance (RDS(on)) and yet maintain superior switching
Mechanical Data
performance, making it ideal for high efficiency power management
applications.


Applications





Low On-Resistance
ESD Protected Gate
Low Input/Output Leakage
Fast Switching Speed
Lead-Free Finish; RoHS Compliant (Notes 1 & 2)
Halogen and Antimony Free. “Green” Device (Note 3)
Qualified to AEC-Q101 Standards for High Reliability
DC-DC Converters
Power Management Functions
Battery Operated Systems and Solid-State Relays


Case: X1-DFN1006-3
Case Material: Molded Plastic, “Green” Molding Compound;
UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020
Terminals: Finish  NiPdAu over Copper Leadframe;
Solderable per MIL-STD-202, Method 208 e4
Terminal Connections: See Diagram
Weight: 0.001 grams (Approximate)
Drain
Body
Diode
X1-DFN1006-3
Gate
S
D
G
ESD PROTECTED
Bottom View
Top View
Internal Schematic
Gate
Protection
Diode
Source
Equivalent Circuit
Ordering Information (Note 4)
Notes:
Part Number
Case
Packaging
DMP56D0UFB-7
X1-DFN1006-3
3,000/Tape & Reel
DMP56D0UFB-7B
X1-DFN1006-3
10,000/Tape & Reel
1. EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. All applicable RoHS exemptions applied.
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green"
and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
4. For packaging details, go to our website at http://www.diodes.com/products/packages.html
DMP56D0UFB
Document number: DS36175 Rev. 3 - 2
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May 2015
© Diodes Incorporated
DMP56D0UFB
Marking Information
From date code 1527 (YYWW),
this changes to:
D3
D3
Top View
Bar Denotes Gate and Source Side
Top View
Dot Denotes Drain Side
D3
D3
D3
D3
D3
D3
DMP56D0UFB-7
D3
Top View
Bar Denotes Gate and Source Side
D3 = Part Marking Code
D3
D3
D3
DMP56D0UFB-7B
Maximum Ratings (@TA = +25°C, unless otherwise specified.)
Characteristic
Drain-Source Voltage
Gate-Source Voltage
Drain Current (Note 5)
Steady
Pulsed Drain Current (Note 6)
TA = +25°C
Symbol
VDSS
VGSS
ID
IDM
Value
-50
±8
-200
-700
Units
V
V
mA
mA
Symbol
PD
RθJA
TJ, TSTG
Value
425
275
-55 to +150
Units
mW
°C/W
°C
Thermal Characteristics
Characteristic
Total Power Dissipation (Note 5)
Thermal Resistance, Junction to Ambient @TA = +25°C (Note 5)
Operating and Storage Temperature Range
Notes:
5. Device mounted on FR-4 PCB. t ≤5 sec.
6. Pulse width ≤10µS, Duty Cycle ≤1%.
DMP56D0UFB
Document number: DS36175 Rev. 3 - 2
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DMP56D0UFB
Electrical Characteristics
(@TA = +25°C, unless otherwise specified.)
Characteristic
OFF CHARACTERISTICS (Note 7)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Source Leakage
ON CHARACTERISTICS (Note 7)
Gate Threshold Voltage
Symbol
Min
Typ
Max
Unit
Test Condition
BVDSS
IDSS
IGSS
-50
—
—
—
—
—
—
-10
±1
V
µA
µA
VGS = 0V, ID = -250µA
VDS = -50V, VGS = 0V
VGS = ±8V, VDS = 0V
VGS(th)
-0.5
V
Static Drain-Source On-Resistance
RDS (ON)
——
-1.2
6
8
—
-1.2
mS
V
VDS = VGS, ID = -250µA
VGS = -4.0V, ID = -100mA
VGS = -2.5V, ID = -80mA
VDS = -5V, ID = -100mA
VGS = 0V, IS = -100mA
Forward Transfer Admittance
Diode Forward Voltage (Note 7)
DYNAMIC CHARACTERISTICS (Note 8)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
|Yfs|
VSD
100
—
—
4.6
6
—
—
Ciss
Coss
Crss
—
—
—
50.54
3.49
2.42
—
—
—
pF
pF
pF
VDS = -25V, VGS = 0V,
f = 1.0MHz
Gate Resistance
RG
—
201
—
Ω
VDS = 0V, VGS = 0V,
f = 1.0MHz
Total Gate Charge VGS = 4.5V
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Qg
Qgs
Qgd
—
—
—
—
—
—
—
0.58
0.09
0.14
4.46
6.63
21.9
15.0
—
—
—
—
—
—
—
nC
nC
nC
nS
nS
nS
nS
Notes:
tD(on)
tr
tD(off)
tf
Ω
VGS = -4V, VDS = -25V,
ID = -100mA
VDD = -30V, ID = -0.27A,
VGEN = -4V, RGEN = 6Ω
7. Short duration pulse test used to minimize self-heating effect.
8. Guaranteed by design. Not subject to production testing.
DMP56D0UFB
Document number: DS36175 Rev. 3 - 2
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DMP56D0UFB
0.8
0.4
VGS = 4.5V
VDS = -5V
T A = 125°C
TA = 25°C
0.6
-ID, DRAIN CURRENT (A)
VGS = 8.0V
-ID, DRAIN CURRENT (A)
TA = -55°C
VGS = 2.5V
VGS = 4.0V
VGS = 1.8V
0.4
VGS = 1.5V
0.2
T A = 150°C
0.3
TA = 85°C
0.2
0.1
VGS = 1.2V
0
0.5
1
1.5 2 2.5 3 3.5 4 4.5
-VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 1 Typical Output Characteristics
5
-VGS, GATE-SOURCE VOLTAGE (V)
Figure 2 Typical Transfer Characteristics
8
RDS(ON), DRAIN-SOURCE ON-RESISTANCE ()
RDS(ON), DRAIN-SOURCE ON-RESISTANCE ()
0.0
0
7
6
VGS = -2.5V
VGS = -4.0V
5
VGS = -8.0V
4
VGS = -4.5V
3
2
0
0.1
0.2
0.3
0.4
0.5
-ID, DRAIN-SOURCE CURRENT (A)
Figure 3 Typical On-Resistnace vs.
Drain Current and Gate Voltage
0.6
VGS = -4V
9
TA = 150°C
8
7
TA = 125°C
TA = 85°C
6
T A = 25°C
5
4
TA = -55°C
3
2
1
0
0
0.1
0.2
0.3
0.4
0.5
-ID, DRAIN CURRENT (A)
Figure 4 Typical On-Resistance vs.
Drain Current and Temperature
0.6
10
RDS(ON), DRAIN-SOURCE ON-RESISTANCE ()
1.8
RDS(ON), DRAIN-SOURCE ON-RESISTANCE
(NORMALIZED)
10
VGS = -4V
ID = -100mA
1.6
1.4
VGS = -2.5V
ID = -100mA
1.2
1
0.8
0.6
0.4
0.2
-50
-25
0
25
50
75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 5 On-Resistance Variation with Temperature
DMP56D0UFB
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9
8
VGS = -2.5V,
ID = -100mA
7
6
5
VGS = -4V,
ID = -100mA
4
3
2
1
0
-50
-25
0
25
50
75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Figure 6 On-Resistance Variation with Temperature
May 2015
© Diodes Incorporated
DMP56D0UFB
1.5
1
0.8
-IS, SOURCE CURRENT (A)
VGS(TH), GATE THRESHOLD VOLTAGE (V)
TA = 150°C
1
ID = -1mA
ID = -250µA
0.5
0
-50
TA = 125°C
0.6
TA = 25°C
0.4
TA = -55°C
0.2
0
0
0
25
50
75 100 125 150
TA, AMBIENT TEMPERATURE (°C)
Figure 7 Gate Threshold Variation vs. Ambient Temperature
-25
100
0.3
0.6
0.9
1.2
1.5
-VSD, SOURCE-DRAIN VOLTAGE (V)
Figure 8 Diode Forward Voltage vs. Current
8
-V GS, GATE THRESHOLD VOLTAGE (V)
CT, JUNCTION CAPACITANCE (PF)
TA = 85°C
10
1
0
5
10
15
20
25
30
35
-VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9 Typical Junction Capacitance
DMP56D0UFB
Document number: DS36175 Rev. 3 - 2
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6
VDS = -25V
ID = -100mA
4
2
0
0
0.2
0.4
0.6
0.8
1
Qg, TOTAL GATE CHARGE (nC)
Figure 10 Gate Charge Characteristics
1.2
May 2015
© Diodes Incorporated
DMP56D0UFB
Package Outline Dimensions
Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for the latest version.
A
A1
Seating Plane
D
b
Pin #1 ID
e
E b2
X1-DFN1006-3
Dim Min Max Typ
A 0.47 0.53 0.50
A1 0.00 0.05 0.03
b
0.10 0.20 0.15
b2 0.45 0.55 0.50
D 0.95 1.075 1.00
E 0.55 0.675 0.60
e
0.35
L1 0.20 0.30 0.25
L2 0.20 0.30 0.25
L3
0.40
z
0.02 0.08 0.05
All Dimensions in mm
z
L3
L2
L1
Suggested Pad Layout
Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.
C
Y
Dimensions
C
G1
G2
X
X1
Y
Y1
Y1
G2
X
G1
Value (in mm)
0.70
0.30
0.20
0.40
1.10
0.25
0.70
X1
DMP56D0UFB
Document number: DS36175 Rev. 3 - 2
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Copyright © 2015, Diodes Incorporated
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DMP56D0UFB
Document number: DS36175 Rev. 3 - 2
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