ON LC898121XA Optical image stabilization / controller & driver Datasheet

LC898121XA
CMOS LSI
Optical Image Stabilization (OIS)
Controller & Driver
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Overview
The LC898121XA is a system LSI integrating a digital signal
processing function for Optical Image Stabilization (OIS) and a
saturation-driven H bridge driver function.
WLCSP40, 2.44x3.94
Function
 Motor Driver
 Digital signal processing
 Saturation-drive H bridge 2ch
 IO max : 300mA
 Built-in digital servo circuit
 Built-in Gyro filter
 AD converter
 12bit
 Input 3ch
 Equipped with a sample-hold circuit
 DA converter
 8bit
 Output 2ch
 Built-in Serial I/F circuit
(4-wire SPI or 2-wire I2C-Bus interface)
 Built-in Hall Bias circuit
 Built-in Hall Amp
 Built-in OSC (Oscillator)
 Typ. 48MHz
 Built-in LDO (Low Drop-Out regulator)
 Generation Logic Power (typ 1.8V)
 Digital Gyro I/F for the companies
(Please refer for the details)
 Package
 WLCSP40, 2.44mm  3.94mm,
thickness max 0.65mm
 Pb-Free / Halogen Free
 Power Supply Voltage
 DA/VGA
 AD
 IO/OSC/LDO
 Driver
 Core Logic
: DAOPVDD = 2.6V to 3.6V
: ADVDD = 2.6V to 3.6V
: DVDD30 = 2.6V to 3.6V
: VM = 2.6V to 5.5V
: Use built-in LDO/External VDD :
DVDD18 = 1.8V10%
* I2C Bus is a trademark of Philips Corporation.
ORDERING INFORMATION
See detailed ordering and shipping information on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
April 2015 - Rev. 2
1
Publication Order Number :
LC898121XA/D
LC898121XA
Block Diagram
I2CCK/SCLK
DAOPVDD
I2CDT/MOSI
I2C I/F
SPI I/F
DA
MISO/MON
DAOPVSS
SSB
BUSY2/IOP/MON
IOPORT
HLXBO
BUSY1/IOP/MON
MON/IOP
HLYBO
SRAM
DGMISO/DGI2CDT
Hall-X
Digial Gyro
I/F
OPINPX
OPINMX
-
DGMOSI/IOP
DGSCLK/DGI2CCK/
IOP
+
DGSSB/MON/IOP
CLKSEL
Hall-Y
OPINPY
OPINMY
0
-
OSC
M
X
+
Typ
48Mhz 1
TSTCLK
TEST
HXI
Hall-EQ
HYI
OUT1
OIS PWM
GAD
OUT2
12bit
ADC
H-Bridge
Driver
Gyro-EQ
OUT3
OUT4
PGND
VM
VM
System
Reset
VCC
1.8V±10%
LDO
POR
SGND
ADVRH ADVDD ADVSS ADVRL
ZRESET
DVDD30
DVDD18
DVSS
Example of wiring diagram [Hall] in LC898121XA (WLP40)
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2
Digial Gyro
LC898121XA
Package Dimensions
unit : mm
WLCSP40, 2.44x3.94
CASE 567JB
ISSUE O
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
A B
PIN A1
REFERENCE
DIM
A
A1
b
D
E
e
E
0.10 C
2X
2X
0.10 C
MILLIMETERS
MIN
MAX
−−−
0.65
0.15
0.24
0.22
0.32
2.44 BSC
3.94 BSC
0.50 BSC
TOP VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
A
0.10 C
A1
A1
0.08 C
NOTE 3
C
SIDE VIEW
SEATING
PLANE
0.50
PITCH
PACKAGE
OUTLINE
0.50
PITCH
e/2
e
40X
E
0.25
e
DIMENSIONS: MILLIMETERS
D
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
C
B
40X
A
b
0.05 C A B
1
2
3
4
5
6
7
8
0.03 C
BOTTOM VIEW
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3
LC898121XA
Pin Assignment
WLP40
Bottom View
E
D
C
B
A
OPINPX
OPINMY
ADVDD
ADVSS
HXI
OPINMX
OPINPY
ADVRH
ADVRL
HYI
HLXBO
HLYBO
DGSCLK
DGMOSI
GAD
MISO
I2CDT
DGMISO
DGSSB
MON
SSB
DVDD18
DVSS
CLKSEL
TSTCLK
TEST
DVDD30
VM
BUSY2
BUSY1
ZRESET
VM
OUT4
OUT3
PGND
OUT2
OUT1
8
7
DAOPVDD DAOPVSS
I2CCK
6
5
4
3
2
1
Driver
AD 3V
VGA&DAC 3V
Digital GND
Digital 3V VDD
Logic Core 1.8V VDD (Output)
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4
LC898121XA
<typ> I : INPUT, O : OUTPUT, B : BIDIRECTION, P : Power
Ball No
Pin Name
type
Description
A1
OUT1
O
Driver Output
A2
VM
P
Driver VDD (2.6V to 5.5V)
A3
DVDD30
P
Logic 3V VDD (2.6V to 3.6V)
A4
DVDD18
P
LDO Power supply out (Logic Core VDD (typ 1.8 V))
A5
I2CDT
B
I2C_IF data (B) / SPI IF data ( I )
A6
I2CCK
I
I2C_IF clock / SPI IF clock
A7
HYI
I
Hall-Y AD input
Hall-X AD input
A8
HXI
I
B1
OUT2
O
Driver output
B2
ZRESET
I
HardWafer Reset
B3
TEST
I
SPI & External clock case sets [ 1 ]. other cases set [ 0 ]
B4
SSB
B
SPI I/F Chip Select ( I ) / General-purpose IOPORT(B) / inner signal monitor(O)
B5
MISO
B
SPI I/F data(O) / inner signal monitor / General-purpose IOPORT
B6
DAOPVSS
P
DA&OpAmp VSS
B7
ADVRL
I
ADC ReferenceVoltage Low input
B8
ADVSS
I
AD GND
C1
PGND
P
Driver GND
C2
BUSY1
B
BUSY1(O) / General-purpose IOPORT(B) / inner signal monitor(O)
C3
TSTCLK
I
CLKSEL=1 : External Clock, CLKSEL=0 : change pin of I C(0) and SPI(1)
C4
MON
B
inner signal monitor / general-purpose IOPORT
C5
GAD
I
General AD input
C6
DAOPVDD
P
DA&OpAmp VDD (2.6V to 3.6V)
C7
ADVRH
I
ADC ReferenceVoltage High input
C8
ADVDD
P
AD VDD (2.6V to 3.6V)
D1
OUT3
O
Driver output
D2
BUSY2
B
BUSY2 (O) / General-purpose IOPORT(B) / inner signal monitor(O)
D3
CLKSEL
I
B
2
change pin of OSC(0) and External clock(1)
Digital Gyro SPI IF Chip Select(O) / inner signal monitor(O) /
D4
DGSSB
D5
DGMOSI
B
Digital Gyro (4-wire) IF data(O) / General-purpose IOPORT(B)
D6
HLYBO
O
Hall-Y Bias (Current drive)
General-purpose IOPORT(B)
D7
OPINPY
I
Hall-Y OpAmp input+
D8
OPINMY
I
Hall-Y OpAmp input-
E1
OUT4
O
Driver output
E2
VM
P
Driver VDD (2.6V to 5.5V)
E3
DVSS
P
Logic GND
E4
DGMISO
B
Digital Gyro SPI IF data( I ) / Digital Gyro I C IF data(B)
E5
DGSCLK
B
E6
HLXBO
O
Hall-Y Bias (Current drive)
E7
OPINMX
I
Hall-X OpAmp input-
E8
OPINPX
I
Hall-X OpAmp input+
2
2
Digtal Gyro SPI IF clock (O) /Digital Gyro I C IF clock(O) /
General purpose IOPORT (B)
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5
LC898121XA
ORDERING INFORMATION
Device
LC898121XA-MH
Package
Shipping (Qty / Packing)
WLCP40, 2.44x3.94
(Pb-Free / Halogen Free)
4000 / Tape & Reel
† For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel
Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF
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