Connor-Winfield DV75C-020M 5x7mm precision tcxo model dv75c Datasheet

Available at Digi-Key
www.digikey.com
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
US Headquarters:
630-851-4722
European Headquarters:
+353-61-472221
5x7mm
Precision TCXO
Model DV75C
Description:
Features:
The Connor-Winfield’s DV75C is a 5x7mm
Surface Mount Temperature Compensated
Crystal Controlled Oscillator (TCXO) with
LVCMOS output. Through the use of Analog
Temperature Compensation the DV75C is
capable of holding sub 1-ppm stabilities
over the -40 to 85°C temperature range. The
DV75C meets STRATUM 3 requirements.
• 3.3 Vdc Operation
• LVCMOS Output
• Frequency Stability: ± 0.28 ppm
• Temperature Range: -40 to 85°C
• Low Jitter <1ps RMS
• 5x7mm Surface Mount Package
• Tape and Reel Packaging
• RoHS Compliant / Pb Free
DV
75
12 C 12
.8
MH 02
Z
Applications:
• IEEE 1588 Applications
• Synchronous Ethernet slave clocks, ITU-T G.8262 EEC options 1 & 2
• Compliant to Stratum 3, GR-1244-CORE, GR-253-CORE & ITU-T-G.812 Type IV
• Wireless Communications
• Small Cells
• Test and Measurement
Parameter
Storage Temperature
Supply Voltage (Vcc)
Input Voltage
Parameter
Absolute Maximum Ratings
Minimum
Nominal
Maximum
Units
-55
-0.5
-0.5
-
85
6.0
Vcc+0.5
°C
Vdc
Vdc
Maximum
Units
Operating Specifications
Minimum
Nominal
Nominal Frequencies (Fo) available 10.0, 12.8, 20.0, 25.0 and 40.0
Frequency Calibration @ 25 °C
-1.0
1.0
Frequency Stability vs. Temperature
-0.28
0.28
Holdover Stability (Over 24 Hours)
-0.32
0.32
Frequency vs. Load Stability
-0.05
0.05
Frequency vs. Voltage Stability
-0.05
0.05
Static Temperature Hysteresis
0.4
Total Frequency Tolerance:
-4.6
4.6
Operating Temperature Range:
-40
85
Supply Voltage (Vcc)
3.135
3.3
3.465
Supply Current (Icc)
6
Period Jitter
3
5
Integrated Phase Jitter
0.5
1.0
Typical Phase Noise Fo = 10.0 MHz
SSB Phase Noise at 10Hz offset
-99
SSB Phase Noise at 100Hz offset
-122
SSB Phase Noise at 1KHz offset
-145
SSB Phase Noise at 10KHz offset
-152
SSB Phase Noise at 100KHz offset
-153
Start-up Time
10
Notes
Notes
MHz
ppm 1
ppm 2
ppm 3
ppm ±5%
ppm ±5%
ppm 4
ppm 5
°C
Vdc ±5%
mA
ps rms
ps rms 6
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ms
LVCMOS Output Characteristics
Parameter
Load
Voltage (High) (Voh)
(Low)
(Vol)
Duty Cycle at 50% of Vcc
Rise / Fall Time 10% to 90%
Bulletin
Page
Revision
Date
Tx355
1 of 4
06
10 Nov 2016
Minimum
Nominal
90%Vcc
45
-
15
50
-
Maximum
-
-
10%Vcc
55
8
Units
Notes
pF
Vdc
Vdc
%
ns
Notes:
1. Initial calibration @ 25°C. Specifications at time of shipment after 48 hours of operation.
2. Frequency stability vs. change in temperature. [±(Fmax - Fmin)/(2*Fo)].
3. Inclusive of frequency stability, supply voltage change (±1%), load change, aging, for 24 hours.
4. Frequency change after reciprocal temperature ramped over the operating range. Frequency measured before and after at 25°C.
5. Inclusive of calibration @ 25C, frequency vs. change in temperature, change in supply voltage (±5%), load change (±5%), reflow soldering
process and 20 years aging, referenced to Fo
6. BW = 12 KHz to Fo/2 MHz.
7. For best performance it is recommended that the circuit connected to this output should have an equivalent input capacitance of 15pF.
7
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
Package Characteristics
PackageHermetically sealed crystal mounted on a ceramic package
Environmental Characteristics
Vibration:Vibration per Mil Std 883E Method 2007.3 Test Condition A
Shock:Mechanical Shock per Mil Std 883E Method 2002.4 Test Condition B.
Soldering Process:RoHS compliant lead free. See soldering profile on page 3.
Ordering Information
DV75C-010.0M, DV75C-012.8M, DV75C-020.0M, DV75C-025.0M, DV75C-040.0M
Phase Noise Information
TIE
DV75C-010.0M: WANDER GENERATION IN A STRATUM 3 PLL AT 0.098 Hz BANDWIDTH
MTIE
DV75C-010.0M: MTIE per GR-253-CORE
TDEV
DV75C-010.0M: TDEV per GR-253-CORE
Bulletin
Page
Revision
Date
Specifications subject to change without notification. See Connor-Winfield's website for latest revision. All dimensions in inches.
© Copyright 2016 The Connor-Winfield Corporation Not intended for life support applications.
Tx355
2 of 4
06
10 Nov 2016
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
Package Layout
Suggested Pad Layout
Pad Connections
0.071
(1.8mm)
4 Places
1: N/C
2: Ground
3: Output (Fo)
4: Supply Voltage (Vcc)
Applies to all frequencies except for 40.0MHz
0.276 ±0.006
(7.0mm)
(Top View)
0.079 Max.
(2.0mm)
4
0.197
±0.006
(5.0mm)
DV75C 1202
12.8 MHZ
0.165
(4.2mm)
3
0.047
(1.2mm)
4 Places
(Top View)
Pad 1
1
1
2
Keep
Out *
Area
2
* Do not route any traces in the keep out area.
It is recommended the next layer under the
keep out area is to be ground plane.
Dimensional Tolerance:
±.005 (.127mm)
±.02 (.508mm)
(Bottom View)
0.034
(0.90mm)
(4 Places)
0.224
(5.7mm)
3
4
0.055
(1.40mm)
(4 Places)
Test Circuit
Alternate Package Layout
Applies to 40.0MHz frequency only.
Vcc
Supply
Voltage
0.095
(2.4mm)
0.276 ±0.006
(7.0mm)
0.1 uF
Bypass
10 nF
Bypass
0.197
±0.006
(5.0mm)
DV75C 1511
40.0 MHz
Output Waveform
4
3
Output
15 pF
1
2
N/C
1V/Div
Solder Profile
Design Recommendations
Vcc, should have
a large copper
area for reduced
inductance.
Connect a 0.01uF
bypass capacitor
<0.1”(2.54mm)
from the pad.
Temperature
0.010”(0.254mm)
Recommended
clearance
inductance
for internal
copper flood.
4
3
9
5
10
1
Top View
260°C
260°C
220°C
180°C
150°C
Buffer
120°C
Ground
0
Ground
4
2
50 Ohm trace
<1”by design
Vcc
Ground,
should have
a large copper
area for reduced
inductance.
OSC
Top View
10 s
Up to 120 s
60 to 90 s
Typical
Typical
50 Ohm Trace
Without Output
Vias
Buffer
Meets IPC/JEDEC J-STD-020C
TOP LAYER
GROUND LAYER
.......
BOTTOM LAYER
Attention: To achieve optimal frequency stability, and in some cases to meet the specification stated on this data
sheet, it is required that the circuit connected to this TCXO output must have the equivalent input capacitance that is
specified by the nominal load capacitance. Deviations from the nominal load capacitance will have a graduated effect
on the stability of approximately 20 ppb per pF load difference.
Bulletin
Page
Revision
Date
Specifications subject to change without notification. See Connor-Winfield's website for latest revision. All dimensions in inches.
© Copyright 2016 The Connor-Winfield Corporation Not intended for life support applications.
Tx355
3 of 4
06
10 Nov 2016
2111 Comprehensive Drive
Aurora, Illinois 60505
Phone: 630- 851- 4722
Fax: 630- 851- 5040
www.conwin.com
Tape and Reel Dimensions
PIN 1
.69
(17.5mm)
8.46 DIA
(216mm DIA)
.08
(2.0mm)
.31
.08
(7.9mm)
(2.0mm)
.21
(5.4mm)
9.84 DIA
(250mm DIA)
.157
(4.0mm)
.08
(2.0mm)
3.15
(80mm)
.315
(8.0mm)
Direction
Of
Feed
(Customer)
.06 DIA
(1.5mm DIA)
1.00 DIA
(25mm DIA)
.295 (7.5mm)
MEETS EIA-481A and EIAJ-1009B
2,000 PCS/REEL
Revision History
Revision
Date
00
01/11/12
01
11/26/12
02
04/15/13
03
12/03/13
04
04/01/15
05
11/01/16
06
11/10/16
.07 (1.75mm)
.83 (16.0mm)
Note
Data sheet released
Removed tri-state information from features and description.
Added "Applications", Phase noise, TIE, MTIE and TDEV plots.
Removed TR information from Ordering Information.
Add frequencies and update to Phase Noise Plot and Operating Specs
Clarify frequencies to which alternate package height applies, and
added dimensions to bottom view.
Update Static Temperature Hysteresis note and Soldering Process information.
Bulletin
Page
Revision
Date
Specifications subject to change without notification. See Connor-Winfield's website for latest revision. All dimensions in inches.
© Copyright 2016 The Connor-Winfield Corporation Not intended for life support applications.
Tx355
4 of 4
06
10 Nov 2016
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