Order Now Product Folder Tools & Software Technical Documents Support & Community LMC6001-MIL SNOSD60 – JUNE 2017 LMC6001-MIL Ultra, Ultra-Low Input Current Amplifier 1 Features • • • • • • 1 (Maximum Limit, 25°C Unless Otherwise Noted) Input Current (100% Tested): 25 fA Input Current Over Temperature: 2 pA Low Power: 750 µA Low VOS: 350 µV Low Noise: 22 nV/√Hz at 1 kHz Typical 2 Applications • • • • Electrometer Amplifiers Photodiode Preamplifiers Ion Detectors A.T.E. Leakage Testing 3 Description Featuring 100% tested input currents of 25 fA maximum, low operating power, and ESD protection of 2000 V, the LMC6001-MIL device achieves a new industry benchmark for low input current operational amplifiers. By tightly controlling the molding compound, Texas Instruments is able to offer this ultra-low input current in a lower cost molded package. To avoid long turnon settling times common in other low input current op amps, the LMC6001A is tested three times in the first minute of operation. Even units that meet the 25-fA limit are rejected if they drift. Because of the ultra-low input current noise of 0.13 fA/√Hz, the LMC6001-MIL can provide almost noiseless amplification of high resistance signal sources. Adding only 1 dB at 100 kΩ, 0.1 dB at 1 MΩ and 0.01 dB or less from 10 MΩ to 2,000 MΩ, the LMC6001-MIL is an almost noiseless amplifier. The LMC6001-MIL is ideally suited for electrometer applications requiring ultra-low input leakage such as sensitive photodetection transimpedance amplifiers and sensor amplifiers. Because input referred noise is only 22 nV/√Hz, the LMC6001-MIL can achieve higher signal to noise ratio than JFET input type electrometer amplifiers. Other applications of the LMC6001-MIL include long interval integrators, ultrahigh input impedance instrumentation amplifiers, and sensitive electrical-field measurement circuits. Device Information(1) PART NUMBER LMC6001-MIL PACKAGE BODY SIZE (NOM) PDIP (8) 9.81 mm × 6.35 mm TO-99 (8) 9.08 mm × 9.08 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic R2 R1 VIN ± LMC6001 VOUT + 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. LMC6001-MIL SNOSD60 – JUNE 2017 www.ti.com Table of Contents 1 2 3 4 5 6 Features .................................................................. Applications ........................................................... Description ............................................................. Pin Configuration and Functions ......................... Specifications......................................................... 1 1 1 3 3 5.1 5.2 5.3 5.4 5.5 5.6 5.7 3 4 4 4 4 5 6 Detailed Description .............................................. 9 6.1 6.2 6.3 6.4 2 Absolute Maximum Ratings ...................................... ESD Ratings.............................................................. Recommended Operating Conditions....................... Thermal Information .................................................. DC Electrical Characteristics for LMC6001AI ........... Dissipation Ratings ................................................... Typical Characteristics .............................................. Overview ................................................................... Functional Block Diagram ......................................... Feature Description................................................... Device Functional Modes.......................................... 9 9 9 9 7 Applications and Implementation ...................... 10 7.1 Application Information............................................ 10 7.2 Typical Application .................................................. 11 7.3 System Example ..................................................... 13 8 9 Power Supply Recommendations...................... 14 Layout ................................................................... 14 9.1 Layout Guidelines ................................................... 14 9.2 Layout Example ...................................................... 15 10 Device and Documentation Support ................. 16 10.1 10.2 10.3 10.4 10.5 10.6 Documentation Support ........................................ Related Links ........................................................ Community Resources.......................................... Trademarks ........................................................... Electrostatic Discharge Caution ............................ Glossary ................................................................ 16 16 16 16 16 16 11 Mechanical, Packaging, and Orderable Information ........................................................... 16 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL LMC6001-MIL www.ti.com SNOSD60 – JUNE 2017 4 Pin Configuration and Functions P Package 8-Pin PDIP Top View LMC Package 8-Pin TO-99 Top View Pin Functions PIN NAME I/O DESCRIPTION PDIP NO. TO-99 NO. CAN — 8 — +IN 3 3 I Noninverting Input No internal connection; connected to the external casing. –IN 2 2 I Inverting Input NC 1, 5, 8 1, 5 — No connection OUTPUT 6 6 O Output V+ 7 7 — Positive (higher) power supply V– 4 4 — Negative (lower) power supply 5 Specifications 5.1 Absolute Maximum Ratings Over operating free-air temperature range (unless otherwise noted) (1) (2) MIN Differential Input Voltage Unit ±Supply Voltage Voltage at Input/Output Pin + MAX − Supply Voltage (V − V ) (V+) + 0.3 (V−) − 0.3 V −0.3 +16 V Output Short Circuit to V+ See Output Short Circuit to V− (3) (4) See (3) Lead Temperature (Soldering, 10 Sec.) 260 °C Junction Temperature 150 °C Current at Input Pin ±10 mA Current at Output Pin ±30 mA Current at Power Supply Pin 40 mA Storage Temperature, Tstg −65 (1) (2) (3) (4) 150 °C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Applies to both single supply and split supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely affect reliability. Do not connect the output to V+, when V+ is greater than 13 V or reliability will be adversely affected. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL 3 LMC6001-MIL SNOSD60 – JUNE 2017 www.ti.com 5.2 ESD Ratings V(ESD) (1) (2) Human body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1) (2) Electrostatic discharge VALUE UNIT ±2000 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. Human body model, 1.5 kΩ in series with 100 pF. 5.3 Recommended Operating Conditions Over operating free-air temperature range (unless otherwise noted). MIN MAX UNIT VSS Supply input voltage 4.5 15.5 V TJ Operating junction temperature –40 85 °C 5.4 Thermal Information LMC6001-MIL THERMAL METRIC (1) RθJA Junction-to-ambient thermal resistance RθJC(top) Junction-to-case (top) thermal resistance (1) P (PDIP) LMC (TO-99) 8 PINS 8 PINS UNIT 100 145 °C/W — 45 °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 5.5 DC Electrical Characteristics for LMC6001AI Limits are ensured for TJ = 25°C unless otherwise specified. Unless otherwise specified, V+ = 5 V, V− = 0 V, VCM = 1.5 V, and RL > 1 M. PARAMETER IB Input Current IOS Input Offset Current TEST CONDITIONS Either Input, VCM = 0 V, VS = ±5 V LMC6001AI MIN (1) TYP (2) 10 At the temperature extremes MAX (1) UNIT 25 2000 fA 5 At the temperature extremes 1000 0.7 Input Offset Voltage VOS At the temperature extremes VS = ±5 V, VCM = 0 V 1 At the temperature extremes 1.35 TCVOS Input Offset Voltage Drift 2.5 RIN Input Resistance >1 CMRR Common Mode 0 V ≤ VCM ≤ 7.5 V Rejection Ratio V+ = 10 V +PSRR Positive Power Supply 5 V ≤ V+ ≤ 15 V Rejection Ratio −PSRR Negative Power Supply 0 V ≥ V− ≥ −10 V Rejection Ratio 75 At the temperature extremes At the temperature extremes (1) (2) (3) 4 Large Signal Voltage Gain Sinking, RL = 2 kΩ (3) 83 83 dB 94 77 400 1400 300 180 At the temperature extremes TΩ 70 80 At the temperature extremes µV/°C 72 73 Sourcing, RL = 2 kΩ (3) AV mV 10 350 V/mV 100 All limits are specified by testing or statistical analysis. Typical values represent the most likely parametric norm. V+ = 15 V, VCM = 7.5 V and RL connected to 7.5 V. For Sourcing tests, 7.5 V ≤ VO ≤ 11.5 V. For Sinking tests, 2.5 V ≤ VO ≤ 7.5 V. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL LMC6001-MIL www.ti.com SNOSD60 – JUNE 2017 DC Electrical Characteristics for LMC6001AI (continued) Limits are ensured for TJ = 25°C unless otherwise specified. Unless otherwise specified, V+ = 5 V, V− = 0 V, VCM = 1.5 V, and RL > 1 M. PARAMETER VCM Low VCM LMC6001AI TEST CONDITIONS Input Common- V+ = 5 V and 15 V For Mode Voltage CMRR ≥ 60 dB MIN (1) MAX (1) –0.4 –0.1 At the temperature extremes At the temperature extremes V V+ − 1.9 V+ − 2.5 0.1 VO Low V+ = 15 V, RL = 2 kΩ to 2.5 V VO Output Swing Sourcing, V+ = 5 V, VO = 0 V Sinking, V+ = 5 V, VO = 5 V Output Current Sourcing, V+ = 15 V, VO = 0 V V+ = (4) Sinking, VO = 13 V Supply Current V+ = 15 V, VO = 7.5 V (4) At the temperature extremes VO Low At the temperature extremes VO High At the temperature extremes 4.87 4.73 14.63 14.34 16 At the temperature extremes 22 10 16 At the temperature extremes 21 13 28 At the temperature extremes mA 30 22 28 At the temperature extremes V 0.35 0.45 14.5 15 V, V+ = 5 V, VO = 1.5 V IS 0.17 0.26 V+ = 15 V, RL = 2 kΩ to 7.5 V IO 0.14 At the temperature extremes 4.8 VO High UNIT 0 V+ − 2.3 VCM High TYP (2) 34 22 450 750 At the temperature extremes 900 550 µA 850 At the temperature extremes 950 Do not connect the output to V + , when V + is greater than 13 V or reliability will be adversely affected. 5.6 Dissipation Ratings MIN Power Dissipation (1) See MAX UNIT (1) For operating at elevated temperatures the device must be derated based on the thermal resistance θJA with PD = (TJ − TA)/θJA. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL 5 LMC6001-MIL SNOSD60 – JUNE 2017 www.ti.com 5.7 Typical Characteristics VS = ±7.5 V, TA = 25°C, unless otherwise specified INPUT BIAS CURRENT 100 pA 10 pA 1 pA 100 fA 10 fA 1 fA 0 25 50 75 100 TEMPERATURE (°C) 125 VS = ±5 V 6 Figure 1. Input Current vs. Temperature Figure 2. Input Current vs. VCM Figure 3. Supply Current vs. Supply Voltage Figure 4. Input Voltage vs. Output Voltage Figure 5. Common-Mode Rejection Ratio vs. Frequency Figure 6. Power Supply Rejection Ratio vs. Frequency Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL LMC6001-MIL www.ti.com SNOSD60 – JUNE 2017 Typical Characteristics (continued) VS = ±7.5 V, TA = 25°C, unless otherwise specified Figure 7. Input Voltage Noise vs. Frequency Figure 8. Noise Figure vs. Source Resistance Figure 9. Output Characteristics Sourcing Current Figure 10. Output Characteristics Sinking Current RL = 500 kω Figure 11. Gain and Phase Response vs. Temperature (−55°C to +125°C) Figure 12. Gain and Phase Response vs. Capacitive Load Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL 7 LMC6001-MIL SNOSD60 – JUNE 2017 www.ti.com Typical Characteristics (continued) VS = ±7.5 V, TA = 25°C, unless otherwise specified 8 Figure 13. Open-Loop Frequency Response Figure 14. Inverting Small Signal Pulse Response Figure 15. Inverting Large Signal Pulse Response Figure 16. Noninverting Small Signal Pulse Response Figure 17. Noninverting Large Signal Pulse Response Figure 18. Stability vs. Capacitive Load Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL LMC6001-MIL www.ti.com SNOSD60 – JUNE 2017 6 Detailed Description 6.1 Overview LMC6001-MIL has an extremely low input current of 25 fA. In addition, its ultra-low input current noise of 0.13 fA/√Hz allows almost noiseless amplification of high-resistance signal sources. LMC6001-MIL is ideally suited for electrometer applications requiring ultra-low input leakage current such as sensitive photodetection transimpedance amplifiers and sensor amplifiers. 6.2 Functional Block Diagram 6.3 Feature Description 6.3.1 Amplifier Topology The LMC6001-MIL incorporates a novel op amp design topology that enables it to maintain rail-to-rail output swing even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage is taken directly from the internal integrator, which provides both low output impedance and large gain. Special feed-forward compensation design techniques are incorporated to maintain stability over a wider range of operating conditions than traditional op amps. These features make the LMC6001-MIL both easier to design with, and provide higher speed than products typically found in this low-power class. 6.3.2 Latch-up Prevention CMOS devices tend to be susceptible to latch-up due to their internal parasitic SCR effects. The (I/O) input and output pins look similar to the gate of the SCR. There is a minimum current required to trigger the SCR gate lead. The LMC6001-MIL is designed to withstand 100-mA surge current on the I/O pins. Some resistive method should be used to isolate any capacitance from supplying excess current to the I/O pins. In addition, like an SCR, there is a minimum holding current for any latch-up mode. Limiting current to the supply pins will also inhibit latch-up susceptibility. 6.4 Device Functional Modes The LMC6001-MIL has a single functional mode and operates according to the conditions listed in Recommended Operating Conditions. Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL 9 LMC6001-MIL SNOSD60 – JUNE 2017 www.ti.com 7 Applications and Implementation NOTE Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality. 7.1 Application Information 7.1.1 Compensating for Input Capacitance It is quite common to use large values of feedback resistance for amplifiers with ultra-low input current, like the LMC6001. Although the LMC6001 is highly stable over a wide range of operating conditions, certain precautions must be met to achieve the desired pulse response when a large feedback resistor is used. Large feedback resistors with even small values of input capacitance, due to transducers, photodiodes, and printed-circuit-board parasitics, reduce phase margins. When high input impedances are demanded, TI suggests guarding the LMC6001. Guarding input lines will not only reduce leakage, but lowers stray input capacitance as well. See Printed-Circuit-Board Layout For HighImpedance Work. The effect of input capacitance can be compensated for by adding a capacitor, Cf, around the feedback resistors (as in Figure 19) such that: (1) or R1 CIN ≤ R2 Cf (2) Because it is often difficult to know the exact value of CIN, Cf can be experimentally adjusted so that the desired pulse response is achieved. Refer to the LMC660 (SNOSBZ3) and LMC662 (SNOSC51) for a more detailed discussion on compensating for input capacitance. Figure 19. Cancelling the Effect of Input Capacitance 7.1.2 Capacitive Load Tolerance All rail-to-rail output swing operational amplifiers have voltage gain in the output stage. A compensation capacitor is normally included in this integrator stage. The frequency location of the dominant pole is affected by the resistive load on the amplifier. Capacitive load driving capability can be optimized by using an appropriate resistive load in parallel with the capacitive load. See Typical Characteristics. Direct capacitive loading will reduce the phase margin of many op amps. A pole in the feedback loop is created by the combination of the output impedance of the op amp and the capacitive load. This pole induces phase lag at the unity-gain crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. With a few external components, op amps can easily indirectly drive capacitive loads, as shown in Figure 20. 10 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL LMC6001-MIL www.ti.com SNOSD60 – JUNE 2017 Application Information (continued) Figure 20. LMC6001 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads In the circuit of Figure 20, R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the inverting input of the amplifier, thereby preserving phase margin in the overall feedback loop. Capacitive load driving capability is enhanced by using a pullup resistor to V+ (Figure 21). Typically a pullup resistor conducting 500 µA or more will significantly improve capacitive load responses. The value of the pullup resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. Open-loop gain of the amplifier can also be affected by the pullup resistor. See DC Electrical Characteristics for LMC6001AI. Figure 21. Compensating for Large Capacitive Loads with a Pullup Resistor 7.2 Typical Application The extremely high input resistance, and low power consumption, of the LMC6001 make it ideal for applications that require battery-powered instrumentation amplifiers. Examples of these types of applications are hand-held pH probes, analytic medical instruments, electrostatic field detectors and gas chromotographs. R2 R1 VIN ± VOUT LMC6001 + Figure 22. Typical Application Schematic, LMC6001 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL 11 LMC6001-MIL SNOSD60 – JUNE 2017 www.ti.com Typical Application (continued) 7.2.1 Two Op Amp, Temperature Compensated Ph Probe Amplifier The signal from a pH probe has a typical resistance between 10 MΩ and 1000 MΩ. Because of this high value, it is very important that the amplifier input currents be as small as possible. The LMC6001 with less than 25-fA input current is an ideal choice for this application. The LMC6001 amplifies the probe output providing a scaled voltage of ±100 mV/pH from a pH of 7. The second op amp, a micropower LMC6041 provides phase inversion and offset so that the output is directly proportional to pH, over the full range of the probe. The pH reading can now be directly displayed on a low-cost, low-power digital panel meter. Total current consumption will be about 1 mA for the whole system. The micropower dual-operational amplifier, LMC6042, would optimize power consumption but not offer these advantages: 1. The LMC6001A ensures a 25-fA limit on input current at 25°C. 2. The input ESD protection diodes in the LMC6042 are only rated at 500 V while the LMC6001 has much more robust protection that is rated at 2000 V. (1) R1 100 k + 3500 ppm/°C R2 68.1 k R3, 8 5 k R4, 9 100 k R5 36.5 k R6 619 k R7 97.6 k D1 LM4040D1Z-2.5 C1 2.2 µF (2) µΩ style 137 or similar Figure 23. Ph Probe Amplifier 7.2.1.1 Design Requirements The theoretical output of the standard Ag/AgCl pH probe is 59.16 mV/pH at 25°C with 0 V out at a pH of 7.00. This output is proportional to absolute temperature. To compensate for this, a temperature-compensating resistor, R1, is placed in the feedback loop. This cancels the temperature dependence of the probe. This resistor must be mounted where it will be at the same temperature as the liquid being measured. 7.2.1.2 Detailed Design Procedure The set-up and calibration is simple with no interactions to cause problems. 12 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL LMC6001-MIL www.ti.com SNOSD60 – JUNE 2017 Typical Application (continued) 1. Disconnect the pH probe and with R3 set to about mid-range and the noninverting input of the LMC6001 grounded, adjust R8 until the output is 700 mV. 2. Apply −414.1 mV to the noninverting input of the LMC6001. Adjust R3 for and output of 1400 mV. This completes the calibration. As real pH probes may not perform exactly to theory, minor gain and offset adjustments should be made by trimming while measuring a precision buffer solution. 7.2.1.3 Application Curve VS = ±5 V Figure 24. Input Current vs. VCM 7.3 System Example 7.3.1 Ultra-Low Input Current Instrumentation Amplifier Figure 25 shows an instrumentation amplifier that features high-differential and common-mode input resistance (>1014Ω), 0.01% gain accuracy at AV = 1000, excellent CMRR with 1-MΩ imbalance in source resistance. Input current is less than 20 fA and offset drift is less than 2.5 µV/°C. R2 provides a simple means of adjusting gain over a wide range without degrading CMRR. R7 is an initial trim used to maximize CMRR without using super precision matched resistors. For good CMRR over temperature, low-drift resistors should be used. If R1 = R5, R3 = R6, and R4 = R7; then ∴AV ≈ 100 for circuit shown (R2 = 9.85k). Figure 25. Instrumentation Amplifier Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL 13 LMC6001-MIL SNOSD60 – JUNE 2017 www.ti.com 8 Power Supply Recommendations See the Recommended Operating Conditions for the minimum and maximum values for the supply input voltage and operating junction temperature. 9 Layout 9.1 Layout Guidelines 9.1.1 Printed-Circuit-Board Layout For High-Impedance Work It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires special layout of the PCB. When one wishes to take advantage of the ultra-low bias current of the LMC6001, typically less than 10 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PCB, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the inputs of the LMC6001 and the terminals of capacitors, diodes, conductors, resistors, relay terminals, and so forth, connected to the inputs of the op amp, as in Figure 30. To have a significant effect, guard rings must be placed on both the top and bottom of the PCB. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, because no leakage current can flow between two points at the same potential. For example, a PCB trace-to-pad resistance of 10 TΩ, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5-V bus adjacent to the pad of the input. This would cause a 500 times degradation from the LMC6001's actual performance. If a guard ring is used and held within 1 mV of the inputs, then the same resistance of 10 TΩ will only cause 10 fA of leakage current. Even this small amount of leakage will degrade the extremely low input current performance of the LMC6001. See Figure 28 for typical connections of guard rings for standard op amp configurations. Figure 26. Inverting Amplifier Figure 27. Noninverting Amplifier Figure 28. Typical Connections of Guard Rings 14 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL LMC6001-MIL www.ti.com SNOSD60 – JUNE 2017 Layout Guidelines (continued) The designer should be aware that when it is inappropriate to lay out a PCB for the sake of just a few circuits, there is another technique which is even better than a guard ring on a PCB: Do not insert the input pin of the amplifier into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PCB construction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 29. (Input pins are lifted out of PCB and soldered directly to components. All other pins connected to PCB). Figure 29. Air Wiring Another potential source of leakage that might be overlooked is the device package. When the LMC6001 is manufactured, the device is always handled with conductive finger cots. This is to assure that salts and skin oils do not cause leakage paths on the surface of the package. We recommend that these same precautions be adhered to, during all phases of inspection, test and assembly. 9.2 Layout Example Figure 30. Examples of Guard Ring in PCB Layout Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL 15 LMC6001-MIL SNOSD60 – JUNE 2017 www.ti.com 10 Device and Documentation Support 10.1 Documentation Support 10.1.1 Related Documentation For related documentation, see the following: • LMC660 CMOS Quad Operational Amplifier, SNOSBZ3 • LMC662 CMOS Dual Operational Amplifier, SNOSC51 10.2 Related Links Table 1 lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy. Table 1. Related Links PARTS PRODUCT FOLDER SAMPLE & BUY TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY LMC6001-MIL Click here Click here Click here Click here Click here 10.3 Community Resources The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use. TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers. Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and contact information for technical support. 10.4 Trademarks E2E is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 10.5 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 10.6 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. 11 Mechanical, Packaging, and Orderable Information The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 16 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Product Folder Links: LMC6001-MIL PACKAGE OPTION ADDENDUM www.ti.com 29-Jun-2017 PACKAGING INFORMATION Orderable Device Status (1) LMC6001A MDC ACTIVE Package Type Package Pins Package Drawing Qty DIESALE Y 0 270 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Green (RoHS & no Sb/Br) Call TI Level-1-NA-UNLIM Op Temp (°C) Device Marking (4/5) -40 to 85 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. 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