IPD60R650CE,IPA60R650CE MOSFET 600VCoolMOSªCEPowerTransistor DPAK CoolMOS™isarevolutionarytechnologyforhighvoltagepower MOSFETs,designedaccordingtothesuperjunction(SJ)principleand pioneeredbyInfineonTechnologies.CoolMOS™CEisa price-performanceoptimizedplatformenablingtotargetcostsensitive applicationsinConsumerandLightingmarketsbystillmeetinghighest efficiencystandards.Thenewseriesprovidesallbenefitsofafast switchingSuperjunctionMOSFETwhilenotsacrificingeaseofuseand offeringthebestcostdownperformanceratioavailableonthemarket. PG-TO220FP tab 1 2 3 Features Drain Pin 2, Tab Gate Pin 1 •ExtremelylowlossesduetoverylowFOMRdson*QgandEoss •Veryhighcommutationruggedness •Easytouse/drive •Pb-freeplating,Halogenfreemoldcompound •Qualifiedforstandardgradeapplications Source Pin 3 Applications PFCstages,hardswitchingPWMstagesandresonantswitchingstages fore.g.PCSilverbox,Adapter,LCD&PDPTVandindoorlighting. Pleasenote:Note1:ForMOSFETparallelingtheuseofferritebeadson thegateorseparatetotempolesisgenerallyrecommended. Note2:*6R650CEisFullPAKmarkingonly Table1KeyPerformanceParameters Parameter Value Unit VDS @ Tj,max 650 V RDS(on),max 650 mΩ Id. 9.9 A Qg.typ 20.5 nC ID,pulse 19 A Eoss@400V 1.9 µJ Type/OrderingCode Package IPD60R650CE PG-TO 252 IPA60R650CE PG-TO 220 FullPAK Final Data Sheet Marking 60S650CE / 6R650CE* 1 RelatedLinks see Appendix A Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Test Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Final Data Sheet 2 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE 1Maximumratings atTj=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current1) Values Unit Note/TestCondition 9.9 6.2 A TC=25°C TC=100°C - 19 A TC=25°C - - 133 mJ ID=1.3A; VDD=50V; see table 11 EAR - - 0.20 mJ ID=1.3A; VDD=50V; see table 11 Avalanche current, repetitive IAR - - 1.3 A - MOSFET dv/dt ruggedness dv/dt - - 50 V/ns VDS=0...480V Gate source voltage (static) VGS -20 - 20 V static; Gate source voltage (dynamic) VGS -30 - 30 V AC (f>1 Hz) Power dissipation (Non FullPAK) TO-251 Ptot - - 82 W TC=25°C Storage temperature Tstg -40 - 150 °C - Operating junction temperature Tj -40 - 150 °C - Continuous diode forward current IS - - 7 A TC=25°C Diode pulse current IS,pulse - - 19 A TC=25°C Reverse diode dv/dt3) dv/dt - - 15 V/ns VDS=0...400V,ISD<=IS,Tj=25°C see table 9 Maximum diode commutation speed dif/dt - - 500 A/µs VDS=0...400V,ISD<=IS,Tj=25°C see table 9 Power dissipation (FullPAK) TO-220FP Ptot - - 28 W TC=25°C Mounting torque (FullPAK) TO-220FP - - - 50 Ncm M2.5 screws Insulation withstand voltage for TO-220FP VISO - - 2500 V Vrms,TC=25°C,t=1min Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current2) ID,pulse - Avalanche energy, single pulse EAS Avalanche energy, repetitive 2) 2Thermalcharacteristics Table3Thermalcharacteristics(FullPAK)TO-220FP Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - - 4.5 °C/W - Thermal resistance, junction - ambient RthJA - - 80 °C/W leaded Soldering temperature, wavesoldering only allowed at leads - - 260 °C Tsold 1.6mm (0.063 in.) from case for 10s 1) Limited by Tj max. TO252 equivalent, Maximum duty cycle D=0.50 Pulse width tp limited by Tj,max 3) IdenticallowsideandhighsideswitchwithidenticalRG 2) Final Data Sheet 3 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE Table4ThermalcharacteristicsTO-252 Parameter Symbol Thermal resistance, junction - case Values Unit Note/TestCondition Min. Typ. Max. RthJC - - 1.52 °C/W - Thermal resistance, junction - ambient RthJA - - 62 °C/W device on PCB, minimal footprint Thermal resistance, junction - ambient RthJA for SMD version - 35 45 Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70µm thickness) copper area °C/W for drain connection and cooling. PCB is vertical without air stream cooling. Soldering temperature, wave & reflow soldering allowed - - 260 °C Final Data Sheet Tsold 4 reflow MSL3 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table5Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=0.25mA 3.0 3.5 V VDS=VGS,ID=0.2mA - 10 1 - µA VDS=600,VGS=0V,Tj=25°C VDS=600,VGS=0V,Tj=150°C IGSS - - 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 0.54 1.40 0.65 - Ω VGS=10V,ID=2.4A,Tj=25°C VGS=10V,ID=2.4A,Tj=150°C Gate resistance RG - 10 - Ω f=1MHz,opendrain Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 600 - Gate threshold voltage V(GS)th 2.5 Zero gate voltage drain current IDSS Gate-source leakage current Table6Dynamiccharacteristics Parameter Symbol Input capacitance Values Min. Typ. Max. Ciss - 440 - pF VGS=0V,VDS=100V,f=1MHz Output capacitance Coss - 30 - pF VGS=0V,VDS=100V,f=1MHz Effective output capacitance, energy related1) Co(er) - 21 - pF VGS=0V,VDS=0...480V Effective output capacitance, time related2) Co(tr) - 88 - pF ID=constant,VGS=0V,VDS=0...480V Turn-on delay time td(on) - 10 - ns VDD=400V,VGS=13V,ID=3A, RG=6.8Ω;seetable10 Rise time tr - 8 - ns VDD=400V,VGS=13V,ID=3A, RG=6.8Ω;seetable10 Turn-off delay time td(off) - 58 - ns VDD=400V,VGS=13V,ID=3A, RG=6.8Ω;seetable10 Fall time tf - 11 - ns VDD=400V,VGS=13V,ID=3A, RG=6.8Ω;seetable10 Unit Note/TestCondition Table7Gatechargecharacteristics Parameter Symbol Gate to source charge Values Min. Typ. Max. Qgs - 2.5 - nC VDD=480V,ID=3A,VGS=0to10V Gate to drain charge Qgd - 10.5 - nC VDD=480V,ID=3A,VGS=0to10V Gate charge total Qg - 20.5 - nC VDD=480V,ID=3A,VGS=0to10V Gate plateau voltage Vplateau - 5.4 - V VDD=480V,ID=3A,VGS=0to10V 1) Co(er)isafixedcapacitancethatgivesthesamestoredenergyasCosswhileVDSisrisingfrom0to80%Vo(BR)DSS Co(tr)isafixedcapacitancethatgivesthesamestoredenergyasCosswhileVDSisrisingfrom0to80%Vo(BR)DSS 2) Final Data Sheet 5 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE Table8Reversediodecharacteristics Parameter Symbol Diode forward voltage Values Unit Note/TestCondition - V VGS=0V,IF=3A,Tj=25°C 250 - ns VR=400V,IF=3A,diF/dt=100A/µs; see table 9 - 2.1 - µC VR=400V,IF=3A,diF/dt=100A/µs; see table 9 - 16 - A VR=400V,IF=3A,diF/dt=100A/µs; see table 9 Min. Typ. Max. VSD - 0.9 Reverse recovery time trr - Reverse recovery charge Qrr Peak reverse recovery current Irrm Final Data Sheet 6 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation(NonFullPAK) Diagram2:Powerdissipation(FullPAK) 90 30 80 25 70 20 50 Ptot[W] Ptot[W] 60 40 30 15 10 20 5 10 0 0 25 50 75 100 125 0 150 0 25 50 TC[°C] 75 100 125 150 TC[°C] Ptot=f(TC) Ptot=f(TC) Diagram3:Max.transientthermalimpedance(NonFullPAK) Diagram4:Max.transientthermalimpedance(FullPAK) 1 101 10 0.5 100 100 0.5 0.2 ZthJC[K/W] ZthJC[K/W] 0.1 0.2 0.1 0.05 0.02 10-1 0.05 0.02 10-1 single pulse 0.01 single pulse 10-2 10-5 0.01 10-4 10-3 10-2 10-1 10-2 10-5 10-4 10-3 tp[s] 10-1 100 101 tp[s] ZthJC=f(tP);parameter:D=tp/T Final Data Sheet 10-2 ZthJC=f(tP);parameter:D=tp/T 7 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE Diagram5:Safeoperatingarea(NonFullPAK) Diagram6:Safeoperatingarea(FullPAK) 2 102 10 1 µs 1 µs 101 101 10 µs 10 µs 100 µs 100 µs 1 ms 100 1 ms 10 ms 100 DC ID[A] ID[A] DC 10 -1 10-1 10-2 10-2 10-3 10-3 100 101 102 10-4 103 100 101 102 VDS[V] VDS[V] ID=f(VDS);TC=25°C;D=0;parameter:tp ID=f(VDS);TC=25°C;D=0;parameter:tp Diagram7:Safeoperatingarea(NonFullPAK) Diagram8:Safeoperatingarea(FullPAK) 2 103 102 10 1 µs 101 1 µs 101 10 µs 10 µs 100 µs 100 µs 1 ms 100 1 ms 10 ms 100 ID[A] ID[A] DC DC 10-1 10-1 10-2 10-2 10-3 10-3 100 101 102 103 10-4 100 101 102 VDS[V] VDS[V] ID=f(VDS);TC=80°C;D=0;parameter:tp ID=f(VDS);TC=80°C;D=0;parameter:tp Final Data Sheet 8 103 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE Diagram9:Typ.outputcharacteristics Diagram10:Typ.outputcharacteristics 20 12 20 V 20 V 10 V 10 V 8V 16 9 8V 7V ID[A] ID[A] 12 7V 6V 6 8 5.5 V 6V 3 5.5 V 4 5V 4.5 V 5V 4.5 V 0 0 5 10 15 0 20 0 5 10 VDS[V] 15 20 VDS[V] ID=f(VDS);Tj=25°C;parameter:VGS ID=f(VDS);Tj=125°C;parameter:VGS Diagram11:Typ.drain-sourceon-stateresistance Diagram12:Drain-sourceon-stateresistance 2.0 1.60 1.50 1.9 1.40 1.8 1.30 1.7 1.20 5V 5.5 V 6.5 V 6V RDS(on)[Ω] RDS(on)[Ω] 1.10 7V 1.6 10 V 1.5 1.4 1.00 0.90 98% typ 0.80 0.70 1.3 0.60 1.2 0.50 0.40 1.1 1.0 0.30 0 2 4 6 8 10 12 0.20 -50 -25 0 25 ID[A] RDS(on)=f(ID);Tj=125°C;parameter:VGS Final Data Sheet 50 75 100 125 150 Tj[°C] RDS(on)=f(Tj);ID=2.4A;VGS=10V 9 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE Diagram13:Typ.transfercharacteristics Diagram14:Typ.gatecharge 20 10 25 °C 9 16 8 14 7 12 6 10 VGS[V] ID[A] 18 150 °C 4 6 3 4 2 2 1 0 2 4 6 8 10 0 12 480 V 5 8 0 120 V 0 5 VGS[V] 10 15 20 25 125 150 Qgate[nC] ID=f(VGS);VDS=20V;parameter:Tj VGS=f(Qgate);ID=3.0Apulsed;parameter:VDD Diagram15:Forwardcharacteristicsofreversediode Diagram16:Avalancheenergy 2 10 150 25 °C 125 °C 125 101 IF[A] EAS[mJ] 100 100 75 50 25 10-1 0.0 0.5 1.0 1.5 2.0 0 25 50 VSD[V] 100 Tj[°C] IF=f(VSD);parameter:Tj Final Data Sheet 75 EAS=f(Tj);ID=1.3A;VDD=50V 10 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE Diagram17:Drain-sourcebreakdownvoltage Diagram18:Typ.capacitances 104 700 680 660 103 Ciss 620 C[pF] VBR(DSS)[V] 640 600 102 Coss 580 101 560 Crss 540 520 -75 -50 -25 0 25 50 75 100 125 150 175 100 0 100 Tj[°C] 200 300 400 500 VDS[V] VBR(DSS)=f(Tj);ID=0.25mA C=f(VDS);VGS=0V;f=1MHz Diagram19:Typ.Cossstoredenergy 2.5 2.0 Eoss[µJ] 1.5 1.0 0.5 0.0 0 100 200 300 400 500 VDS[V] Eoss=f(VDS) Final Data Sheet 11 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE 5TestCircuits Table9Diodecharacteristics Test circuit for diode characteristics Diode recovery waveform V ,I Rg1 VDS( peak) VDS VDS VDS trr IF Rg 2 tF tS dIF / dt IF QF IF dIrr / dt trr =tF +tS Qrr = QF + QS Irrm Rg1 = Rg 2 t 10 %Irrm QS Table10Switchingtimes Switching times test circuit for inductive load Switching times waveform VDS 90% VDS VGS VGS 10% td(on) ton tr td(off) tf toff Table11Unclampedinductiveload Unclamped inductive load test circuit Unclamped inductive waveform V(BR)DS ID VDS VDS Final Data Sheet 12 ID VDS Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE 6PackageOutlines *) mold flash not included DIM A A1 b b2 b3 c c2 D D1 E E1 e e1 N H L L3 L4 F1 F2 F3 F4 F5 F6 MILLIMETERS MIN MAX 2.16 2.41 0.00 0.15 0.64 0.89 0.65 1.15 5.00 5.50 0.46 0.60 0.46 0.98 5.97 6.22 5.02 5.84 6.40 6.73 4.70 5.60 2.29 (BSC) 4.57 (BSC) 3 9.40 10.48 1.18 1.70 0.90 1.25 0.51 1.00 10.60 6.40 2.20 5.80 5.76 1.20 INCHES MIN 0.085 0.000 0.025 0.026 0.197 0.018 0.018 0.235 0.198 0.252 0.185 0.370 0.046 0.035 0.020 MAX 0.095 0.006 0.035 0.045 0.217 0.024 0.039 0.245 0.230 0.265 0.220 0.090 (BSC) 0.180 (BSC) 3 0.413 0.067 0.049 0.039 0.417 0.252 0.087 0.228 0.227 0.047 DOCUMENT NO. Z8B00003328 SCALE 0 2.0 0 2.0 4mm EUROPEAN PROJECTION ISSUE DATE 01-09-2015 REVISION 05 Figure1OutlinePG-TO252,dimensionsinmm/inches Final Data Sheet 13 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE DIMENSIONS DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. DIM A A1 A2 b b1 b2 b3 b4 c D D1 E e e1 N H L L1 Q MILLIMETERS MIN MAX 4.50 4.90 2.34 2.80 2.42 2.86 0.65 0.90 0.95 1.38 1.20 1.50 0.65 1.38 1.20 1.50 0.40 0.63 15.67 16.15 8.97 9.83 10.00 10.65 2.54 (BSC) INCHES MIN 0.177 0.092 0.095 0.026 0.037 0.047 0.026 0.047 0.016 0.617 0.353 0.394 DOCUMENT NO. Z8B00181328 SCALE 0 2.5 0 2.5 5mm EUROPEAN PROJECTION 0.100 (BSC) 5.08 3 28.70 12.78 2.83 3.00 3.15 MAX 0.193 0.110 0.113 0.035 0.054 0.059 0.054 0.059 0.025 0.636 0.387 0.419 0.200 3 29.75 13.75 3.45 3.38 3.50 1.130 0.503 0.111 0.118 0.124 1.171 0.541 0.136 0.133 0.138 ISSUE DATE 29-04-2016 REVISION 01 Figure2OutlinePG-TO220FullPAK,dimensionsinmm/inches Final Data Sheet 14 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE 7AppendixA Table12RelatedLinks • IFXCoolMOSTMCEWebpage:www.infineon.com • IFXCoolMOSTMCEapplicationnote:www.infineon.com • IFXCoolMOSTMCEsimulationmodel:www.infineon.com • IFXDesigntools:www.infineon.com Final Data Sheet 15 Rev.2.2,2016-08-08 600VCoolMOSªCEPowerTransistor IPD60R650CE,IPA60R650CE RevisionHistory IPD60R650CE, IPA60R650CE Revision:2016-08-08,Rev.2.2 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2014-09-25 Release of final version 2.1 2016-03-31 Modified Id, Rthjc. Modified SOA and Zthjc curves 2016-08-08 Added Full PAK marking on page 1, revised Full PAK package drawing on page 14 and changed TO252 package solder reflow rating to MSL3 on page 4 2.2 TrademarksofInfineonTechnologiesAG AURIX™,C166™,CanPAK™,CIPOS™,CoolGaN™,CoolMOS™,CoolSET™,CoolSiC™,CORECONTROL™,CROSSAVE™,DAVE™,DI-POL™,DrBlade™, EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™, ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™, PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™, SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™. TrademarksupdatedAugust2015 OtherTrademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: [email protected] Publishedby InfineonTechnologiesAG 81726München,Germany ©2016InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.With respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication ofthedevice,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 16 Rev.2.2,2016-08-08