Sample & Buy Product Folder Support & Community Tools & Software Technical Documents CSD19534KCS SLPS530 – JANUARY 2015 CSD19534KCS 100 V N-Channel NexFET™ Power MOSFET 1 Features • • • • • • • 1 Product Summary Ultra-Low Qg and Qgd Low Thermal Resistance Avalanche Rated Pb-Free Terminal Plating RoHS Compliant Halogen Free TO-220 Plastic Package TA = 25°C TYPICAL VALUE Drain-to-Source Voltage 100 V Qg Gate Charge Total (10 V) 16.4 nC Qgd Gate Charge Gate-to-Drain RDS(on) Drain-to-Source On-Resistance VGS(th) Threshold Voltage 3.3 nC VGS = 6 V 16.3 mΩ VGS = 10 V 13.7 mΩ 2.8 V Ordering Information(1) 2 Applications • • UNIT VDS Secondary Side Synchronous Rectifier Motor Control Device Package Media Qty Ship CSD19534KCS TO-220 Plastic Package Tube 50 Tube (1) For all available packages, see the orderable addendum at the end of the data sheet. 3 Description Absolute Maximum Ratings This 100 V, 13.7 mΩ, TO-220 NexFET™ power MOSFET is designed to minimize losses in power conversion applications. TA = 25°C VALUE UNIT VDS Drain-to-Source Voltage 100 V SPACE VGS Gate-to-Source Voltage ±20 V Continuous Drain Current (Package limited) 100 Continuous Drain Current (Silicon limited), TC = 25°C 54 Continuous Drain Current (Silicon limited), TC = 100°C 38 IDM Pulsed Drain Current (1) 138 A PD Power Dissipation 118 W TJ, Tstg Operating Junction and Storage Temperature Range –55 to 175 °C EAS Avalanche Energy, single pulse ID = 33 A, L = 0.1 mH, RG = 25 Ω 54 mJ Drain (Pin 2) ID Gate (Pin 1) Source (Pin 3) A (1) Max RθJC = 1.3°C/W, pulse duration ≤100 μs, duty cycle ≤1% . RDS(on) vs VGS Gate Charge 10 TC = 25° C, I D = 30 A TC = 125° C, I D = 30 A 40 VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance (m:) 45 35 30 25 20 15 10 5 0 ID = 30 A VDS = 50 V 8 6 4 2 0 2 4 6 8 10 12 14 16 VGS - Gate-to-Source Voltage (V) 18 20 D007 0 2 4 6 8 10 12 Qg - Gate Charge (nC) 14 16 18 D004 1 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. CSD19534KCS SLPS530 – JANUARY 2015 www.ti.com Table of Contents 1 2 3 4 5 Features .................................................................. Applications ........................................................... Description ............................................................. Revision History..................................................... Specifications......................................................... 5.3 Typical MOSFET Characteristics .............................. 4 1 1 1 2 3 6 Device and Documentation Support.................... 7 6.1 Trademarks ............................................................... 7 6.2 Electrostatic Discharge Caution ................................ 7 6.3 Glossary .................................................................... 7 7 5.1 Electrical Characteristics........................................... 3 5.2 Thermal Information .................................................. 3 Mechanical, Packaging, and Orderable Information ............................................................. 8 7.1 KCS Package Dimensions........................................ 9 4 Revision History 2 DATE REVISION NOTES January 2015 * Initial release. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD19534KCS CSD19534KCS www.ti.com SLPS530 – JANUARY 2015 5 Specifications 5.1 Electrical Characteristics (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC CHARACTERISTICS BVDSS Drain-to-Source Voltage VGS = 0 V, ID = 250 μA IDSS Drain-to-Source Leakage Current VGS = 0 V, VDS = 80 V 1 μA IGSS Gate-to-Source Leakage Current VDS = 0 V, VGS = 20 V 100 nA VGS(th) Gate-to-Source Threshold Voltage VDS = VGS, ID = 250 μA RDS(on) Drain-to-Source On-Resistance gƒs Transconductance 100 2.4 V 2.8 3.4 V VGS = 6 V, ID = 30 A 16.3 20.0 mΩ VGS = 10 V, ID = 30 A 13.7 16.5 mΩ VDS = 10 V, ID = 30 A 80 S DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance 1290 1670 pF 257 334 pF Crss RG Reverse Transfer Capacitance 5.7 7.4 pF Series Gate Resistance 1.1 2.2 Qg Gate Charge Total (10 V) Ω 17.1 22.2 nC Qgd Gate Charge Gate-to-Drain Qgs Gate Charge Gate-to-Source Qg(th) Gate Charge at Vth Qoss Output Charge td(on) Turn On Delay Time tr Rise Time td(off) Turn Off Delay Time tƒ Fall Time VGS = 0 V, VDS = 50 V, ƒ = 1 MHz VDS = 50 V, ID = 30 A VDS = 50 V, VGS = 0 V VDS = 50 V, VGS = 10 V, IDS = 30 A, RG = 0 Ω 3.2 nC 5.1 nC 3.3 nC 44 nC 6 ns 2 ns 9 ns 1 ns DIODE CHARACTERISTICS VSD Diode Forward Voltage ISD = 30 A, VGS = 0 V 0.9 1.1 V Qrr Reverse Recovery Charge nC Reverse Recovery Time VDS= 50 V, IF = 30 A, di/dt = 300 A/μs 195 trr 72 ns 5.2 Thermal Information (TA = 25°C unless otherwise stated) THERMAL METRIC MIN TYP MAX RθJC Junction-to-Case Thermal Resistance 1.3 RθJA Junction-to-Ambient Thermal Resistance 62 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD19534KCS UNIT °C/W 3 CSD19534KCS SLPS530 – JANUARY 2015 www.ti.com 5.3 Typical MOSFET Characteristics (TA = 25°C unless otherwise stated) Figure 1. Transient Thermal Impedance 50 45 IDS - Drain-to-Source Current (A) IDS - Drain-to-Source Current (A) 50 40 35 30 25 20 15 10 VGS = 6 V VGS = 8 V VGS = 10 V 5 0 TC = 125° C TC = 25° C TC = -55° C 40 30 20 10 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 VDS - Drain-to-Source Voltage (V) 0.8 0.9 2 2.4 D002 2.8 3.2 3.6 4 4.4 4.8 5.2 VGS - Gate-to-Source Voltage (V) 5.6 6 D003 VDS = 5 V Figure 2. Saturation Characteristics 4 Submit Documentation Feedback Figure 3. Transfer Characteristics Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD19534KCS CSD19534KCS www.ti.com SLPS530 – JANUARY 2015 Typical MOSFET Characteristics (continued) (TA = 25°C unless otherwise stated) 10000 8 1000 C - Capacitance (pF) VGS - Gate-to-Source Voltage (V) 10 6 4 100 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 10 2 1 0 0 2 4 6 8 10 12 Qg - Gate Charge (nC) ID = 30 A 14 16 0 18 10 20 D004 100 D005 Figure 5. Capacitance 3.4 45 3.2 40 RDS(on) - On-State Resistance (m:) VGS(th) - Threshold Voltage (V) 90 VDS = 50 V Figure 4. Gate Charge 3 2.8 2.6 2.4 2.2 2 1.8 1.6 1.4 -75 30 40 50 60 70 80 VDS - Drain-to-Source Voltage (V) TC = 25° C, I D = 30 A TC = 125° C, I D = 30 A 35 30 25 20 15 10 5 0 -50 -25 2 0 25 50 75 100 125 150 175 200 TC - Case Temperature (° C) D006 4 6 8 10 12 14 16 VGS - Gate-to-Source Voltage (V) 18 20 D007 ID = 250 µA Figure 6. Threshold Voltage vs Temperature Figure 7. On-State Resistance vs Gate-to-Source Voltage 100 2.2 VGS = 6 V VGS = 10 V ISD - Source-to-Drain Current (A) Normalized On-State Resistance 2.5 1.9 1.6 1.3 1 0.7 0.4 -75 TC = 25° C TC = 125° C 10 1 0.1 0.01 0.001 0.0001 -50 -25 0 25 50 75 100 125 150 175 200 TC - Case Temperature (° C) D008 0 0.2 0.4 0.6 0.8 VSD - Source-to-Drain Voltage (V) 1 1.2 D009 ID = 30 A Figure 8. Normalized On-State Resistance vs Temperature Figure 9. Typical Diode Forward Voltage Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD19534KCS 5 CSD19534KCS SLPS530 – JANUARY 2015 www.ti.com Typical MOSFET Characteristics (continued) (TA = 25°C unless otherwise stated) 100 100 10 1 DC 10 ms 1 ms 0.1 0.1 TC = 25q C TC = 125q C IAV - Peak Avalanche Current (A) IDS - Drain-to-Source Current (A) 1000 100 µs 10 µs 1 10 100 VDS - Drain-to-Source Voltage (V) 1000 10 0.01 0.1 TAV - Time in Avalanche (ms) D010 1 D011 Single Pulse, Max RθJC = 1.3°C/W Figure 10. Maximum Safe Operating Area Figure 11. Single Pulse Unclamped Inductive Switching IDS - Drain-to-Source Current (A) 80 70 60 50 40 30 20 10 0 -50 -25 0 25 50 75 100 125 TC - Case Temperature (° C) 150 175 200 D012 Figure 12. Maximum Drain Current vs Temperature 6 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD19534KCS CSD19534KCS www.ti.com SLPS530 – JANUARY 2015 6 Device and Documentation Support 6.1 Trademarks NexFET is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. 6.2 Electrostatic Discharge Caution These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 6.3 Glossary SLYZ022 — TI Glossary. This glossary lists and explains terms, acronyms, and definitions. Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD19534KCS 7 CSD19534KCS SLPS530 – JANUARY 2015 www.ti.com 7 Mechanical, Packaging, and Orderable Information The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. 8 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD19534KCS CSD19534KCS www.ti.com SLPS530 – JANUARY 2015 7.1 KCS Package Dimensions Pin Configuration Position Designation Pin 1 Gate Pin 2 / Tab Drain Pin 3 Source Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: CSD19534KCS 9 PACKAGE OPTION ADDENDUM www.ti.com 22-Jan-2015 PACKAGING INFORMATION Orderable Device Status (1) CSD19534KCS ACTIVE Package Type Package Pins Package Drawing Qty TO-220 KCS 3 50 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Pb-Free (RoHS Exempt) CU SN N / A for Pkg Type Op Temp (°C) Device Marking (4/5) CSD19534KCS (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. 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