CHV3242-QDG Fully integrated HBT K-Band VCO Description The CHV3242-QDG is a monolithic multifunction circuit suitable for frequency generation. It integrates an X-band “pushpush” oscillator with frequency control (VCO) thanks to base-collector diodes, used as varactors, a K-band buffer amplifier and a divider by 512. All the active devices are internally self-biased. The circuit is delivered in a 24 Leads RoHS compliant QFN4x4 package. UMS UMS V3242 A3667A A3688A YYWW YYWWG +V V_Tune RF_out x2 512 IF_out +VB +VD Main Features ■ K-band VCO + buffers + prescaler /512 ■ Prescaler and buffer switching capability with low pulling, for optimum efficiency ■ Fully integrated VCO (no external resonator) ■ Low phase noise ■ High temperature range ■ High output power ■ High frequency stability ■ 4th amplifier bias usable for power setting ■ On chip self-biased devices ■ Standard SMD package: 24L-QFN4x4 ■ MSL1 Main Electrical Characteristics Tamb.= +25°C Symbol Parameter F_out Output frequency range on RF_out port F_vco VCO frequency IF_out Output Intermediate frequency P_out Output power on RF_out port PFI Output power at Intermediate freq. (IF) PN SSB Phase Noise @F_out@100KHz Ref. : DSCHV3242QDG4242 - 29 Aug 14 1/14 Min 24.0 -3 Typ Max 24.125 24.25 F_out/2 F_out/1024 16 1 -94 Unit GHz GHz GHz dBm dBm dBc/Hz Specifications subject to change without notice United Monolithic Semiconductors S.A.S. Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO Electrical Characteristics Note: Electrical parameters specified below are defined for an operating temperature range from -40°C to 105°C. VCO & buffer section Symbol Parameters F_out Output Frequency range (Operating band) F_vco VCO frequency V_Tune Voltage Tuning range T_sens Tuning sensitivity F_drift Frequency drift rate H1 Harmonics 1/2F_out H3 Harmonics 3/2 F_out H4 Harmonics 2 F_out Pres_Rj F_out prescaler spurious rejection PN SSB Phase Noise @ F_out @ 100 KHz VSWR Main Output (RF_Out) VSWR L_Pull Load Pulling into 2:1 VSWR for all phases PB_Pull Prescaler & 12GHz buffer switching pulling Push Pushing @ within the V_tune range P_out Output Power on RF_out port @ 5V supply +I Positive supply current +V Positive supply voltage Prescaler & buffer section Symbol Parameters IF_out IF Output Frequency Pres_P Output Power +ID Prescaler & 12GHz buffer supply current +IB 12GHz prescaler’s buffer supply current Min 24 Typ Max 24.25 F_out/2 1 250 400 5 6 725 MHz/°C -40 -40 -20 45 65 -94 2:1 -80 8 3 12 4.9 Min 16 130 5 Unit GHz GHz V MHz/V 250 19 170 5.1 Typ Max F_out/1024 -3 1 10 18 32 2 4 6 dBc dBc dBc dBc dBc/Hz MHz MHz MHz/V dBm mA V Unit GHz dBm mA mA All the parameters are specified within F_out specified frequency range. The minimum and maximum values take into account the spread due to the operating temperature and process spread. These performances have been obtained with the chip in QFN package assembled on the recommended boards (ref. 500865) described in this document. These performances are highly dependent on this environment. Ref. : DSCHV3242QDG4242 - 29 Aug 14 2/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO Absolute Maximum Ratings (1) Tamb.= +25°C Symbol Parameters Values Unit V_tune Positive Tuning voltage 10 V +V Positive supply voltage/Minimum supply voltage 6 / -0.3 V +ID Positive supply current (Prescaler) 35 mA +IB Positive supply current (Prescaler’s buffer) 7 mA +IB1 / +IB2 Positive supply current (buffers 2 & 3) 50 / 60 mA +I1 / +I2 Positive supply current (VCO+ buffer 1) 40 / 50 mA (2) Top Operating temperature range -40 to +105 °C (2) Tcase Max Absolute maximum rating Tcase temperature 115 °C Tstg Storage temperature range -55 to +125 °C (1) Operation of this device above anyone of these parameters may cause permanent damage. (2) Temperature of the back side of the QFN package Ref. : DSCHV3242QDG4242 - 29 Aug 14 3/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO Typical QFN Measurements on board 500865 (at QFN accesses) Note: The temperature mentioned below is taken at the back side of the QFN package. RF Output Frequency versus V-tune RF output frequency (GHz) 26 25.6 25.2 24.8 24.4 24 23.6 23.2 25 C -40 C 105 C 22.8 22.4 22 1 2 3 4 5 6 VT(V) Sensitivity versus V-tune 800 25 C -40 C Sensitivity (MHz/V) 700 105 C 600 500 400 300 200 1 2 3 4 5 6 VT(V) Ref. : DSCHV3242QDG4242 - 29 Aug 14 4/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO Typical QFN Measurements on board 500865 (at QFN accesses) RF Output Power versus V-tune 25 RF output power (dBm) 23 21 19 17 15 13 11 25 C -40 C 105 C 9 7 5 1 2 3 4 5 6 VT(V) IF Output Power versus V-tune Prescaler output power (dBm) 5 4 3 2 1 0 -1 -2 25 C -40 C 105 C -3 -4 -5 1 2 3 4 5 6 VT(V) Ref. : DSCHV3242QDG4242 - 29 Aug 14 5/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO Typical QFN Measurements on board 500865 (at QFN accesses) SSB Phase Noise (dBc/Hz) Phase Noise versus Offset frequency from 24GHz @ Top = +25°C (VA=V1=V2=VB1=VB2=VD=VB) 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 1.E+03 VA = 4.9V & 25 C VA = 5V &25 C VA = 5.1V & 25 C 1.E+04 1.E+05 1.E+06 Offset Frequency (Hz) SSB Phase Noise (dBc/Hz) Phase Noise versus Offset frequency from 24GHz @ Top = -40°C (VA=V1=V2=VB1=VB2=VD=VB) 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 1.E+03 VA = 4.9V & -40 C VA = 5V & -40 C VA = 5.1V & -40 C 1.E+04 1.E+05 1.E+06 Offset Frequency (Hz) Ref. : DSCHV3242QDG4242 - 29 Aug 14 6/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO Typical QFN Measurements on board 500865 (at QFN accesses) SSB Phase Noise (dBc/Hz) Phase Noise versus Offset frequency from 24GHz @ Top = 105°C (VA=V1=V2=VB1=VB2=VD=VB) 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 -110 -120 -130 1.E+03 VA = 4.9V & 105 C VA = 5V & 105 C VA = 5.1V & 105 C 1.E+04 1.E+05 1.E+06 Offset Frequency (Hz) 4th stage of the RF amplifier bias VB2 used for power setting Output power vs. VB2 @ 24 GHz RF output power (dBm) 20 18 16 14 12 10 8 6 25 C -40 C 105 C 4 2 0 0 1 2 3 4 5 VB2 (V) Ref. : DSCHV3242QDG4242 - 29 Aug 14 7/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO Typical QFN Measurements on board 500865 (at QFN accesses) 4th stage of the RF amplifier bias VB2 used for power setting IB2 Current consumption vs. VB2 @ 24 GHz 35 DC current IB2 (mA) 30 25 20 15 10 5 25 C -40 C 105 C 0 -5 0 1 2 3 4 5 VB2 (V) Prescaler and 12 GHz buffer switching effect on VCO frequency (MHz) Prescaler Pulling (MHz) 10 9 25 C -40 C 105 C 8 7 6 5 4 3 2 1 0 1 2 3 4 5 6 VT (V) Ref. : DSCHV3242QDG4242 - 29 Aug 14 8/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO Device thermal performances All the figures given in this section are obtained assuming that the QFN device is cooled down only by conduction through the package thermal pad (no convection mode considered). The temperature is monitored at the package back-side interface (Tcase) as shown below. The system maximum temperature must be adjusted in order to guarantee that Tcase remains below than the maximum value specified in the next table. So, the system PCB must be designed to comply with this requirement. A derating must be applied on the dissipated power if the Tcase temperature cannot be maintained below than the maximum temperature specified (see the curve Pdiss. Max) in order to guarantee the nominal device life time (MTTF). Note: the thermal specification is given by considering that all the voltage supply pins of the device are biased. DEVICE THERMAL SPECIFICATION : CHV3242-QDG Recommended max. junction temperature (Tj max) : 168 Junction temperature absolute maximum rating : 175 Max. continuous dissipated power (Pdiss. Max.) : 1.0 => Pdiss. Max. derating above Tcase(1)= 105 °C : 16 Junction-Case thermal resistance (Rth J-C)(2) : <60 Minimum Tcase operating temperature(3) : -40 Maximum Tcase operating temperature(3) : 105 Minimum storage temperature : -55 Maximum storage temperature : 150 °C °C W mW/°C °C/W °C °C °C °C (1) Derating at junctio n temperature co nstant = Tj max. (2) Rth J-C is calculated fo r a wo rst case co nsidering the ho t t e s t junc t io n o f the M M IC and all the devices biased. (3) Tcase=P ackage back side temperature measured under the die-attach-pad (see the drawing belo w). 1.2 0.8 0.6 0.4 0.2 Pdiss. Max. @Tj <Tj max (W) 0 -50 -25 0 25 50 75 100 125 150 175 Pdiss. Max. @Tj <Tj max (W) 1 Tcase Example: QFN 16L 3x3 Location of temperature reference point (Tcase) on package's bottom side Tcase (°C) 6.4 Ref. : DSCHV3242QDG4242 - 29 Aug 14 9/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO Package outline (1) Matte tin, Lead Free Units : From the standard : (Green) mm JEDEC MO-220 (VGGD) 1234567- Nc P Nc VT Nc Nc Nc 9101112131415- 8- Nc Nc VB V1 Nc VB1 Nc Gnd(2) 16- RF 17181920212223- Gnd(2) Nc Nc VB2 V2 Nc VD 24- Nc (1) The package outline drawing included to this data-sheet is given for indication. Refer to the application note AN0017 (http://www.ums-gaas.com) for exact package dimensions. (2) It is strongly recommended to ground all pins marked “Gnd” through the PCB board. Ensure that the PCB board is designed to provide the best possible ground to the package. Ref. : DSCHV3242QDG4242 - 29 Aug 14 10/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO Package Information Parameter Package body material Lead finish MSL Rating Value RoHS-compliant Low stress Injection Molded Plastic 100% matte tin (Sn) MSL1 ESD sensitivity Standard MIL-STD-1686C ESD STM5.1-2001 Value HBM Class 1 (<2000V) HBM Class 1C (1000V to <2000V) Evaluation mother board ■ Compatible with the proposed footprint. ■ Based on typically Ro4003 / 8mils or equivalent. ■ Using a micro-strip to coplanar transition to access the package. ■ Recommended for the implementation of this product on a module board. ■ Decoupling capacitors of 10nF ±10% are recommended for all DC accesses. ■ See application note AN0017 for details. Recommended Test Fixture (Ref. 500865) for measurements over Temperature Range: Ref. : DSCHV3242QDG4242 - 29 Aug 14 11/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO External Components and bias configuration (recommended) Important: A capacitor is required on the prescaler output port as a DC block (C2). Ref. : DSCHV3242QDG4242 - 29 Aug 14 12/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO Notes: Ref. : DSCHV3242QDG4242 - 29 Aug 14 13/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34 CHV3242-QDG Fully integrated HBT K-Band VCO Recommended package footprint Refer to the application note AN0017 available at http://www.ums-gaas.com for package foot print recommendations. SMD mounting procedure For the mounting process standard techniques involving solder paste and a suitable reflow process can be used. For further details, see application note AN0017. Recommended environmental management UMS products are compliant with the regulation in particular with the directives RoHS N°2011/65 and REACh N°1907/2006. More environmental data are available in the application note AN0019 also available at http://www.ums-gaas.com. Recommended ESD management Refer to the application note AN0020 available at http://www.ums-gaas.com for ESD sensitivity and handling recommendations for the UMS package products. Ordering Information QFN 4x4 package: CHV3242-QDG/XY Stick: XY = 20 Tape & reel: XY = 21 Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use as critical components in life support devices or systems without express written approval from United Monolithic Semiconductors S.A.S. Ref. : DSCHV3242QDG4242 - 29 Aug 14 14/14 Specifications subject to change without notice Bât. Charmille - Parc SILIC - 10, Avenue du Québec - 91140 VILLEBON-SUR-YVETTE - France Tel.: +33 (0) 1 69 86 32 00 - Fax: +33 (0) 1 69 86 34 34