LMP2012QML www.ti.com SNOSAU5H – MARCH 2007 – REVISED APRIL 2013 LMP2012QML Dual High Precision, Rail-to-Rail Output Operational Amplifier FEATURES DESCRIPTION • • • The LMP2012 offers unprecedented accuracy and stability. This device utilizes patented techniques to measure and continually correct the input offset error voltage. The result is an amplifier which is ultra stable over time and temperature. It has excellent CMRR and PSRR ratings, and does not exhibit the familiar 1/f voltage and current noise increase that plagues traditional amplifiers. The combination of the LMP2012 characteristics makes it a good choice for transducer amplifiers, high gain configurations, ADC buffer amplifiers, DAC I-V conversion, and any other 2.7V-5V application requiring precision and long term stability. 1 2 • • • • • • • • • Total Ionizing Dose 50 krad(Si) ELDRS Free 50 krad(Si) TCVIO Temperature Sensitivity (Typical) 0.015 µV/°C (For VS = 5V, Typical Unless Otherwise Noted) Low Ensured VIO over Temperature 60 µV Low Noise with no 1/f 35nV/√Hz High CMRR 90 dB High PSRR 90 dB High AVOL 85 dB Wide Gain-Bandwidth Product 3MHz High Slew Rate 4V/µs Rail-to-Rail Output 30mV No External Capacitors Required The QMLV version of the LMP2012 has been rated to tolerate a total dose level of 50krad/(Si) radiation by test method 1019 of MIL-STD-883. APPLICATIONS • • • • • • • Other useful benefits of the LMP2012 are rail-rail output, low supply current of 930 μA, and wide gainbandwidth product of 3 MHz. These extremely versatile features found in the LMP2012 provide high performance and ease of use. Attitude and Orbital Controls Static Earth Sensing Sun Sensors Inertial Sensors Pressure Sensors Gyroscopes Earth Observation Systems Connection Diagram OUT A 1 10 V+ - IN A 2 9 OUT B IN A+ 3 8 IN B- V- 4 7 IN B+ N/C 5 6 N/C Figure 1. 10-Lead CLGA (Top View) See NAC Package These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2013, Texas Instruments Incorporated LMP2012QML SNOSAU5H – MARCH 2007 – REVISED APRIL 2013 www.ti.com Absolute Maximum Ratings (1) Supply Voltage 5.8V Differential Input Voltage ±Supply Voltage Power Dissipation (2) 714mW Maximum Junction Temperature (TJmax) 150°C -0.3 ≤ VCM ≤ VCC +0.3V Common-Mode Input Voltage Current at Input Pin 30 mA Current at Output Pin 30 mA Current at Power Supply Pin 50 mA Operating Temperature Range -55°C to +125°C Storage Temperature Range -55°C to +150°C CLGA Lead Temperature (soldering 10 sec.) θJA Thermal Resistance θJC Package Weight +260°C CLGA (Still Air) 175°C/W CLGA (500LF/Min Air Flow) 115°C/W CLGA 12.3°C/W CLGA 220mg ESD Tolerance (3) (1) (2) (3) 4000V Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/θJA or the number given in the Absolute Maximum Ratings, whichever is lower. Human body model, 1.5 kΩ in series with 100 pF. Quality Conformance Inspection Table 1. Mil-Std-883, Method 5005 - Group A 2 Subgroup Description Temp (°C) 1 Static tests at +25 2 Static tests at +125 3 Static tests at -55 4 Dynamic tests at +25 5 Dynamic tests at +125 6 Dynamic tests at -55 7 Functional tests at +25 8A Functional tests at +125 8B Functional tests at -55 9 Switching tests at +25 10 Switching tests at +125 11 Switching tests at -55 12 Setting time at +25 13 Setting time at +125 14 Setting time at -55 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMP2012QML LMP2012QML www.ti.com SNOSAU5H – MARCH 2007 – REVISED APRIL 2013 LMP2012 Electrical Characteristics 2.7V DC Parameters The following conditions apply, unless otherwise specified. V+ = 2.7V, V-= 0V, V CM = 1.35V, VO = 1.35V and RL > 1 MΩ. Symbol VIO Parameter Conditions Notes IIB Input Bias Current IIO Input Offset Current CMRR Common Mode Rejection Ratio Max 36 60 0.5 Offset Calibration Time Input Offset Voltage (Temperature Sensitivity) Min 0.8 Input Offset Voltage TCVIO Typ (1) 10 12 −3 pA 0 ≤ VCM ≤ 0.9V Power Supply Rejection Ratio 120 AVOL Open Loop Voltage Gain 130 dB 95 dB 90 RL = 2 kΩ VO Output Swing 124 2.68 RL = 10 kΩ to 1.35V VIN(diff) = ±0.5V IS (1) Output Current dB 90 2, 3 2.64 1 0.060 V 18 Supply Current per Channel 1 1 0.085 V 2, 3 1 2, 3 5 1 3 2, 3 mA 5 3 0.919 2, 3 2,3 2.615 2.6 Sinking, VO = 5V VIN(diff) = ±0.5V 1 85 0.061 12 2, 3 1 2.63 Sourcing, VO = 0V VIN(diff) = ±0.5V 1 2, 3 0.105 IO 1 2, 3 90 0.075 RL = 2 kΩ to 1.35V VIN(diff) = ±0.5V 1 2, 3 95 0.033 2.65 1 2, 3 pA 95 90 PSRR RL = 10 kΩ ms µV/°C 130 Subgroups μV 0.015 6 −0.3 ≤ VCM ≤ 0.9V Units 1 2, 3 1.20 1.50 mA 1 2, 3 Typical values represent the most likely parametric norm. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMP2012QML 3 LMP2012QML SNOSAU5H – MARCH 2007 – REVISED APRIL 2013 www.ti.com LMP2012 Electrical Characteristics 2.7V AC Parameters The following conditions apply, unless otherwise specified. V+ = 2.7V, V -= 0V, VCM = 1.35V, VO = 1.35V, and RL > 1 MΩ. Symbol Parameter Conditions Notes Typ (1) Min Max Units Subgroups 1 5 MHz 4 GBW Gain-Bandwidth Product 3 SR Slew Rate 4 V/μs θm Phase Margin 60 Deg Gm Gain Margin −14 dB en Input-Referred Voltage Noise enP-P Input-Referred Voltage Noise trec Input Overload Recovery Time (1) RS = 100Ω, DC to 10 Hz 35 nV/√Hz 850 nVPP 50 ms Typical values represent the most likely parametric norm. LMP2012 Electrical Characteristics 2.7V DC Parameters – 50 krad(Si) Post Radiation Limits @ +25°C (1) The following conditions apply, unless otherwise specified. V+ = 2.7V, V -= 0V, VCM = 1.35V, VO = 1.35V, and RL > 1 MΩ. Symbol IS (1) Parameter Conditions Notes Supply Current per Channel Typ Min Max Units Subgroups 1.75 mA 1 Pre and post irradiation limits are identical to those listed under DC Parameters, except those listed in the Post Radiation Limit tables. LMP2012 Electrical Characteristics 2.7V Operating Life Test Delta Parameters TA = +25°C This is worst case drift, deltas are performed at room temperature post operation life. All other parameters, no deltas required. Symbol VIO 4 Parameter Input offset voltage Conditions 2.7 V Submit Documentation Feedback Limit Units ±2 μV Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMP2012QML LMP2012QML www.ti.com SNOSAU5H – MARCH 2007 – REVISED APRIL 2013 LMP2012 Electrical Characteristics 5V DC Parameters The following conditions apply, unless otherwise specified. V+ = 5V, V-= 0V, V CM = 2.5V, VO = 2.5V and RL > 1MΩ. Symbol VIO Parameter Conditions Notes Input Offset Voltage Typ (1) Min 0.12 Max 36 60 Offset Calibration Time 0.5 10 12 TCVIO Input Offset Voltage (Temperature Sensitivity) IIB Input Bias Current IIO Input Offset Current CMRR Common Mode Rejection Ratio −3 pA 0 ≤ VCM ≤ 3.2 PSRR Power Supply Rejection Ratio AVOL Open Loop Voltage Gain RL = 2 kΩ VO Output Swing RL = 10 kΩ to 2.5V VIN(diff) = ±0.5V dB 90 130 105 1 100 2, 3 132 dB 4.978 dB 95 1 0.080 V IS Sourcing, VO = 5V VIN(diff) = ±0.5V 17 Supply Current per Channel 4.875 0.125 V 2, 3 1 2, 3 8 1 6 2, 3 mA 8 1 2, 3 1.20 1.50 (1) 1 1 6 0.930 2, 3 2, 3 0.150 15 1 4.92 4.855 Sourcing, VO = 0V VIN(diff) = ±0.5V 2, 3 2, 3 4.91 4.919 1 90 0.091 Output Current 1 2, 3 95 0.095 IO 1 2, 3 120 0.040 RL = 2 kΩ to 2.5V VIN(diff) = ±0.5V 1 2, 3 pA 100 90 RL = 10 kΩ ms µV/°C 130 Subgroups μV 0.015 6 −0.3 ≤ VCM ≤ 3.2 Units mA 1 2, 3 Typical values represent the most likely parametric norm. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMP2012QML 5 LMP2012QML SNOSAU5H – MARCH 2007 – REVISED APRIL 2013 www.ti.com LMP2012 Electrical Characteristics 5V AC Parameters The following conditions apply, unless otherwise specified. V+ = 5V, V -= 0V, VCM = 2.5V, VO = 2.5V, and RL > 1 MΩ. Symbol Parameter Conditions Notes Typ (1) Min Max Units Subgroups 1 5 MHz 4 GBW Gain-Bandwidth Product 3 SR Slew Rate 4 V/μs θm Phase Margin 60 Deg Gm Gain Margin −15 dB en Input-Referred Voltage Noise enP-P Input-Referred Voltage Noise trec Input Overload Recovery Time (1) RS = 100Ω, DC to 10 Hz 35 nV/√Hz 850 nVPP 50 ms Typical values represent the most likely parametric norm. LMP2012 Electrical Characteristics 5V DC Parameters – 50 krad(Si) Post Radiation Limits @ +25°C (1) The following conditions apply, unless otherwise specified. V+ = 5V, V -= 0V, VCM = 2.5V, VO = 2.5V, and RL > 1 MΩ. Symbol IS (1) Parameter Conditions Notes Typ Supply Current per Channel Min Max Units Subgroups 1.75 mA 1 Pre and post irradiation limits are identical to those listed under DC Parameters, except those listed in the Post Radiation Limit tables. LMP2012 Electrical Characteristics 5V Operating Life Test Delta Parameters TA = +25°C This is worst case drift, deltas are performed at room temperature post operation life. All other parameters, no deltas required. Symbol VIO 6 Parameter Input offset voltage Conditions 5.0 V Submit Documentation Feedback Limit Units ±2 μV Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMP2012QML LMP2012QML www.ti.com SNOSAU5H – MARCH 2007 – REVISED APRIL 2013 APPLICATION INFORMATION THE BENEFITS OF LMP2012 NO 1/f NOISE Using patented methods, the LMP2012 eliminates the 1/f noise present in other amplifiers. That noise, which increases as frequency decreases, is a major source of measurement error in all DC-coupled measurements. Low-frequency noise appears as a constantly-changing signal in series with any measurement being made. As a result, even when the measurement is made rapidly, this constantly-changing noise signal will corrupt the result. The value of this noise signal can be surprisingly large. For example: If a conventional amplifier has a flat-band noise level of 10nV/√Hz and a noise corner of 10 Hz, the RMS noise at 0.001 Hz is 1µV/√Hz. This is equivalent to a 0.50 µV peak-to-peak error, in the frequency range 0.001 Hz to 1.0 Hz. In a circuit with a gain of 1000, this produces a 0.50 mV peak-to-peak output error. This number of 0.001 Hz might appear unreasonably low, but when a data acquisition system is operating for 17 minutes, it has been on long enough to include this error. In this same time, the LMP2012 will only have a 0.21 mV output error. This is smaller by 2.4 x. Keep in mind that this 1/f error gets even larger at lower frequencies. At the extreme, many people try to reduce this error by integrating or taking several samples of the same signal. This is also doomed to failure because the 1/f nature of this noise means that taking longer samples just moves the measurement into lower frequencies where the noise level is even higher. The LMP2012 eliminates this source of error. The noise level is constant with frequency so that reducing the bandwidth reduces the errors caused by noise. OVERLOAD RECOVERY The LMP2012 recovers from input overload much faster than most chopper-stabilized op amps. Recovery from driving the amplifier to 2X the full scale output, only requires about 40 ms. Many chopper-stabilized amplifiers will take from 250 ms to several seconds to recover from this same overload. This is because large capacitors are used to store the unadjusted offset voltage. Figure 2. The wide bandwidth of the LMP2012 enhances performance when it is used as an amplifier to drive loads that inject transients back into the output. ADCs (Analog-to-Digital Converters) and multiplexers are examples of this type of load. To simulate this type of load, a pulse generator producing a 1V peak square wave was connected to the output through a 10 pF capacitor. See Figure 2. The typical time for the output to recover to 1% of the applied pulse is 80 ns. To recover to 0.1% requires 860ns. This rapid recovery is due to the wide bandwidth of the output stage and large total GBW. NO EXTERNAL CAPACITORS REQUIRED The LMP2012 does not need external capacitors. This eliminates the problems caused by capacitor leakage and dielectric absorption, which can cause delays of several seconds from turn-on until the amplifier's error has settled. MORE BENEFITS The LMP2012 offers the benefits mentioned above and more. It has a rail-to-rail output and consumes only 950 µA of supply current while providing excellent DC and AC electrical performance. In DC performance, the LMP2012 achieves 130 dB of CMRR, 120 dB of PSRR and 130 dB of open loop gain. In AC performance, the LMP2012 provides 3 MHz of gain-bandwidth product and 4 V/µs of slew rate. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMP2012QML 7 LMP2012QML SNOSAU5H – MARCH 2007 – REVISED APRIL 2013 www.ti.com HOW THE LMP2012 WORKS The LMP2012 uses new, patented techniques to achieve the high DC accuracy traditionally associated with chopper-stabilized amplifiers without the major drawbacks produced by chopping. The LMP2012 continuously monitors the input offset and corrects this error. The conventional chopping process produces many mixing products, both sums and differences, between the chopping frequency and the incoming signal frequency. This mixing causes large amounts of distortion, particularly when the signal frequency approaches the chopping frequency. Even without an incoming signal, the chopper harmonics mix with each other to produce even more trash. If this sounds unlikely or difficult to understand, look at the plot in Figure 3, of the output of a typical (MAX432) chopper-stabilized op amp. This is the output when there is no incoming signal, just the amplifier in a gain of -10 with the input grounded. The chopper is operating at about 150 Hz; the rest is mixing products. Add an input signal and the noise gets much worse. Compare this plot with Figure 4 of the LMP2012. This data was taken under the exact same conditions. The auto-zero action is visible at about 30 kHz but note the absence of mixing products at other frequencies. As a result, the LMP2012 has very low distortion of 0.02% and very low mixing products. Figure 3. 10000 VOLTAGE NOISE (nV/ Hz) VS = 5V 1000 100 10 0.1 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 4. INPUT CURRENTS The LMP2012's input currents are different than standard bipolar or CMOS input currents in that it appears as a current flowing in one input and out the other. Under most operating conditions, these currents are in the picoamp level and will have little or no effect in most circuits. These currents tend to increase slightly when the common-mode voltage is near the minus supply. At high temperatures, the input currents become larger, 0.5 nA typical, and are both positive except when the VCM is near V−. If operation is expected at low common-mode voltages and high temperature, do not add resistance in series with the inputs to balance the impedances. Doing this can cause an increase in offset voltage. A small resistance such as 1 kΩ can provide some protection against very large transients or overloads, and will not increase the offset significantly. 8 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMP2012QML LMP2012QML www.ti.com SNOSAU5H – MARCH 2007 – REVISED APRIL 2013 PRECISION STRAIN-GAUGE AMPLIFIER This Strain-Gauge amplifier (Figure 5) provides high gain (1006 or ~60 dB) with very low offset and drift. Using the resistors' tolerances as shown, the worst case CMRR will be greater than 108 dB. The CMRR is directly related to the resistor mismatch. The rejection of common-mode error, at the output, is independent of the differential gain, which is set by R3. The CMRR is further improved, if the resistor ratio matching is improved, by specifying tighter-tolerance resistors, or by trimming. 5V + VOUT + R1 R2 R2 R1 10k, 0.1% 2k, 1% 2k, 1% 10k, 0.1% R3 20: Figure 5. Extending Supply Voltages and Output Swing by Using a Composite Amplifier Configuration: In cases where substantially higher output swing is required with higher supply voltages, arrangements like the ones shown in Figure 6 and Figure 7 could be used. These configurations utilize the excellent DC performance of the LMP2012 while at the same time allow the superior voltage and frequency capabilities of the LM6171 to set the dynamic performance of the overall amplifier. For example, it is possible to achieve ±12V output swing with 300 MHz of overall GBW (AV = 100) while keeping the worst case output shift due to VOS less than 4 mV. The LMP2012 output voltage is kept at about mid-point of its overall supply voltage, and its input common mode voltage range allows the V- terminal to be grounded in one case (Figure 6, inverting operation) and tied to a small non-critical negative bias in another (Figure 7, non-inverting operation). Higher closed-loop gains are also possible with a corresponding reduction in realizable bandwidth. Table 2 shows some other closed loop gain possibilities along with the measured performance in each case. C2 R2 R7, 3.9k C4 0.01 PF R1 Input 2 - +15V 1N4733A (5.1V) D1 7 3 LMP201X 3 U1 + 4 7 + LM6171 2 U2 4 6 6 Output -15V (+2.5V) +15V R3 20k R4 3.9k R5, 1M C3 0.01 PF Figure 6. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMP2012QML 9 LMP2012QML SNOSAU5H – MARCH 2007 – REVISED APRIL 2013 www.ti.com Table 2. Composite Amplifier Measured Performance AV R1 Ω R2 Ω C2 pF BW MHz SR (V/μs) en p-p (mVPP) 50 200 10k 8 3.3 178 37 100 100 10k 10 2.5 174 70 100 1k 100k 0.67 3.1 170 70 500 200 100k 1.75 1.4 96 250 1000 100 100k 2.2 0.98 64 400 In terms of the measured output peak-to-peak noise, the following relationship holds between output noise voltage, en p-p, for different closed-loop gain, AV, settings, where −3 dB Bandwidth is BW: C2 R2 R7, 3.9k C4 0.01 PF R1 +15V 1N4731A (4.3V) D1 2 7 LMP201X 3 U1 + 4 Input 3 6 -15V R6 (-0.7V) 10k +15V R3 C5 0.01 PF 7 + LM6171 2 U2 4 Output 6 (+2.5V) 20k D2 R4 1N4148 3.9k R5, 1M C3 0.01 PF Figure 7. It should be kept in mind that in order to minimize the output noise voltage for a given closed-loop gain setting, one could minimize the overall bandwidth. As can be seen from Equation 1 above, the output noise has a square-root relationship to the Bandwidth. In the case of the inverting configuration, it is also possible to increase the input impedance of the overall amplifier, by raising the value of R1, without having to increase the feed-back resistor, R2, to impractical values, by utilizing a "Tee" network as feedback. See the LMC6442 data sheet (Application Notes section) for more details on this. +5V +5V - VIN +VREF +Input LMP201X + 430: (0V to 5V Range) ADC1203X -Input -VREF +2.5V LM9140-2.5 GND 1M Figure 8. 10 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMP2012QML LMP2012QML www.ti.com SNOSAU5H – MARCH 2007 – REVISED APRIL 2013 LMP2012 AS ADC INPUT AMPLIFIER The LMP2012 is a great choice for an amplifier stage immediately before the input of an ADC (Analog-to-Digital Converter), whether AC or DC coupled. See Figure 8 and Figure 9. This is because of the following important characteristics: A) Very low offset voltage and offset voltage drift over time and temperature allow a high closed-loop gain setting without introducing any short-term or long-term errors. For example, when set to a closed-loop gain of 100 as the analog input amplifier for a 12-bit A/D converter, the overall conversion error over full operation temperature and 30 years life of the part (operating at 50°C) would be less than 5 LSBs. B) Fast large-signal settling time to 0.01% of final value (1.4 μs) allows 12 bit accuracy at 100 KHZ or more sampling rate. C) No flicker (1/f) noise means unsurpassed data accuracy over any measurement period of time, no matter how long. Consider the following op amp performance, based on a typical low-noise, high-performance commercially-available device, for comparison: Op amp flatband noise = 8nV/√Hz 1/f corner frequency = 100 Hz AV = 2000 Measurement time = 100 sec Bandwidth = 2 Hz This example will result in about 2.2 mVPP (1.9 LSB) of output noise contribution due to the op amp alone, compared to about 594 μVPP (less than 0.5 LSB) when that op amp is replaced with the LMP2012 which has no 1/f contribution. If the measurement time is increased from 100 seconds to 1 hour, the improvement realized by using the LMP2012 would be a factor of about 4.8 times (2.86 mVPP compared to 596 μV when LMP2012 is used) mainly because the LMP2012 accuracy is not compromised by increasing the observation time. D) Rail-to-Rail output swing maximizes the ADC dynamic range in 5-Volt single-supply converter applications. Below are some typical block diagrams showing the LMP2012 used as an ADC amplifier (Figure 8 and Figure 9). Figure 9. RADIATION ENVIRONMENTS Careful consideration should be given to environmental conditions when using a product in a radiation environment. TOTAL IONIZING DOSE Radiation hardness assured (RHA) products are those part numbers with a total ionizing specified in the Ordering Information table on the front page. Testing and qualification of these on a wafer level according to MIL-STD-883G, Test Method 1019.7, Condition A and the temperature anneal test” described in section 3.11 for application environment dose rates rad(Si)/s. Wafer level TID data are available with lot shipments. dose (TID) level products is done “Extended room less than 0.082 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMP2012QML 11 LMP2012QML SNOSAU5H – MARCH 2007 – REVISED APRIL 2013 www.ti.com ELDRS-FREE PRODUCTS ELDRS-Free products are tested and qualified on a wafer level basis at a dose rate of 10 mrad(Si)/s per MILSTD-883G, Test Method 1019.7, Condition D. Wafer level low dose rate test data are available with lot shipments. SINGLE EVENT UPSET A report on single event upset (SEU) is available upon request. Revision History Date Released Revision Section 03/19/07 A Initial Release 10/17/08 B Electrical Section 07/13/09 C 2.7V DC and 5V DC Electrical Section Added typical parameter TCVOS to 2.7V DC and 5V DC Electrical Section. Revision B will be Archived. 12/08/09 D Features, Ordering Information and Notes Reference to ELDRS, New ELDRS part number and added ELDRS Note 6. Revision C will be Archived. 06/08/2010 E General Description, 2.7V DC and 5V DC Electrical Section added New Radiation Section. Removed first line. Added Delta Table to Electrical's to match what is in the SMD and New Radiation Section. Revision D will be Archived. 11/30/2010 F AC Electrical 5V parameter table conditions 04/02/2013 H All 12 Changes Initial Release Added typical parameters to 2.7V and 5V AC Electrical Sections. Revision A will be Archived. Correct typo to unless otherwise specified parameters From: V+ = 2.7V, V -= 0V, VCM = 1.35V, VO = 1.35V, and RL > 1 MΩ. To: V+ = 5V, V -= 0V, VCM = 2.5V, VO = 2.5V, and RL > 1 MΩ. Revision E will be Archived. Changed layout of National Data Sheet to TI format Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMP2012QML IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed. TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications. In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms. No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use. Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949. Products Applications Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps DSP dsp.ti.com Energy and Lighting www.ti.com/energy Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Security www.ti.com/security Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video RFID www.ti-rfid.com OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com Wireless Connectivity www.ti.com/wirelessconnectivity Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2013, Texas Instruments Incorporated