TI1 LM2651MTCX-3.3/NOPB 1.5 a high-efficiency synchronous switching regulator Datasheet

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LM2651
SNVS032E – FEBRUARY 2000 – REVISED JANUARY 2016
LM2651 1.5 A High-Efficiency Synchronous Switching Regulator
1 Features
3 Description
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•
The LM2651 switching regulator provides highefficiency power conversion over a 100:1 load range
(1.5 A to 15 mA). This feature makes the LM2651 an
ideal fit in battery-powered applications that demand
long battery life in both run and standby modes.
1
•
•
•
•
•
•
•
•
•
•
Ultrahigh Efficiency up to 97%
High-Efficiency Over a 1.5-A to 1.5-mA Load
Range
4-V to 14-V Input Voltage Range
1.8-V, 2.5-V, 3.3-V, or ADJ Output Voltage
Internal MOSFET Switch With Low RDS(on) of
75 mΩ
300-kHz Fixed Frequency Internal Oscillator
7-µA Shutdown Current
Patented Current Sensing for Current Mode
Control
Input Undervoltage Lockout
Adjustable Soft-Start
Current Limit and Thermal Shutdown
16-Pin TSSOP Package
2 Applications
•
•
•
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Personal Digital Assistants (PDAs)
Computer Peripherals
Battery-Powered Devices
Handheld Scanners
High-Efficiency 5-V Conversion
Synchronous rectification is used to achieve up to
97% efficiency. At light loads, the LM2651 enters a
low power hysteretic or sleep mode to maintain high
efficiency. In many applications, the efficiency still
exceeds 80% at 15-mA load. A shutdown pin is
available to disable the LM2651 and reduce the
supply current to less than 10 µA.
The LM2651 contains a patented current sensing
circuitry for current mode control. This feature
eliminates the external current sensing resistor
required by other current-mode DC-DC converters.
The LM2651 has a 300-kHz fixed frequency internal
oscillator. The high oscillator frequency allows the
use of extremely small, low-profile components.
A programmable soft-start feature limits current
surges from the input power supply at start-up and
provides a simple means of sequencing multiple
power supplies.
Other protection features include input undervoltage
lockout, current limiting, and thermal shutdown.
Device Information(1)
PART NUMBER
LM2651
PACKAGE
TSSOP (16)
BODY SIZE (NOM)
5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
LM2651
SNVS032E – FEBRUARY 2000 – REVISED JANUARY 2016
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
4
4
4
4
5
8
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information .................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description ............................................ 10
7.1 Overview ................................................................. 10
7.2 Functional Block Diagram ....................................... 10
7.3 Feature Description................................................. 11
7.4 Device Functional Modes........................................ 11
8
Application and Implementation ........................ 12
8.1 Application Information............................................ 12
8.2 Typical Application .................................................. 12
9 Power Supply Recommendations...................... 16
10 Layout................................................................... 16
10.1 Layout Guidelines ................................................. 16
10.2 Layout Example .................................................... 16
11 Device and Documentation Support ................. 17
11.1
11.2
11.3
11.4
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
17
17
17
17
12 Mechanical, Packaging, and Orderable
Information ........................................................... 17
4 Revision History
Changes from Revision D (April 2013) to Revision E
•
2
Page
Added ESD Ratings table, Thermal Information table, Feature Description section, Device Functional Modes,
Application and Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section ..................................... 1
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5 Pin Configuration and Functions
PW Package
16-Pin TSSOP
Top View
Pin Functions
PIN
NO.
NAME
TYPE (1)
DESCRIPTION
1, 2
SW
O
Switched-node connection, which is connected with the source of the internal high-side MOSFET.
3 to 5
VIN
I
Main power supply pin
6
VCB
I
Bootstrap capacitor connection for high-side gate drive
7
AVIN
I
Input supply voltage for control and driver circuits
8
SD(SS)
I
Shutdown and soft-start control pin. Pulling this pin below 0.3 V shuts off the regulator. A capacitor
connected from this pin to ground provides a control ramp of the input current. Do not drive this pin
with an external source or erroneous operation may result.
9
FB
I
Output voltage feedback input. Connected to the output voltage.
10
COMP
I
Compensation network connection. Connected to the output of the voltage error amplifier.
11
NC
G
No internal connection
12 to 13
AGND
G
Low-noise analog ground
14 to 16
PGND
G
Power ground
(1)
I = Input, O = Output, and G = Ground
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1) (2)
MIN
Input voltage
−0.4
Feedback pin voltage
Power dissipation (TA = 25°C) (3)
MAX
UNIT
15
V
5
V
893
mW
Junction temperature, TJ
−40
125
°C
Storage temperature, Tstg
−65
150
°C
(1)
(2)
(3)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications.
The maximum allowable power dissipation is calculated by using PDmax = (TJmax – TA) / θJA , where TJmax is the maximum junction
temperature, TA is the ambient temperature, and θJA is the junction-to-ambient thermal resistance of the specified package. The 893mW rating results from using 150°C, 25°C, and 140°C/W for TJmax, TA, and θJA respectively. A θJA of 140°C/W represents the worstcase condition of no heat sinking of the 16-pin TSSOP package. Heat sinking allows the safe dissipation of more power. The absolute
maximum power dissipation must be derated by 7.1 4 mW per °C above 25°C ambient. The LM2651 actively limits its junction
temperature to about 165°C.
6.2 ESD Ratings
V(ESD)
(1)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 (1)
VALUE
UNIT
±1000
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
VIN
Supply voltage
NOM
MAX
4
14
UNIT
V
6.4 Thermal Information
LM2651
THERMAL METRIC
(1)
PW (TSSOP)
UNIT
16 PINS
RθJA
Junction-to-ambient thermal resistance
97.3
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance
29.9
°C/W
RθJB
Junction-to-board thermal resistance
43.1
°C/W
ψJT
Junction-to-top characterization parameter
1.8
°C/W
ψJB
Junction-to-board characterization parameter
42.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
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6.5 Electrical Characteristics
specifications are TJ = 25°C and VIN = 10 V (unless otherwise specified) (1)
PARAMETER
MIN
TYP (2)
MAX
TJ = 25°C
1.761
1.8
1.836
Over full operating
junction temperature
range
1.719
TEST CONDITIONS
UNIT
LM2651-1.8
Output voltage
ILOAD = 900 mA
Output voltage line regulation
VIN = 4 V to 14 V, ILOAD = 900 mA
0.2%
ILOAD = 10 mA to 1.5 A, VIN = 5 V
1.3%
ILOAD = 200 mA to 1.5 A, VIN = 5 V
0.3%
VOUT
Output voltage load regulation
VHYST
Sleep mode output voltage
hysteresis
V
1.854
35
mV
LM2651-2.5
TJ = 25°C
2.43
2.5
Output voltage
ILOAD = 900 mA
Output voltage line regulation
VIN = 4 V to 12 V, ILOAD = 900 mA
0.2%
ILOAD = 10 mA to 1.5 A, VIN = 5 V
1.3%
ILOAD = 200 mA to 1.5 A, VIN = 5 V
0.3%
VOUT
Output voltage load regulation
VHYST
Over full operating
junction temperature
range
2.388
Sleep mode output voltage
hysteresis
2.574
V
2.575
48
mV
LM2651-3.3
3.265
Over full operating
junction temperature
range
3.201
Output voltage line regulation
VIN = 4 V to 14 V, ILOAD = 900 mA
0.2%
ILOAD = 10 mA to 1.5 A, VIN = 5 V
1.3%
ILOAD = 200 mA to 1.5 A, VIN = 5 V
0.3%
Output voltage load regulation
Sleep mode output voltage
hysteresis
LM2651-ADJ
VOUT
VHYST
3.379
V
3.399
60
mV
(3)
TJ = 25°C
VFB
3.3
ILOAD = 900 mA
VOUT
VHYST
TJ = 25°C
Output voltage
Over full operating
junction temperature
range
1.238
Feedback voltage
ILOAD = 900 mA
Output voltage line regulation
VIN = 4 V to 14 V, ILOAD = 900 mA
0.2%
ILOAD = 10 mA to 1.5 A, VIN = 5 V
1.3%
ILOAD = 200 mA to 1.5 A, VIN = 5 V
0.3%
Output voltage load regulation
Sleep mode output voltage
hysteresis
1.2
V
1.263
24
mV
ALL OUTPUT VOLTAGE VERSIONS
IQ
Quiescent current
IQSD
Quiescent current in shutdown
mode
TJ = 25°C
1.6
Over full operating junction temperature range
TJ = 25°C
(1)
(2)
(3)
Shutdown pin pulled
low
Over full operating
junction temperature
range
2
7
mA
12
20
µA
All limits are ensured at room temperature (standard typeface) and at temperature extremes. All room temperature limits are 100%
production tested. All limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC)
methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Typical numbers are at 25°C and represent the most likely norm.
VOUT = 2.5 V
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Electrical Characteristics (continued)
specifications are TJ = 25°C and VIN = 10 V (unless otherwise specified)(1)
PARAMETER
RSW(ON)
High-Side or low-side switch on
resistance (MOSFET on
resistance + bonding wire
resistance)
RDS(ON)
MOSFET on resistance (highside or low-side)
TEST CONDITIONS
MIN
ISWITCH = 1 A
IL
Switch leakage current - low
side
130
Error amplifier transconductance
IBOOT = 1 mA
6.45
Over full operating
junction temperature
range
VIN undervoltage lockout
threshold voltage
VUV-HYST
Hysteresis for the undervoltage
lockout
Rising edge
Switch current limit
VIN = 5 V
ISM
Sleep mode threshold current
VIN = 5 V
AV
Error amplifier voltage gain
Error amplifier sink current
VEAH
Over full operating
junction temperature
range
1.55
TJ = 25°C
25
Over full operating junction temperature range
15
TJ = 25°C
mV
2.6
2.5
Over full operating junction temperature range
2.4
VEAL
Error amplifier output swing
lower limit
TJ = 25°C
VD
Body diode voltage
IDIODE = 1.5 A
mA
100
V/V
40
µA
µA
2.7
1.25
Over full operating junction temperature range
V
1.35
1.5
1
TJ = 25°C
280
Over full operating
junction temperature
range
255
TJ = 25°C
300
V
V
330
345
kHz
95%
Over full operating
junction temperature
range
DMAX
Maximum duty cycle
VIN = 4 V
ISS
Soft-Start current
TJ = 25°C
Voltage at the SS pin Over full operating
= 1.4 V
junction temperature
range
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A
100
65
TJ = 25°C
VIN = 4 V
V
2
Over full operating
junction temperature
range
Error amplifier output swing
upper limit
6
µmho
3.95
30
Oscillator frequency
V
3.8
Over full operating junction temperature range
fOSC
7
210
ICL
IEA_SINK
6.95
1250
TJ = 25°C
IEA_SOURCE Error amplifier source current
6.75
6.4
TJ = 25°C
VINUV
mΩ
nA
TJ = 25°C
GM
mΩ
130
130
Bootstrap regulator voltage
UNIT
75
Over full operating
junction temperature
range
Switch leakage current - high
side
VBOOT
MAX
110
TJ = 25°C
ISWITCH = 1 A
TYP (2)
92%
11
7
14
µA
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Electrical Characteristics (continued)
specifications are TJ = 25°C and VIN = 10 V (unless otherwise specified)(1)
PARAMETER
ISHUTDOWN
Shutdown pin current
MIN
TYP (2)
MAX
TJ = 25°C
0.8
2.2
3.7
Over full operating
junction temperature
range
0.5
TEST CONDITIONS
Shutdown pin pulled
low
TJ = 25°C
vSHUTDOWN Shutdown pin threshold voltage
TSD
Thermal shutdown temperature
TSD_HYST
Thermal shutdown hysteresis
temperature
Falling edge
Over full operating
junction temperature
range
4
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µA
0.6
0.3
0.9
V
165
°C
25
°C
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UNIT
7
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6.6 Typical Characteristics
8
Figure 1. IQ vs Input Voltage
Figure 2. IQSD vs Input Voltage
Figure 3. IQSD vs Junction Temperature
Figure 4. Frequency vs Junction Temperature
Figure 5. RDS(ON) vs Input Voltage
Figure 6. RDS(ON) vs Junction Temperature
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Typical Characteristics (continued)
Figure 7. Current Limit vs Input Voltage
(VOUT = 2.5 V)
Figure 8. Current Limit vs Junction Temperature
(VOUT = 2.5 V)
Figure 9. Current Limit vs Junction Temperature
(VOUT = 3.3 V)
Figure 10. Current Limit vs Input Voltage
(VOUT = 3.3 V)
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7 Detailed Description
7.1 Overview
The LM2651 operates in a constant frequency (300 kHz), current-mode PWM for moderate to heavy loads, and
automatically switches to hysteretic mode for light loads. In hysteretic mode, the switching frequency is reduced
to maintain high efficiency.
7.2 Functional Block Diagram
10
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7.3 Feature Description
When the load current is higher than the sleep mode threshold, the part is always operating in PWM mode. At
the beginning of each switching cycle, the high-side switch is turned on, the current from the high-side switch is
sensed and compared with the output of the error amplifier (COMP pin). When the sensed current reaches the
COMP pin voltage level, the high-side switch is turned off; after 40 ns (deadtime), the low-side switch is turned
on. At the end of the switching cycle, the low-side switch is turned off; and the same cycle repeats.
When the load current decreases below the sleep mode threshold, the output voltage rises slightly, this rise is
sensed by the hysteretic mode comparator which makes the part go into the hysteretic mode with both the high
and low side switches off. The output voltage starts to drop until it hits the low threshold of the hysteretic
comparator, and the part immediately goes back to the PWM operation. The output voltage keeps increasing
until it reaches the top hysteretic threshold, then both the high- and low-side switches turn off again, and the
cycle repeats.
7.4 Device Functional Modes
The cycle-by-cycle current limit circuitry turns off the high-side MOSFET whenever the current in MOSFET
reaches 2 A. A shutdown pin is available to disable the LM2651 and reduce the supply current to 7 µA.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
LM2651 operates in a constant frequency (300 kHz), current-mode PWM for moderate to heavy loads; and it
automatically switches to hysteretic mode for light loads. The current of the top switch is sensed by a patented
internal circuitry. This unique technique gets rid of the external sense resistor, saves cost and size, and improves
noise immunity of the sensed current. A feed forward from the input voltage is added to reduce the variation of
the current limit over the input voltage range.
8.2 Typical Application
Figure 11. Schematic for the Typical Board Layout
8.2.1 Design Requirements
To properly size the components for the application, the designer needs the following parameters: input voltage
range, output voltage, output current range, and the switching frequency. These four main parameters affect the
choices of component available to achieve a proper system behavior. TI recommends a Schottky diode to
prevent the intrinsic body diode of the low-side MOSFET from conducting during deadtime. See Detailed Design
Procedure for more information.
8.2.2 Detailed Design Procedure
This section presents guidelines for selecting external components.
8.2.2.1 Input Capacitor
A low ESR aluminum, tantalum, or ceramic capacitor is needed between the input pin and power ground. This
capacitor prevents large voltage transients from appearing at the input. The capacitor is selected based on the
RMS current and voltage requirements. The RMS current is given by Equation 1.
I RMS = IOUT ´
12
VOUT (VIN - VOUT )
VIN
(1)
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Typical Application (continued)
The RMS current reaches its maximum (IOUT/2) when VIN equals 2 VOUT. For an aluminum or ceramic capacitor,
the voltage rating should be at least 25% higher than the maximum input voltage. If a tantalum capacitor is used,
the voltage rating required is about twice the maximum input voltage. The tantalum capacitor should be surgecurrent tested by the manufacturer to prevent being shorted by the inrush current. TI also recommends putting a
small ceramic capacitor (0.1 μF) between the input pin and ground pin to reduce high-frequency spikes.
8.2.2.2 Inductor
The most critical parameters for the inductor are the inductance, peak current, and the DC resistance. The
inductance is related to the peak-to-peak inductor ripple current, the input and the output voltages, as given by
Equation 2.
L=
(VIN - VOUT )VOUT
VIN ´ I RIPPLE´ 300 kHz
(2)
A higher value of ripple current reduces inductance, but increases the conductance loss, core loss, current stress
for the inductor and switch devices. It also requires a bigger output capacitor for the same output voltage ripple
requirement. A reasonable value is setting the ripple current to be 30% of the DC output current. Since the ripple
current increases with the input voltage, the maximum input voltage is always used to determine the inductance.
The DC resistance of the inductor is a key parameter for the efficiency. Lower DC resistance is available with a
bigger winding area. A good tradeoff between the efficiency and the core size is letting the inductor copper loss
equal 2% of the output power.
8.2.2.3 Output Capacitor
The selection of COUT is driven by the maximum allowable output voltage ripple. The output ripple in the constant
frequency, PWM mode is approximated by using Equation 3.
æ
ö
1
VRIPPLE = I RIPPLEç ESR +
÷
8FSCOUT ø
è
(3)
The ESR term usually plays the dominant role in determining the voltage ripple. A low ESR aluminum electrolytic
or tantalum capacitor (such as Nichicon PL series, Sanyo OS-CON, Sprague 593D, 594D, AVX TPS, and CDE
polymer aluminum) is recommended. An electrolytic capacitor is not recommended for temperatures below
−25°C since its ESR rises dramatically at cold temperature. A tantalum capacitor has a much better ESR
specification at cold temperature and is preferred for low temperature applications.
The output voltage ripple in constant frequency mode has to be less than the sleep mode voltage hysteresis to
avoid entering the sleep mode at full load as given by Equation 4.
VRIPPLE < 20 mV x VOUT /VFB
(4)
8.2.2.4 Boost Capacitor
TI recommends a 0.1-μF ceramic capacitor for the boost capacitor. The typical voltage across the boost
capacitor is 6.7 V.
8.2.2.5 Soft-Start Capacitor
A soft-start capacitor is used to provide the soft-start feature. When the input voltage is first applied, or when the
SD(SS) pin is allowed to go high, the soft-start capacitor is charged by a current source (approximately 2 μA).
When the SD(SS) pin voltage reaches 0.6 V (shutdown threshold), the internal regulator circuitry starts to
operate. The current charging the soft-start capacitor increases from 2 μA to approximately 10 μA. With the
SD(SS) pin voltage between 0.6 V and 1.3 V, the level of the current limit is zero, which means the output
voltage is still zero. When the SD(SS) pin voltage increases beyond 1.3 V, the current limit starts to increase.
The switch duty cycle, which is controlled by the level of the current limit, starts with narrow pulses and gradually
gets wider. At the same time, the output voltage of the converter increases towards the nominal value, which
brings down the output voltage of the error amplifier. When the output of the error amplifier is less than the
current limit voltage, it takes over the control of the duty cycle. The converter enters the normal current-mode
PWM operation. The SD(SS) pin voltage is eventually charged up to about 2 V.
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Typical Application (continued)
The soft-start time can be estimated using Equation 5.
TSS = CSS x 0.6 V/2 μA + CSS x (2 V − 0.6 V)/10 μA
(5)
8.2.2.6 R1 and R2 (Programming Output Voltage)
Use Equation 6 to select the appropriate resistor values.
VOUT = VREF(1 + R1/R2)
where
•
VREF = 1.238 V
(6)
Select resistors between 10 kΩ and 100 kΩ. (1% or higher accuracy metal film resistors for R1 and R2.)
8.2.2.7 Compensation Components
In the control to output transfer function, the first pole Fp1 can be estimated as 1/(2πROUTCOUT); The ESR zero
Fz1 of the output capacitor is 1/(2πESRCOUT); Also, there is a high-frequency pole Fp2 in the range of 45 kHz to
150 kHz as given by Equation 7.
Fp2 = Fs/(πn(1−D))
where
•
•
D = VOUT/VIN
n = 1+0.348L/(VIN−VOUT) (L is in µHs and VIN and VOUT in volts).
(7)
The total loop gain G is approximately 500/IOUT where IOUT is in amperes.
A Gm amplifier is used inside the LM2651. The output resistor Ro of the Gm amplifier is about 80 kΩ. Cc1 and RC
together with Ro give a lag compensation to roll off the gain as given by Equation 8.
Fpc1 = 1/(2πCc1(Ro+Rc)), Fzc1 = 1/2πCc1Rc.
(8)
In some applications, the ESR zero Fz1 cannot be cancelled by Fp2. Then, Cc2 is needed to introduce Fpc2 to
cancel the ESR zero, Fp2 = 1/(2πCc2Ro‖Rc).
The rule of thumb is to have more than 45° phase margin at the crossover frequency (G = 1).
If COUT is higher than 68 µF, Cc1 = 2.2 nF, and Rc = 15 kΩ are good choices for most applications. If the ESR
zero is too low to be cancelled by Fp2, add Cc2.
If the transient response to a step load is important, choose RC to be higher than 10 kΩ.
8.2.2.8 External Schottky Diode
TI recommends a Schottky diode D1 to prevent the intrinsic body diode of the low-side MOSFET from conducting
during the deadtime in PWM operation and hysteretic mode when both MOSFETs are off. If the body diode turns
on, there is extra power dissipation in the body diode because of the reverse-recovery current and higher forward
voltage; the high-side MOSFET also has more switching loss since the negative diode reverse-recovery current
appears as the high-side MOSFET turnon current in addition to the load current. These losses degrade the
efficiency by 1–2%. The improved efficiency and noise immunity with the Schottky diode become more obvious
with increasing input voltage and load current.
The breakdown voltage rating of D1 is preferred to be 25% higher than the maximum input voltage. Since D1 is
only on for a short period of time, the average current rating for D1 only requires being higher than 30% of the
maximum output current. It is important to place D1 very close to the drain and source of the low-side MOSFET,
extra parasitic inductance in the parallel loop slows the turnon of D1 and direct the current through the body
diode of the low-side MOSFET.
When an undervoltage situation occurs, the output voltage can be pulled below ground as the inductor current is
reversed through the synchronous FET. For applications that require protection from a negative voltage, TI
recommends a clamping diode D2. When used, D2 should be connected cathode to VOUT and anode to ground.
TI recommends a diode rated for a minimum of 2 A.
14
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Product Folder Links: LM2651
LM2651
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SNVS032E – FEBRUARY 2000 – REVISED JANUARY 2016
Typical Application (continued)
8.2.3 Application Curves
(VIN = 5 V, VOUT = 3.3 V)
Figure 12. Efficiency vs Load Current
Figure 13. Sleep Mode Threshold vs Output Voltage
For ADJ Version (VIN = 5 V)
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Product Folder Links: LM2651
15
LM2651
SNVS032E – FEBRUARY 2000 – REVISED JANUARY 2016
www.ti.com
9 Power Supply Recommendations
The LM2651 is designed to operate from various DC power supplies. If so, VIN input should be protected from
reversal voltage and voltage dump over 15 V. The impedance of the input supply rail should be low enough that
the input current transient does not cause drop below VIN UVLO level. If the input supply is connected by using
long wires, additional bulk capacitance may be required in addition to normal input capacitor.
10 Layout
10.1 Layout Guidelines
Layout is critical to reduce noises and ensure specified performance. The important guidelines are listed as
follows:
1. Minimize the parasitic inductance in the loop of input capacitors and the internal MOSFETs by connecting the
input capacitors to VIN and PGND pins with short and wide traces. This is important because the rapidly
switching current, together with wiring inductance can generate large voltage spikes that may result in noise
problems.
2. Minimize the trace from the center of the output resistor divider to the FB pin and keep it away from noise
sources to avoid noise pickup. For applications requiring tight regulation at the output, TI recommends a
dedicated sense trace (separated from the power trace) to connect the top of the resistor divider to the
output.
3. If the Schottky diode D1 is used, minimize the traces connecting D1 to SW and PGND pins.
10.2 Layout Example
Figure 14. LM2651 Layout Recommendation
16
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LM2651
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SNVS032E – FEBRUARY 2000 – REVISED JANUARY 2016
11 Device and Documentation Support
11.1 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.2 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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17
PACKAGE OPTION ADDENDUM
www.ti.com
3-Nov-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM2651MTC-3.3
LIFEBUY
TSSOP
PW
16
92
TBD
Call TI
Call TI
-40 to 125
2651MTC
-3.3
LM2651MTC-3.3/NOPB
ACTIVE
TSSOP
PW
16
92
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
2651MTC
-3.3
LM2651MTC-ADJ
NRND
TSSOP
PW
16
92
TBD
Call TI
Call TI
-40 to 125
2651MTC
-ADJ
LM2651MTC-ADJ/NOPB
ACTIVE
TSSOP
PW
16
92
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
2651MTC
-ADJ
LM2651MTCX-3.3/NOPB
ACTIVE
TSSOP
PW
16
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
2651MTC
-3.3
LM2651MTCX-ADJ/NOPB
ACTIVE
TSSOP
PW
16
2500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 125
2651MTC
-ADJ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
3-Nov-2015
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Nov-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM2651MTCX-3.3/NOPB TSSOP
PW
16
2500
330.0
12.4
6.95
5.6
1.6
8.0
12.0
Q1
LM2651MTCX-ADJ/NOPB TSSOP
PW
16
2500
330.0
12.4
6.95
5.6
1.6
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Nov-2015
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM2651MTCX-3.3/NOPB
TSSOP
PW
16
2500
367.0
367.0
35.0
LM2651MTCX-ADJ/NOPB
TSSOP
PW
16
2500
367.0
367.0
35.0
Pack Materials-Page 2
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