Murata ACAN-60 54mm 1u front end dc-dc power supply converter Datasheet

D1U54-D-650-12-HBxC Series
54mm 1U Front End DC-DC Power Supply Converter
PRODUCT OVERVIEW
The D1U54-D-650-12-HBxC products are very high efficiency DC input 650 watt front end supplies provided with a
12V main and a 12V Standby output. An active (analogue) current share characteristic is provided to allow units to be
operated in parallel. The power supply may be hot plugged; recovers from overtemperature faults, and has status
LEDs on the front panel in addition to hardware signal logic and PMBus™ status signals. The low profile 1U package
and 21.4W/cubic inch power density make them ideal for delivering reliable, efficient power to networking
equipment, workstations, storage systems and other 12V distributed power architectures.
ORDERING GUIDE
Part Number
FEATURES
 650W output power
 93% efficiency at 50% load
 12V main output
 12V standby output
 1U height:
 2.15" x 9.00" x 1.57"
 54.5mm x 228.6mm x 40mm
 21.4 Watts per cubic inch density
 N+1 redundancy capable, including hot plugging
 Active (analogue) current sharing on 12V main
Murata Internal Power Output
Part Number -44 to -72Vdc
D1U54-D-650-12-HB3C
M1879
D1U54-D-650-12-HB4C
M1878
INPUT CHARACTERISTICS
Parameter
Input Source Voltage Operating Range
Turn-on Input Voltage
Turn-off Input Voltage
Input current at Vin = -53Vdc
Inrush Current
Main
Output
Standby
Output
12Vdc
12Vdc
Airflow
Front to Back
650W
Conditions
Min.
-44
-42.5
-37.5
Ramp up
Ramp down
650W
Cold start (25°C) between 0 to 200ms
Back to front
Nom.
-53
-43
-38
13.6
Max.
-72
-43.5
-39.5
Vdc
Adc
25
20% load
Efficiency (-53Vdc) excluding fan load 50% load
100% load
Units
Vdc
90
93
92
Apk
%
output; ORING FET
 Overvoltage, Overcurrent, Overtemperature
protection
 Internal cooling fan (variable speed)
 PMBus™/I2C interface with status indicators
 RoHS compliant
 Two Year Warranty
OUTPUT VOLTAGE CHARACTERISTICS
Nominal
Output
Parameter
Voltage
Output Set Point Accuracy
Line and Load Regulation
12V
www.murataps.com/en/3d/acdc.html
www.murata-ps.com/en/3d/acdc.html
www.murata-ps.com/en/3d/acdc.html
www.murata-ps.com/en/3d/acdc.html
www.murata-ps.com/en/3d/acdc.html
Available now at: www.murata-ps.com/en/3d/acdc.html
Ripple Voltage & Noise1, 2
Output Current Range
Load Capacitance
Output Set Point Accuracy
Line and Load Regulation
12VSB
1
2
Ripple Voltage & Noise1
Output Current
Conditions
50% load; Tamb =25°C
Setpoint; temperature;
line and load
20MHz Bandwidth
50% load; Tamb = 25°C
Setpoint; temperature;
line and load
20MHz Bandwidth
Min.
Typ.
Max.
11.96
-1.0%
12.00
12.04
+1.0
%
120
54.2
4000
12.04
12.3
0
500
11.96
11.7
0
12.00
120
2
Units
Vdc
%
mV p-p
A
μF
Vdc
mV p-p
A
Ripple and noise is measured with a parallel combination 0.1μF of ceramic and 10μF of tantalum capacitance on each
measurement node.
Measurements assume the use of the minimum load capacitance as specified for the main 12V output and a minimum load of 5%.
Below 5% loading the overall voltage deviation shall be within ±2.5%.
CB
For full details go to
www.murata-ps.com/rohs
Test Certificate
and Test Report
www.murata-ps.com/support
D1U54-D-650-12-HBxC.A02 Page 1 of 9
D1U54-D-650-12-HBxC Series
54mm 1U Front End DC-DC Power Supply Converter
OUTPUT CHARACTERISTICS
Parameter
Conditions
Startup Time
Min.
Typ.
DC ramp up
Main 12V, 50% load step, 1A/μs di/dt
12VSB, 50% load step, 1A/μs di/dt
Transient Response
Current sharing accuracy
>10% load; *of maximum output current
capability
Hot Swap Transients
Holdup Time (Total Effective Hold Up - See Timing Waveforms)
All outputs remain in regulation
Full DC Input Source Range; 100% load
ENVIRONMENTAL CHARACTERISTICS
Parameter
Storage Temperature Range
Operating Temperature Range
Operating Humidity
Storage Humidity
Altitude (without derating at 40°C)
Shock
2
Conditions
Min.
-40
-5
5
5
Noncondensing; +45°C
Typ.
Max.
3
Units
s
±5
500
%
μs
±5*
%
±
54
%
ms
Max.
70
50
90
95
3000
Units
30G non-operating
Sine sweep; 5-200Hz, 2G;
random vibration, 5-500Hz, 1.11G
Per Telcordia SR-332 Issue 3 M1C3 @40°C
619K
CAN/CSA C22.2 No 60950-1-07, Am.1:2011
UL 60950-1-2011, 2nd Ed.
IEC60950-1:2005 (2nd Ed.) w A1:2009
EN 60950-1:2006+A11+A1+A12+A2
CCC GB4943.1-2011; GB9254-1-2008; GB17625, 1-2012
Power Supply has an internal 25A/100Vdc fast blow fuse in the DC input negative line.
1.74 lbs (0.789 kg)
Operational Vibration
MTBF(Target)
Safety Approvals
Input Fuse
Weight
°C
%
m
hrs
AIRFLOW; PRESSURE VS. FLOW (PQ) CURVES
D1U54-D-650-12-HB3C & D1U54-D-650-12-HB4C
D1U54-D-650-12-HBxC P & Q CURVE
250
Back Pressure (Pa)
200
150
Airflow Front to Back
Airflow Back to Front
100
50
0
0
2
4
PSU airflow (CFM)
6
8
Notes:
1. The above curves represent performance based upon a the use of a 20mm thickness fan.
2. Curves recorded at room ambient (circa 25°C).
3. Curves generated with intermal fan running at 100% duty cycle
www.murata-ps.com/support
D1U54-D-650-12-HBxC.A02 Page 2 of 9
D1U54-D-650-12-HBxC Series
54mm 1U Front End DC-DC Power Supply Converter
PROTECTION CHARACTERISTICS
Output
12V
Parameter
Conditions
Overtemperature
Overvoltage
Autorestart with 4°C hysteresis for recovery (warning issued at 70°C)
Latching
13
The output shall shutdown when an overcurrent condition is detected.
It will auto restart after 1sec; however if the overcurrent condition is redetected the output will once again
shutdown.
The output will once again re-start, however if the overcurrent condition persists it will latch of after the fifth 60
unsuccessful attempt.
To reset the latch it will be necessary to toggle the PS_ON_L signal (B4) or recycle the incoming DC source.
Latching
13.0
Overcurrent (Target)
Overvoltage
12VSB
Overcurrent
Min.
The output shall shutdown when an overcurrent is detected.
It will auto restart after 2sec; however if the overcurrent is re-detected the output will once again shutdown.
This cycle will occur indefinitely while the overcurrent condition persists.
ISOLATION CHARACTERISTICS
Parameter
Conditions
Input to Output
Input to Chassis
Output to Chassis
Insulation Safety Rating
Isolation
EMISSIONS AND IMMUNITY
Conducted Emissions
ESD Immunity
Radiated Field Immunity
Electrical Fast Transients/Burst Immunity
FCC 47 CFR Part 15/CISPR 22/EN55022
IEC/EN 61000-4-2
IEC/EN 61000-4-3
IEC/EN 61000-4-4
Surge Immunity
IEC/EN 61000-4-5
RF Conducted Immunity
Magnetic Field Immunity
Voltage Dips, Interruptions
IEC/EN 61000-4-6
IEC/EN 61000-4-8
----
Min.
1000
1000
500
Typ.
Typ.
Max. Units
75
°C
14.5
°C
70
A
14.5
V
2.2
2.8
A
Max.
Units
Vdc
Vdc
Vdc
Class A with 6dB margin
Level 4 criteria A
Level 3 criteria B
Level 3 criteria B
±1kV common mode and differential mode, unit passes criteria A (normal
performance)*
Level 3 criteria A
3 A/m criteria B
-53Vin, 80% load, Dip 100% Duration 4ms,Criteria (A)
* Impedance is 2 ohms for differential and common mode.
STATUS INDICATORS
LED NAME
Input
Input
LED MODE
OK
OV/UV WARNING
LED STATE/OPERATION
Solid Green
Blinking Green
Input
OFF OR FAULT
Off
Output
POWER GOOD
Solid Green
Output
Output
Output
STANDBY
WARNING
FAULT
Blinking Green
Blinking Amber
Solid Amber
DESCRIPTION
Input voltage operating within normal specified range
Input voltage operating in:
1) overvoltage warning, or
2) undervoltage warning range
Input voltage operating:
1) above overvoltage range, or
2) below undervoltage range, or
3) not present
Main output and standby output enabled with no power supply warning or fault
detected
Standby output enabled with no power supply warning or fault detected
Power supply warning detected as per PMBus STATUS_X reporting bytes
Power supply fault detected as per PMBus STATUS_X reporting bytes

LED fault/warning operation follows PMBus fault/warning reporting status flags and will thus also be 'sticky' (i.e. even if actual fault/warning is cleared, LED will still be in FAULT or WARNING mode until PMBus status flags
are cleared with the CLEAR_FAULTS command
www.murata-ps.com/support
D1U54-D-650-12-HBxC.A02 Page 3 of 9
D1U54-D-650-12-HBxC Series
54mm 1U Front End DC-DC Power Supply Converter
STATUS AND CONTROL SIGNALS
Signal Name
I/O
INPUT_OK (DC Source)
Output
PW_OK (Output OK)
Output
SMB_ALERT
(FAULT/WARNING)
Output
Description
Interface Details
The signal output is driven high when the input source is available and within acceptable limits.
The output is driven low to indicate loss of input power.
There is a minimum of 5ms pre-warning time before signal changes to a high impedance state or
is driven low to indicate loss of 12V. The power supply must ensure that this interface signal
provides accurate status when DC power is lost.
The signal is asserted, driven high, by the power supply to indicate that all outputs are valid. If any
of the outputs fail then this output will be hi-Z or driven low. The output is driven low to indicate
that the Main output is outside of lower limit of regulation.
Pulled up internally via 10K to 3.3Vdc.
A logic high >2.0Vdc; A logic low <0.8Vdc
Driven low by internal CMOS buffer (open
drain output).
The signal output is driven low to indicate that the power supply has detected a warning or fault
and is intended to alert the system. This output must be driven high when the power is operating
correctly (within specified limits).
The signal will revert to a high level when the warning/fault stimulus (that caused the alert) is
removed.
PRESENT_L
Output The signal is used to detect the presence (installed) of a PSU by the host system. The signal is
(Power Supply Absent)
connected to PSU logic SGND within the power module.
PS_ON
Input This signal is pulled up internally to the internal housekeeping supply (within the power supply).
(Power Supply
The power supply main 12Vdc output will be enabled when this signal is pulled low to
Enable/Disable
+VSB_Return.
In the low state the signal input shall not source more than 1mA of current. The 12Vdc output will
be disabled when the input is driven higher than 2.4V, or open circuited. Cycling this signal shall
clear latched fault conditions.
PS_KILL
Input This signal is used during hot swap to disable the main output during hot swap extraction. The
input is pulled up internally to the internal housekeeping supply (within the power supply).
The signal is provided on a short (lagging pin) and should be connected to +VSB_Return.
ADDR (Address Select)
Input An analogue input that is used to set the address of the internal slave devices (EEPROM and
microprocessor) used for digital communications.
Connection of a suitable resistor to +VSB_Return, in conjunction with an internal resistor divider
chain, will configure the required address (see ADDR Address Selection table).
SCL (Serial Clock)
Both
A serial clock line compatible with PMBusTM Power Systems Management Protocol Part 1 – General
Requirements Rev 1.1.
No additional internal capacitance is added that would affect the speed of the bus.
The signal is provided with a series isolator device to disconnect the internal power supply bus in
the event that the power module is completely unpowered,
SDA (Serial Data)
Both
A serial data line compatible with PMBusTM Power Systems Management Protocol Part 1 – General
Requirements Rev 1.1.
The signal is provided with a series isolator device to disconnect the internal power supply bus in
the event that the power module is completely unpowered,
V1_SENSE
Input Remote sense connections intended to be connected at and sense the voltage at the point of load.
V1SENSE_RTN
The voltage sense will interact with the internal module regulation loop to compensate for voltage
drops due to connection resistance between the output connector and the load.
If remote sense compensation is not required then the voltage shall be configured for local sense
by:
1. V1_SENSE directly connected to power blades 6 to 10 (inclusive)
2. V1_SENSE_RTN directly connected to power blades 1 to 5 (inclusive)
ISHARE
BiThe current sharing signal is connected between sharing units (forming an ISHARE bus). It is an
Directional input and/or an output (bi-directional analogue bus) as the voltage on the line controls the
Analogue current share between sharing units. A power supply will respond to a change in this voltage
Bus
but a power supply can also change the voltage depending on the load drawn from it. On a
single unit the voltage on the pin (and the common ISHARE bus would read 8VDC at 100% load
(module capability). For two identical units sharing the same 100% load this would read 4VDC
for perfect current sharing (i.e. 50% module load capability per unit).
Pulled up internally via 10K to 3.3Vdc.
A logic high >2.0Vdc; A logic low <0.8Vdc
Driven low by internal CMOS buffer (open
drain output).
Pulled up internally via 10K to 3.3Vdc.
A logic high >2.0Vdc;A logic low <0.8Vdc
Driven low by internal CMOS buffer (open
drain output).
Passive connection to +VSB_Return.
A logic low <0.8Vdc
Pulled up internally via 10K to 3.3Vdc.
A logic high >2.0Vdc
A logic low <0.8Vdc
Input is via CMOS Schmitt trigger buffer.
Pulled up internally via 10K to 3.3Vdc.
A logic high >2.0Vdc; A logic low <0.8Vdc
Input is via CMOS Schmitt trigger buffer.
DC voltage between the limits of 0 and
+3.3Vdc.
VIL is 0.8V maximum
VOL is 0.4V maximum when sinking 3mA
VIH is 2.1V minimum
VIL is 0.8V maximum
VOL is 0.4V maximum when sinking 3mA
VIH is 2.1V minimum
Compensation for up to 0.12Vdc total
connection drop (output and return
connections).
Analogue voltage:
+8V maximum; 10K to +12V_RTN
www.murata-ps.com/support
D1U54-D-650-12-HBxC.A02 Page 4 of 9
D1U54-D-650-12-HBxC Series
54mm 1U Front End DC-DC Power Supply Converter
TIMING SPECIFICATIONS
Turn-On Delay & Output Rise Time:
Power-on-delay, Risetime, and signaling
V1 PS_ON delay
DC input
DC input
Vsb
Vsb
Vsb Risetime
V1
Vsb Power-on-delay
V1
V1 Risetime
V1 Power-on-delay
V1 PS_ON delay
PS_ON
PS_ON
Input_OK delay
Input_OK
Input_OK
PWOK delay
PWOK
PWOK
1. The turn-on delay after application of AC input within the operating range shall as defined in the following tables.
2. The output rise times shall be measured from 10% of the nominal output to the lower limit of the regulation band as defined in the following tables.
Time
Vsb Rise time
V1 Rise time
Vsb Power-on-delay
V1 Power-on-delay
V1 PS_ON delay
V1 PWOK delay
DCOK (Input) detect
Min
70ms
120ms
300ms
500ms
100ms
300ms
500ms
Max
170ms
220ms
700ms
1500ms
300ms
450ms
1000ms
TIMING SPECIFICATIONS
Turn-Off (Shutdown by PS_ON)
Turn-Off Timing
V1 Fall time
V1 PS_OFF delay
PW_OK delay off
Vsb
V1
V1 PS_OFF delay
Min
0ms
2.0ms
Max
6ms
Notes
Must be monotonic
V1 Falltime
PS_ O N
I n pu t_ O K
PW_OK delayoff
PWO K
1. Note this characteristic is applicable for the main 12Vdc output shutdown from PS_ON pulled high.
www.murata-ps.com/support
D1U54-D-650-12-HBxC.A02 Page 5 of 9
D1U54-D-650-12-HBxC Series
54mm 1U Front End DC-DC Power Supply Converter
TIMING SPECIFICATIONS
Power Removal Holdup
Power Removal Timing
Vsb holdup
V1 holdup (Total Effective)
DC (Input) fail detect
PWOK delay off
PWOK Hold Up
Min
20ms
4ms
400μs
2.0ms
2.0ms
Max
50ms
1000μs
4.0ms
Notes
+VSB Full Load
100% load
100% load
OUTPUT CONNECTOR & SIGNAL INTERFACE; FCI PN 10122460-005LF
NB: Reference to “3” in Column 5, refers to the shortest level signal pin; the “shortest” pins are the “last to make, first to break” in the mating sequence.
www.murata-ps.com/support
D1U54-D-650-12-HBxC.A02 Page 6 of 9
D1U54-D-650-12-HBxC Series
54mm 1U Front End DC-DC Power Supply Converter
OUTPUT CONNECTOR PIN ASSIGNMENTS - D1U54P-W-650-12-HBxC
(Power Supply) FCI PN 10122460-005LF
Pin
Signal Name
Comments
6, 7, 8, 9, 10
V1 (+12VOUT)
+12V Main Output
1, 2, 3, 4, 5
+12V RTN/PGND
+12V Main Output Return
A1
+VSB
Standby Output
B1
+VSB
Standby Output
C1
+VSB
Standby Output
D1
+VSB
Standby Output
E1
+VSB
Standby Output
A2
+VSB_Return
Standby Output Return
B2
+VSB_Return
Standby Output Return
C2
Unused
No End User Connection
D2
Unused
No End User Connection
E2
Unused
No End User Connection
A3
APS
I2C Address Protocol Selection; (Select address by appropriate pull down resistor – See table below)
B3
Unused
No End User Connection
C3
SDA
I2C Serial Data Line
D3
V1_SENSE_R
-VE Remote Sense Return
E3
V1_SENSE
+VE Remote Sense
A4
SCL
I2C Serial Clock Line
B4
PS_ON_L
Remote On/Off (Enable/Disable)
C4
SMB_ALERT
Alert signal to host system
D4
Unused
No End User Connection
E4
INPUT_OK
DC Input Source Present & “OK”
A5
PS_KILL
Power Supply “kill”; short pin
B5
ISHARE
Active Current Share Bus
C5
PW_OK
Power “OK”; short pin
D5
Unused
No End User Connection
E5
PRESENT_L
Power Module Present; short pin
WIRIN
MATING CONNECTOR
Part Number
Description
TE Connectivity 2-1926739-5
Right Angle
FCI 10108888-R10253SLF
Right Angle
APS ADDRESS SELECTION
APS pin (A3) resistor to
GND (K-ohm)*
0.82
2.7
5.6
8.2
15
27
56
180
Power Supply Main Controller
(Serial Communications Slave Address)
0xB0
0xB2
0xB4
0xB6
0xB8
0xBA
0xBC
0xBE
Power Supply External EEPROM
(Serial Communications Slave Address)
0xA0
0xA2
0xA4
0xA6
0xA8
0xAA
0xAC
0xAE
* The resistor shall be +/-5% tolerance
www.murata-ps.com/support
D1U54-D-650-12-HBxC.A02 Page 7 of 9
D1U54-D-650-12-HBxC Series
54mm 1U Front End DC-DC Power Supply Converter
WIRING DIAGRAM FOR OUTPUT
WIRING DIAGRAM FOR OUTPUT
CURRENT SHARE NOTES
1. Main Output: Current sharing is achieved using the active (analogue) current share method.
2. Current sharing can be achieved with or without the remote (V_SENSE and V_SENSE_R) connected to the common load.
3. +VSB Outputs can be tied together for redundancy but total combined output power must not exceed the rated standby power. The +VSB output has an internal ORING
MOSFET for additional redundancy/internal short protection.
4. The current sharing pin B5 is connected between sharing units (forming an ISHARE bus). It is an input and/or an output (bi-directional analogue bus) as the voltage on the
line controls the current share between sharing units. A power supply will respond to a change in this voltage but a power supply can also change the voltage depending
on the load drawn from it. On a single unit the voltage on the pin (and the common ISHARE bus would read 8VDC at 100% (power module load capability). For two units
sharing the same 100% load this would read 4VDC for perfect current sharing (i.e. 50% power module load capability per unit).
The load for both the main 12V and the VSB rails at initial startup shall not be allowed to exceed the capability of a single unit. The load can be increased after a delay of
3sec (minimum), to allow all sharing units to achieve steady state regulation.
www.murata-ps.com/support
D1U54-D-650-12-HBxC.A02 Page 8 of 9
D1U54-D-650-12-HBxC Series
54mm 1U Front End DC-DC Power Supply Converter
MECHANICAL DIMENSIONS
1.
2.
3.
4.
DC input connector: Dinkle Terminal Block, Dinkle Enterprise: Part No. DT-7C-B14W-02
Dimensions: 2.15" x 9.00" x 1.57" [54.5mm x 228.6mm x 40.0mm]
This drawing is a graphical representation of the product and may not show all fine details.
Reference File: D1U54-D-650-12-HBxC (M1878-M1879)_Drawing for Product Datasheet_20151216.pdf
OPTIONAL ACCESSORIES
Description
Part Number
12V D1U54P Output Connector Card
D1U54P-12-CONC
APPLICATION NOTES
Document Number
Description
Link
ACAN-64
D1U54P Output Connector Card
http://power.murata.com/datasheet?/data/apnotes/acan-64.pdf
ACAN-60
D1U54-x Communication Protocol
http://power.murata.com/datasheet?/data/apnotes/acan-60.pdf
Murata Power Solutions, Inc.
11 Cabot Boulevard, Mansfield, MA 02048 -1151 U.S.A.
ISO 9001 and 14001 REGISTERED
This product is subject to the following operating requirements and the Life
and Safety Critical Application Sales Policy:
Refer to: http://www.murata-ps.com/requirements/
Murata Power Solutions, Inc. makes no representation that the use of its products in the circuits described herein, or the use of other technical information
contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make,
use, or sell equipment constructed in accordance therewith. Specifications are subject to change without notice. © 2016 Murata Power Solutions, Inc.
www.murata-ps.com/support
D1U54-D-650-12-HBxC.A02 Page 9 of 9
Similar pages