LMV551, LMV552 www.ti.com SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 LMV551/LMV552/LMV554 3 MHz, Micropower RRO Amplifiers Check for Samples: LMV551, LMV552 FEATURES DESCRIPTION • • • • • • • • The LMV551/LMV552/LMV554 are high performance, low power operational amplifiers implemented with TI’s advanced VIP50 process. They feature 3 MHz of bandwidth while consuming only 37 μA of current per amplifier, which is an exceptional bandwidth to power ratio in this op amp class. These amplifiers are unity gain stable and provide an excellent solution for low power applications requiring a wide bandwidth. 1 2 • • (Typical 5V Supply, Unless Otherwise Noted.) Guaranteed 3V and 5.0V Performance High Unity Gain Bandwidth 3 MHz Supply Current (Per Amplifier) 37 µA CMRR 93 dB PSRR 90 dB Slew Rate 1 V/µs Output Swing with 100 kΩ Load 70 mV From Rail Total Harmonic Distortion 0.003% @ 1 kHz, 2 kΩ Temperature Range −40°C to 125°C APPLICATIONS • • • • • Active Filter Portable Equipment Automotive Battery Powered Systems Sensors and Instrumentation The LMV551/LMV552/LMV554 have a rail-to-rail output stage and an input common mode range that extends below ground. The LMV551/LMV552/LMV554 have an operating supply voltage range from 2.7V to 5.5V. These amplifiers can operate over a wide temperature range (−40°C to 125°C) making them a great choice for automotive applications, sensor applications as well as portable instrumentation applications. The LMV551 is offered in the ultra tiny 5-Pin SC70 and 5Pin SOT-23 package. The LMV552 is offered in an 8Pin VSSOP package. The LMV554 is offered in the 14-Pin TSSOP. Typical Application 120 120 100 R2 100 k: + VIN - RB1 V + + - + RB2 PHASE VOUT 100 80 80 GAIN (dB) CC1 R1 1 k: 60 60 GAIN 40 40 20 20 PHASE (°) CF 0 0 -20 -20 VS = 5V -40 100 1k 10k 100k 1M -40 10M FREQUENCY (Hz) Figure . Figure 1. Open Loop Gain and Phase vs. Frequency These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2013, Texas Instruments Incorporated LMV551, LMV552 SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 Absolute Maximum Ratings ESD Tolerance www.ti.com (1) (2) (3) Human Body Model LMV551/LMV552/LMV554 2 KV Machine Model LMV551 100V LMV552/LMV554 250V VIN Differential (@ V+ = 5V) ±2.5V Supply Voltage (V+ - V−) 6V V+ +0.3V, V− −0.3V Voltage at Input/Output pins −65°C to 150°C Storage Temperature Range Junction Temperature (4) 150°C Soldering Information Infrared or Convection (20 sec) 235°C Wave Soldering Lead Temp. (10 sec) 260°C (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office / Distributors for availability and specifications. Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC) Field-Induced Charge-Device Model, applicable std. JESD22-C101-C (ESD FICDM std. of JEDEC). The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC board. (2) (3) (4) Operating Ratings Temperature Range (1) (2) −40°C to 125°C Supply Voltage (V – V−) + 2.7V to 5.5V Package Thermal Resistance (θJA (2)) 5-Pin SC70 456°C/W 5-Pin SOT-23 234°C/W 8-Pin VSSOP 235°C/W 14-Pin TSSOP 160°C/W (1) (2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables. The maximum power dissipation is a function of TJ(MAX), θJA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(MAX) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC board. 3V Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 3V, V− = 0V, VCM = V+/2 = VO. Boldface limits apply at the temperature extremes. (1) Symbol Parameter VOS Input Offset Voltage TC VOS Input Offset Average Drift (1) (2) (3) 2 Conditions Min (2) Typ Max Units 1 3 4.5 mV (3) 3.3 (2) μV/°C Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using statistical quality control (SQC) method. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 LMV551, LMV552 www.ti.com SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 3V Electrical Characteristics (continued) Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 3V, V− = 0V, VCM = V+/2 = VO. Boldface limits apply at the temperature extremes. (1) Symbol Parameter Conditions Input Bias Current IOS Input Offset Current CMRR Common Mode Rejection Ratio 0V ≤ VCM 2.0V PSRR Power Supply Rejection Ratio 3.0 ≤ V+ ≤ 5V, VCM = 0.5V 2.7 ≤ V+ ≤ 5.5V, VCM = 0.5V CMVR Input Common-Mode Voltage Range CMRR ≥ 68 dB CMRR ≥ 60 dB AVOL Large Signal Voltage Gain 0.4 ≤ VO ≤ 2.6, RL = 100 kΩ to V+/2 LMV551/LMV552 80 78 LMV554 78 76 LMV551/LMV552 80 78 LMV554 78 76 Output Swing Low ISC Output Short Circuit Current nA 20 nA 92 92 dB 92 0 0 LMV551/LMV552 81 78 LMV554 79 77 dB 2.1 2.1 dB 71 68 80 100 120 RL = 100 kΩ to V+/2 50 65 77 RL = 10 kΩ to V+/2 95 110 130 Sourcing V 90 85 (5) mV from rail 10 (5) mA 25 Slew Rate AV = +1, 10% to 90% Φm Phase Margin RL = 10 kΩ, CL = 20 pF GBW Gain Bandwidth Product en Input-Referred Voltage Noise (4) (5) (6) 38 1 RL = 10 kΩ to V+/2 SR Total Harmonic Distortion 20 48 58 Supply Current per Amplifier THD Units (2) 40 IS Input-Referred Current Noise Max RL = 100 kΩ to V+/2 Sinking in Typ (3) 74 72 0.4 ≤ VO ≤ 2.6, RL = 10 kΩ to V+/2 Output Swing High (2) (4) IB VO Min 34 1 (6) 42 52 μA V/μs 75 Deg 3 MHz f = 100 kHz 70 f = 1 kHz 70 f = 100 kHz 0.1 f = 1 kHz 0.15 f = 1 kHz, AV = 2, RL = 2 kΩ 0.003 nV/ pA/ % Positive current corresponds to current flowing into the device. The part is not short circuit protected and is not recommended for operation with heavy resistive loads. Slew rate is the average of the rising and falling slew rates. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 3 LMV551, LMV552 SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 www.ti.com 5V Electrical Characteristics Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5V, V− = 0V, VCM = V+/2 = VO. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (1) Typ Max Units 1 3.0 4.5 mV (2) VOS Input Offset Voltage TC VOS Input Offset Average Drift IB Input Bias Current IOS Input Offset Current CMRR Common Mode Rejection Ratio 0 ≤ VCM ≤ 4.0V 76 74 93 PSRR Power Supply Rejection Ratio 3V ≤ V+ ≤ 5V to VCM = 0.5V 78 75 90 2.7V ≤ V+ ≤ 5.5V to VCM = 0.5V 78 75 90 CMRR ≥ 68 dB CMRR ≥ 60 dB 0 0 CMVR AVOL VO Input Common-Mode Voltage Range Large Signal Voltage Gain Output Swing High Output Swing Low ISC Output Short Circuit Current (1) μV/°C 3.3 (3) + 20 38 nA 1 20 nA dB dB 4.1 4.1 0.4 ≤ VO ≤ 4.6, RL = 100 kΩ to V /2 78 75 90 0.4 ≤ VO ≤ 4.6, RL = 10 kΩ to V+/2 75 72 80 dB RL = 100 kΩ to V+/2 70 92 122 RL = 10 kΩ to V+/2 125 155 210 RL = 100 kΩ to V+/2 60 70 82 RL = 10 kΩ to V+/2 110 130 155 Sourcing Sinking (4) (4) 10 mV from rail mA 25 IS Supply Current Per Amplifier SR Slew Rate AV = +1, VO = 1 VPP 10% to 90% (5) 1 Φm Phase Margin RL = 10 kΩ, CL = 20 pF 75 Deg GBW Gain Bandwidth Product 3 MHz en Input-Referred Voltage Noise in Input-Referred Current Noise THD (1) (2) (3) (4) (5) 4 Total Harmonic Distortion 37 V f = 100 kHz 70 f = 1 kHz 70 f = 100 kHz 0.1 f = 1 kHz 0.15 f = 1 kHz, AV = 2, RL = 2 kΩ 0.003 46 54 μA V/μs nV/ pA/ % Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlations using statistical quality control (SQC) method. Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production material. Positive current corresponds to current flowing into the device. The part is not short circuit protected and is not recommended for operation with heavy resistive loads. Slew rate is the average of the rising and falling slew rates. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 LMV551, LMV552 www.ti.com SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 CONNECTION DIAGRAM 1 8 + V A -IN A 2 - OUT A 7 OUT B +IN A 3 6 B + V Figure 2. 5-Pin SC70/ SOT-23 Top View - 4 2 + 3 12 + 4 11 + 5 10 - 6 9 IN A V -IN B IN B IN B - A - + - + B 5 +IN B Figure 3. 8-Pin VSSOP Top View 13 - IN A + 14 1 OUT B 7 D + - OUT A + - Product Folder Links: LMV551 LMV552 IN D - IN D + - V IN C IN C + - C 8 OUT C Figure 4. 14-Pin TSSOP Top View Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated OUT D 5 LMV551, LMV552 SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 www.ti.com TYPICAL CHARACTERISTICS Open Loop Gain and Phase with Capacitive Load Open Loop Gain and Phase with Resistive Load 158 140 120 RL = 100 k: 135 120 135 100 113 100 113 90 80 20 pF 50 pF 60 68 100 pF 45 PHASE 23 20 20 pF 100 pF 50 pF 0 -20 100 10k 1k 100k 1M 90 68 60 GAIN 45 40 23 20 VS = +3V RL = 100 k: 0 CL = 20 pF -20 10k 100 1k 0 -23 10M 0 100k Figure 5. Figure 6. Open Loop Gain and Phase with Resistive Load Open Loop Gain and Phase with Resistive Load 140 158 140 158 120 135 120 135 100 113 100 90 80 113 60 GAIN 68 40 45 20 VS = 3V 0 RL = 10 k: 0 CL = 20 pF -20 100 1k 23 10k 100k 1M GAIN (dB) 80 PHASE (°) PHASE 60 PHASE 68 45 40 20 23 VS = 5V 0 RL = 100 k: CL = 20 pF -20 100 1k -23 10M 0 10k 100k 1M Figure 8. Open Loop Gain and Phase with Resistive Load Slew Rate vs. Supply voltage 158 1.1 120 135 1.0 100 113 90 60 68 0 GAIN 45 VS = 5V 23 RL = 10 k: 0 PHASE (°) PHASE 80 SLEW RATE (V/Ps) 140 20 -23 10M FREQUENCY (Hz) Figure 7. 40 90 GAIN FREQUENCY (Hz) GAIN (dB) -23 10M FREQUENCY (Hz) FREQUENCY (Hz) GAIN (dB) 1M PHASE (°) GAIN 40 158 PHASE (°) PHASE 80 GAIN (dB) VS = +5V PHASE (°) GAIN (dB) 140 RISING EDGE 0.9 0.8 0.7 FALLING EDGE 0.6 0.5 CL = 20 pF -20 100 1k 10k 100k 1M -23 10M 0.4 Figure 9. 6 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 VS (V) FREQUENCY (Hz) Figure 10. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 LMV551, LMV552 www.ti.com SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 TYPICAL CHARACTERISTICS (continued) Small Signal Transient Response Large Signal Transient Response 0.015 1.5 0.01 1 0.5 VOUT (V) VOUT (V) 0.005 VS = 5V 0 CL = 50 pF VIN = 20 mVPP, 20 kHz VS = 5V 0 -0.005 -0.5 -0.01 -1 -0.015 CL = 15 pF, AV = +1 VIN = 2 VPP, 20 kHz -1.5 0 20 40 60 80 100 0 20 40 TIME (Ps) 80 Figure 11. Figure 12. Small Signal Transient Response Input Referred Noise vs. Frequency 0.015 100 1000 INPUT REFERRED NOISE 0.01 0.005 VOUT (V) 60 TIME (Ps) 0 VS = 5V CL = 15 pF -0.005 VIN = 20 mVPP, 20 kHz -0.01 VOLTAGE nV/ Hz 100 10 1 0.1 CURRENT pA/ Hz 0 -0.015 0 20 40 60 80 0.1 1 10 TIME (Ps) 100 1k 10k FREQUENCY (Hz) Figure 13. Figure 14. THD+N vs. Amplitude @ 3V THD+N vs. Amplitude @ 5V 1.00 1.00 THD+N (%) 0.10 THD+N (%) 0.10 RL = 10 k: 0.01 RL = 10 k: 0.01 VS = 3V VS = 5V AV = +2 RL = 100 k: VIN = 1 kHz SINE WAVE 0.00 0.01 0.1 1 10 AV = +2 VIN = 1 kHz SINE WAVE 0.00 0.01 0.1 VOUT (VPP) RL = 100 k: 1 10 VOUT (VPP) Figure 15. Figure 16. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 7 LMV551, LMV552 SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) THD+N vs. Amplitude THD+N vs. Amplitude 1 1 VS = 3V VS = 5V AV = +2 AV = +2 VOUT = 1 VPP VOUT = 2 VPP THD+N (%) 0.1 THD+N (%) 0.1 RL = 10 k: 0.01 RL = 10 k: 0.01 RL = 100 k: RL = 100 k: 0.001 0.001 10 100 1k 10k 100k 10 100 FREQUENCY (Hz) 1k 10k 100k FREQUENCY (Hz) Figure 17. Figure 18. Supply Current vs. Supply Voltage VOS vs. VCM 2 50 VS = 3V PER CHANNEL 1.5 45 125°C 1 25°C VOS (mV) IS (PA) 40 35 -40°C 0.5 0 -40qC 25qC -0.5 30 -1 25 -1.5 125qC 20 2.7 3.4 4.1 4.8 -2 0 5.5 0.5 1 2 1.5 1 1 0.5 0.5 VOS (mV) VOS (mV) 5.5 VOS vs. Supply Voltage 0 -40qC 25qC -0.5 0 -1 -1 -1.5 -1.5 2 25qC -40qC -0.5 125qC 125qC 3 4 5 -2 2.7 VCM (V) 3.4 4.1 VS (V) Figure 21. 8 4.8 VOS vs. VCM VS = 5V 1 2.5 Figure 20. 2 0 2 Figure 19. 1.5 -2 1.5 VCM (V) VS (V) Figure 22. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 LMV551, LMV552 www.ti.com SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 TYPICAL CHARACTERISTICS (continued) IBIAS vs. VCM 26 26 24 24 IBIAS vs. VCM 125°C 22 25°C 25°C 125°C 20 IBIAS (nA) IBIAS (nA) 22 18 16 20 18 16 -40°C -40°C 14 14 12 12 VS = 5V VS = 3V 10 0 0.5 1 1.5 2 10 2.5 0 1 2 3 4 5 VCM (V) VCM (V) Figure 23. Figure 24. IBIAS vs. Supply Voltage Positive Output Swing vs. Supply Voltage 180 26 125°C 160 24 VOUT FROM RAIL (mV) 125°C 22 IBIAS (nA) 25°C 20 18 16 -40° C 14 140 25°C 120 100 80 -40°C 60 40 12 RL = 10 k: 10 2.5 3 3.5 4 4.5 20 5.5 5 3 3.5 4 Figure 26. Negative Output Swing vs. Supply Voltage Positive Output Swing vs. Supply Voltage 100 90 90 80 VOUT FROM RAIL (mV) VOUT FROM RAIL (mV) Figure 25. 100 125°C 70 25°C 60 50 40 80 20 25°C 60 50 40 3.5 -40°C 30 RL = 100 k: 3 5 125°C 70 -40°C 30 4.5 VS (V) VS (V) RL = 100 k: 4 4.5 5 20 3 3.5 4 4.5 5 VS (V) VS (V) Figure 27. Figure 28. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 9 LMV551, LMV552 SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) Negative Output Swing vs. Supply Voltage 180 VOUT FROM RAIL (mV) 160 125°C 140 25°C 120 100 80 -40°C 60 40 RL = 10 k: 20 3 3.5 4 4.5 5 VS (V) Figure 29. 10 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 LMV551, LMV552 www.ti.com SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 APPLICATIONS INFORMATION ADVANTAGES OF THE LMV551/LMV552/LMV554 Low Voltage and Low Power Operation The LMV551/LMV552/LMV554 have performance guaranteed at supply voltages of 3V and 5V and are guaranteed to be operational at all supply voltages between 2.7V and 5.5V. For this supply voltage range, the LMV551/LMV552/LMV554 draw the extremely low supply current of less than 37 μA per amp. Wide Bandwidth The bandwidth to power ratio of 3 MHz to 37 μA per amplifier is one of the best bandwidth to power ratios ever achieved. This makes these devices ideal for low power signal processing applications such as portable media players and instrumentation. Low Input Referred Noise The LMV551/LMV552/LMV554 provide a flatband input referred voltage noise density of 70 nV/ , which is significantly better than the noise performance expected from an ultra low power op amp. They also feature the exceptionally low 1/f noise corner frequency of 4 Hz. This noise specification makes the LMV551/LMV552/LMV554 ideal for low power applications such as PDAs and portable sensors. Ground Sensing and Rail-to-Rail Output The LMV551/LMV552/LMV554 each have a rail-to-rail output stage, which provides the maximum possible output dynamic range. This is especially important for applications requiring a large output swing. The input common mode range includes the negative supply rail which allows direct sensing at ground in a single supply operation. Small Size The small footprints of the LMV551/LMV552/LMV554 packages save space on printed circuit boards, and enable the design of smaller and more compact electronic products. Long traces between the signal source and the op amp make the signal path susceptible to noise. By using a physically smaller package, the amplifiers can be placed closer to the signal source, reducing noise pickup and enhancing signal integrity STABILITY OF OP AMP CIRCUITS Stability and Capacitive Loading As seen in the Phase Margin vs. Capacitive Load graph, the phase margin reduces significantly for CL greater than 100 pF. This is because the op amp is designed to provide the maximum bandwidth possible for a low supply current. Stabilizing them for higher capacitive loads would have required either a drastic increase in supply current, or a large internal compensation capacitance, which would have reduced the bandwidth of the op amp. Hence, if the LMV551/LMV552/LMV554 are to be used for driving higher capacitive loads, they will have to be externally compensated. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 11 LMV551, LMV552 www.ti.com GAIN SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 STABLE ROC ± 20 dB/decade UNSTABLE ROC = 40 dB/decade 0 FREQUENCY (Hz) Figure 30. Gain vs. Frequency for an Op Amp An op amp, ideally, has a dominant pole close to DC, which causes its gain to decay at the rate of 20 dB/decade with respect to frequency. If this rate of decay, also known as the rate of closure (ROC), remains the same until the op amp’s unity gain bandwidth, the op amp is stable. If, however, a large capacitance is added to the output of the op amp, it combines with the output impedance of the op amp to create another pole in its frequency response before its unity gain frequency (Figure 30). This increases the ROC to 40 dB/ decade and causes instability. In such a case a number of techniques can be used to restore stability to the circuit. The idea behind all these schemes is to modify the frequency response such that it can be restored to an ROC of 20 dB/decade, which ensures stability. In the Loop Compensation Figure 31 illustrates a compensation technique, known as ‘in the loop’ compensation, that employs an RC feedback circuit within the feedback loop to stabilize a non-inverting amplifier configuration. A small series resistance, RS, is used to isolate the amplifier output from the load capacitance, CL, and a small capacitance, CF, is inserted across the feedback resistor to bypass CL at higher frequencies. VIN + ROUT - RS CL RL CF RF RIN Figure 31. In the Loop Compensation The values for RS and CF are decided by ensuring that the zero attributed to CF lies at the same frequency as the pole attributed to CL. This ensures that the effect of the second pole on the transfer function is compensated for by the presence of the zero, and that the ROC is maintained at 20 dB/decade. For the circuit shown in Figure 31 the values of RS and CF are given by Equation 1. Values of RS and CF required for maintaining stability for different values of CL, as well as the phase margins obtained, are shown in Table 1. RF, RIN, and RL are to be 10 kΩ, while ROUT is 340Ω. 12 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 LMV551, LMV552 www.ti.com SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 RS = ROUTRIN RF § RF + 2RIN ¨ CLROUT ¨ R2 F © § ¨ ¨ © § ¨ ¨ © § 1 CF = ¨¨1 + ACL © (1) Table 1. Phase Margins CL (pF) RS (Ω) CF (pF) Phase Margin (°) 50 340 8 47 100 340 15 42 150 340 22 40 Although this methodology provides circuit stability for any load capacitance, it does so at the price of bandwidth. The closed loop bandwidth of the circuit is now limited by RF and CF. Compensation by External Resistor In some applications it is essential to drive a capacitive load without sacrificing bandwidth. In such a case, in the loop compensation is not viable. A simpler scheme for compensation is shown in Figure 32. A resistor, RISO, is placed in series between the load capacitance and the output. This introduces a zero in the circuit transfer function, which counteracts the effect of the pole formed by the load capacitance and ensures stability. The value of RISO to be used should be decided depending on the size of CL and the level of performance desired. Values ranging from 5Ω to 50Ω are usually sufficient to ensure stability. A larger value of RISO will result in a system with less ringing and overshoot, but will also limit the output swing and the short circuit current of the circuit. Figure 32. Compensation by Isolation Resistor TYPICAL APPLICATION ACTIVE FILTERS With a wide unity gain bandwidth of 3 MHz, low input referred noise density and a low power supply current, the LMV551/LMV552/LMV554 are well suited for low-power filtering applications. Active filter topologies, such as the Sallen-Key low pass filter shown in Figure 33, are very versatile, and can be used to design a wide variety of filters (Chebyshev, Butterworth or Bessel). The Sallen-Key topology, in particular, can be used to attain a wide range of Q, by using positive feedback to reject the undesired frequency range. In the circuit shown in Figure 33, the two capacitors appear as open circuits at lower frequencies and the signal is simply buffered to the output. At high frequencies the capacitors appear as short circuits and the signal is shunted to ground by one of the capacitors before it can be amplified. Near the cut-off frequency, where the impedance of the capacitances is on the same order as RG and RF, positive feedback through the other capacitor allows the circuit to attain the desired Q. Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 13 LMV551, LMV552 SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 www.ti.com C 2 m R R + VIN VO C - RF RG Figure 33. Sallen-Key Filter 14 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 LMV551, LMV552 www.ti.com SNOSAQ5G – FEBRUARY 2007 – REVISED FEBRUARY 2013 REVISION HISTORY Changes from Revision F (February 2013) to Revision G • Page Changed layout of National Data Sheet to TI format .......................................................................................................... 14 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LMV551 LMV552 15 PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2014 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) LMV551MF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AF3A LMV551MFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AF3A LMV551MG/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 A94 LMV551MGX/NOPB ACTIVE SC70 DCK 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 A94 LMV552MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AH3A LMV552MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AH3A LMV554MT/NOPB ACTIVE TSSOP PW 14 94 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV55 4MT LMV554MTX/NOPB ACTIVE TSSOP PW 14 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMV55 4MT (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com (4) 11-Apr-2014 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ LMV551MF/NOPB SOT-23 LMV551MFX/NOPB LMV551MG/NOPB Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.2 1.4 4.0 8.0 Q3 DBV 5 1000 178.0 8.4 SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV551MGX/NOPB SC70 DCK 5 3000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3 LMV552MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV552MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMV554MTX/NOPB TSSOP PW 14 2500 330.0 12.4 6.95 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 3.2 B0 (mm) PACKAGE MATERIALS INFORMATION www.ti.com 6-Nov-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMV551MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMV551MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMV551MG/NOPB SC70 DCK 5 1000 210.0 185.0 35.0 LMV551MGX/NOPB SC70 DCK 5 3000 210.0 185.0 35.0 LMV552MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LMV552MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 LMV554MTX/NOPB TSSOP PW 14 2500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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