ON NCP163AMX130TBG 250 ma, ultra-low noise and high psrr ldo regulator Datasheet

NCP163
250 mA, Ultra-Low Noise
and High PSRR LDO
Regulator for RF and
Analog Circuits
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The NCP163 is a next generation of high PSRR, ultra−low noise
LDO capable of supplying 250 mA output current. Designed to meet
the requirements of RF and sensitive analog circuits, the NCP163
device provides ultra−low noise, high PSRR and low quiescent
current. The device also offer excelent load/line transients. The
NCP163 is designed to work with a 1 uF input and a 1 mF output
ceramic capacitor. It is available in two thickness ultra−small 0.35P,
0.65 mm x 0.65 mm Chip Scale Package (CSP) and XDFN4 0.65P,
1 mm x 1 mm.
MARKING
DIAGRAMS
WLCSP4
CASE 567JZ
Features
•
•
•
•
•
•
•
•
•
•
•
Operating Input Voltage Range: 2.2 V to 5.5 V
Available in Fixed Voltage Option: 1.2 V to 5.3 V
±2% Accuracy Over Load/Temperature
Ultra Low Quiescent Current Typ. 12 mA
Standby Current: Typ. 0.1 mA
Very Low Dropout: 80 mV at 250 mA
Ultra High PSRR: Typ. 92 dB at 20 mA, f = 1 kHz
Ultra Low Noise: 6.5 mVRMS
Stable with a 1 mF Small Case Size Ceramic Capacitors
Available in −WLCSP4 0.65 mm x 0.65 mm x 0.33 mm
−WLCSP4 0.65 mm x 0.65 mm x 0.4 mm
−XDFN4 1 mm x 1 mm x 0.4 mm
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
X
A1
X
WLCSP4
CASE 567KA
1
XDFN4
CASE 711AJ
XX M
1
X or XX = Specific Device Code
M
= Date Code
PIN CONNECTIONS
IN
Typical Applications
•
•
•
•
A1
Battery−powered Equipment
Wireless LAN Devices
Smartphones, Tablets
Cameras, DVRs, STB and Camcorders
OUT
A1
A2
B1
B2
EN
GND
(Top View)
VOUT
VIN
IN
OUT
NCP163
CIN
1 mF
Ceramic
EN
COUT
1 mF
Ceramic
ON
OFF
GND
(Top View)
ORDERING INFORMATION
See detailed ordering, marking and shipping information on
page 11 of this data sheet.
Figure 1. Typical Application Schematics
© Semiconductor Components Industries, LLC, 2016
October, 2016 − Rev. 0
1
Publication Order Number:
NCP163/D
NCP163
IN
EN
ENABLE
THERMAL
LOGIC
SHUTDOWN
BANDGAP
MOSFET
REFERENCE
INTEGRATED
DRIVER WITH
SOFT−START
CURRENT LIMIT
OUT
* ACTIVE DISCHARGE
Version A only
EN
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
WLCSP4
Pin No.
XDFN4
Pin
Name
A1
4
IN
A2
1
OUT
B1
3
EN
B2
2
GND
Common ground connection
−
EPAD
EPAD
Expose pad can be tied to ground plane for better power dissipation
Description
Input voltage supply pin
Regulated output voltage. The output should be bypassed with small 1 mF ceramic capacitor.
Chip enable: Applying VEN < 0.4 V disables the regulator, Pulling VEN > 1.2 V enables the LDO.
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
−0.3 V to 6
V
Output Voltage
VOUT
−0.3 to VIN + 0.3, max. 6 V
V
Chip Enable Input
VCE
−0.3 to VIN + 0.3, max. 6 V
V
Output Short Circuit Duration
tSC
unlimited
s
Maximum Junction Temperature
TJ
150
°C
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
ESD Capability, Charged Device Model (Note 2)
ESDCDM
1000
V
Input Voltage (Note 1)
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
ESD Charged Device Model tested per EIA/JESD22−C101, Field Induced Charge Model
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Symbol
Thermal Characteristics, WLCSP4 (Note 3), Thermal Resistance, Junction−to−Air
Thermal Characteristics, XDFN4 (Note 3), Thermal Resistance, Junction−to−Air
Value
108
RqJA
198.1
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7
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2
Unit
°C/W
NCP163
ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 1 V; IOUT = 1 mA, CIN = COUT = 1 mF, unless otherwise
noted. VEN = 1.2 V. Typical values are at TJ = +25°C (Note 4).
Parameter
Test Conditions
Symbol
Min
Max
Unit
VIN
2.2
5.5
V
VIN = (VOUT(NOM) + 1 V) to 5.5 V
0 mA ≤ IOUT ≤ 250 mA
VOUT
−2
+2
%
VIN = (VOUT(NOM) + 1 V) to 5.5 V
0 mA ≤ IOUT ≤ 250 mA
(for VOUT < 1.8 V, XDFN4 package)
VOUT
−3
+3
%
Line Regulation
VOUT(NOM) + 1 V ≤ VIN ≤ 5.5 V
LineReg
0.02
%/V
Load Regulation
IOUT = 1 mA to 250 mA
LoadReg
0.001
%/mA
VDO
80
Operating Input Voltage
Output Voltage Accuracy
Dropout Voltage (Note 5)
IOUT = 250 mA
VOUT(NOM) = 3.3 V
Output Current Limit
VOUT = 90% VOUT(NOM)
ICL
Short Circuit Current
VOUT = 0 V
ISC
250
Typ
145
mV
700
mA
690
Quiescent Current
IOUT = 0 mA
IQ
12
20
mA
Shutdown Current
VEN ≤ 0.4 V, VIN = 4.8 V
IDIS
0.01
1
mA
EN Input Voltage “H”
VENH
EN Input Voltage “L”
VENL
VEN = 4.8 V
IEN
EN Pin Threshold Voltage
EN Pull Down Current
Turn−On Time
Power Supply Rejection Ratio
Output Voltage Noise
Thermal Shutdown Threshold
Active Output Discharge Resistance
Line Transient (Note 6)
0.4
0.2
COUT = 1 mF, From assertion of VEN to
VOUT = 95% VOUT(NOM)
IOUT = 20 mA
0.5
V
mA
120
ms
f = 100 Hz
f = 1 kHz
f = 10 kHz
f = 100 kHz
PSRR
91
92
85
60
dB
IOUT = 1 mA
IOUT = 250 mA
VN
8.0
6.5
mVRMS
Temperature rising
TSDH
160
°C
Temperature falling
TSDL
140
°C
VEN < 0.4 V, Version A only
RDIS
280
W
f = 10 Hz to 100 kHz
VIN = (VOUT(NOM) + 1 V) to (VOUT(NOM) +
1.6 V) in 30 ms, IOUT = 1 mA
VIN = (VOUT(NOM) + 1.6 V) to (VOUT(NOM) +
1 V) in 30 ms, IOUT = 1 mA
Load Transient (Note 6)
1.2
IOUT = 1 mA to 200 mA in 10 ms
IOUT = 200 mA to 1mA in 10 ms
−1
TranLINE
mV
+1
−40
TranLOAD
+40
mV
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when VOUT falls 100 mV below VOUT(NOM).
6. Guaranteed by design.
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NCP163
TYPICAL CHARACTERISTICS
3.325
VOUT, OUTPUT VOLTAGE (V)
3.330
1.825
VOUT, OUTPUT VOLTAGE (V)
1.830
1.820
1.815
IOUT = 10 mA
1.810
1.805
IOUT = 250 mA
1.800
1.795
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
1.790
1.785
1.780
−40 −20
0
20
40
60
80
100
120
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
3.290
3.285
0
20
40
60
80
100
120 140
Figure 4. Output Voltage vs. Temperature −
VOUT = 3.3 V − XDFN Package
0.050
5.025
IOUT = 10 mA
5.020
5.015
IOUT = 250 mA
5.010
5.005
VIN = 5.5 V
VOUT = 5.0 V
CIN = 1 mF
COUT = 1 mF
5.000
4.990
−40 −20
0
20
40
60
80
100
120
REGLINE, LINE REGULATION (%/V)
VOUT, OUTPUT VOLTAGE (V)
3.295
Figure 3. Output Voltage vs. Temperature −
VOUT = 1.8 V − XDFN Package
4.995
140
0.040
0.030
0.020
0.010
0.000
−0.010
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
−0.020
−0.030
−0.040
−0.050
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature −
VOUT = 5.0 V − XDFN Package
Figure 6. Line Regulation vs. Temperature −
VOUT = 1.8 V
REGLOAD, LOAD REGULATION (mV)
0.050
REGLINE, LINE REGULATION (%/V)
IOUT = 250 mA
3.305
TJ, JUNCTION TEMPERATURE (°C)
5.030
0.040
0.030
0.020
0.010
0.000
−0.010
−0.040
3.310
TJ, JUNCTION TEMPERATURE (°C)
5.035
−0.030
IOUT = 10 mA
3.315
3.280
−40 −20
140
5.040
−0.020
3.320
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
−0.050
−40 −20
0
20
40
60
80
100
120
140
20
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
18
16
14
12
10
8
6
4
2
0
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Line Regulation vs. Temperature −
VOUT = 3.3 V
Figure 8. Load Regulation vs. Temperature −
VOUT = 1.8 V
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NCP163
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
18
16
14
12
10
8
6
4
2
0
−40 −20
IGND, GROUND CURRENT (mA)
REGLOAD, LOAD REGULATION (mV)
20
0
20
40
60
80
100
120
18
16
14
12
10
8
6
VIN = 5.5 V
VOUT = 5.0 V
CIN = 1 mF
COUT = 1 mF
4
2
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 9. Load Regulation vs. Temperature −
VOUT = 3.3 V
Figure 10. Load Regulation vs. Temperature −
VOUT = 5.0 V
1500
1500
1350
1350
1200
TJ = 125°C
1050
TJ = 25°C
900
750
TJ = −40°C
600
450
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
300
150
0
0
25
50
75
TJ = 125°C
1050
TJ = 25°C
900
750
TJ = −40°C
600
450
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
300
150
0
25
50
75
100 125 150 175 200 225 250
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 11. Ground Current vs. Load Current −
VOUT = 1.8 V
Figure 12. Ground Current vs. Load Current −
VOUT = 3.3 V
250
1200
TJ = 125°C
1050
TJ = 25°C
900
750
TJ = −40°C
600
450
VIN = 5.5 V
VOUT = 5.5 V
CIN = 1 mF
COUT = 1 mF
300
150
0
25
50
75
100 125 150 175 200
VDROP, DROPOUT VOLTAGE (mV)
1350
0
1200
0
100 125 150 175 200 225 250
1500
IGND, GROUND CURRENT (mA)
20
0
−40 −20
140
IGND, GROUND CURRENT (mA)
REGLOAD, LOAD REGULATION (mV)
TYPICAL CHARACTERISTICS
200
TJ = 125°C
TJ = 25°C
175
150
125
TJ = −40°C
100
75
50
25
0
225 250
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
225
0
25
50
75
100 125 150 175 200 225 250
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 13. Ground Current vs. Load Current −
VOUT = 5.0 V
Figure 14. Dropout Voltage vs. Load Current −
VOUT = 1.8 V
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NCP163
TYPICAL CHARACTERISTICS
150
VDROP, DROPOUT VOLTAGE (mV)
VDROP, DROPOUT VOLTAGE (mV)
150
135
120
TJ = 125°C
105
TJ = 25°C
90
75
60
TJ = −40°C
45
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
30
15
0
0
25
50
75
100 125 150 175 200
225 250
135
120
105
TJ = 125°C
90
75
TJ = 25°C
60
45
TJ = −40°C
30
15
0
0
25
50
75
VOUT = 5.0 V
CIN = 1 mF
COUT = 1 mF
100 125 150 175 200 225 250
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 15. Dropout Voltage vs. Load Current −
VOUT = 3.3 V
Figure 16. Dropout Voltage vs. Load Current −
VOUT = 5.0 V
OUTPUT NOISE (nV/√Hz)
1000
1 mA
10 mA
250 mA
IOUT
100
RMS Output Noise (mV)
10 Hz − 100 kHz 100 Hz − 100 kHz
1 mA
7.73
6.99
10 mA
7.12
6.26
250 mA
7.11
6.33
10
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
1
10
100
1000
10k
1M
100k
FREQUENCY (Hz)
Figure 17. Output Voltage Noise Spectral Density – VOUT = 1.8 V
OUTPUT NOISE (nV/√Hz)
1000
1 mA
10 mA
250 mA
IOUT
100
RMS Output Noise (mV)
10 Hz − 100 kHz 100 Hz − 100 kHz
1 mA
7.9
7.07
10 mA
7.19
6.25
250 mA
7.29
6.38
10
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF
COUT = 1 mF
1
10
100
1000
10k
100k
1M
FREQUENCY (Hz)
Figure 18. Output Voltage Noise Spectral Density – VOUT = 2.8 V
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NCP163
TYPICAL CHARACTERISTICS
120
100
RR, RIPPLE REJECTION (dB)
VIN = 2.8 V+100mVpp
VOUT = 1.8 V
COUT = 1 mF MLCC 1206
80
60
40
20
0
10
1 mA
10 mA
20 mA
100 mA
250 mA
100
1000
10k
100k
1M
100
80
60
1 mA
10 mA
20 mA
100 mA
250 mA
40
20
0
10
10M
VIN = 4.3 V+100mVpp
VOUT = 3.3 V
COUT = 1 mF MLCC 1206
100
1000
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 19. Power Supply Rejection −
VOUT = 1.8 V
Figure 20. Power Supply Rejection−
VOUT = 3.3 V
120
RR, RIPPLE REJECTION (dB)
RR, RIPPLE REJECTION (dB)
120
100
80
60
40
20
0
10
1 mA
10 mA
20 mA
100 mA
250 mA
100
VIN = 5.5 V+100mVpp
VOUT = 5.0 V
COUT = 1 mF MLCC 1206
1000
10k
100k
1M
FREQUENCY (Hz)
Figure 21. Power Supply Rejection −
VOUT = 5.0 V
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10M
10M
NCP163
APPLICATIONS INFORMATION
General
transient response or high frequency PSRR. It is not
recommended to use tantalum capacitors on the output due
to their large ESR. The equivalent series resistance of
tantalum capacitors is also strongly dependent on the
temperature, increasing at low temperature.
The NCP163 is an ultra−low noise 250 mA low dropout
regulator designed to meet the requirements of RF
applications and high performance analog circuits. The
NCP163 device provides very high PSRR and excellent
dynamic response. In connection with low quiescent current
this device is well suitable for battery powered application
such as cell phones, tablets and other. The NCP163 is fully
protected in case of current overload, output short circuit and
overheating.
Enable Operation
Input capacitor connected as close as possible is necessary
for ensure device stability. The X7R or X5R capacitor
should be used for reliable performance over temperature
range. The value of the input capacitor should be 1 mF or
greater to ensure the best dynamic performance. This
capacitor will provide a low impedance path for unwanted
AC signals or noise modulated onto constant input voltage.
There is no requirement for the ESR of the input capacitor
but it is recommended to use ceramic capacitors for their low
ESR and ESL. A good input capacitor will limit the
influence of input trace inductance and source resistance
during sudden load current changes.
The NCP163 uses the EN pin to enable/disable its device
and to deactivate/activate the active discharge function.
If the EN pin voltage is <0.4 V the device is guaranteed to
be disabled. The pass transistor is turned−off so that there is
virtually no current flow between the IN and OUT. The
active discharge transistor is active so that the output voltage
VOUT is pulled to GND through a 280 Ω resistor. In the
disable state the device consumes as low as typ. 10 nA from
the VIN.
If the EN pin voltage >1.2 V the device is guaranteed to
be enabled. The NCP163 regulates the output voltage and
the active discharge transistor is turned−off.
The EN pin has internal pull−down current source with
typ. value of 200 nA which assures that the device is
turned−off when the EN pin is not connected. In the case
where the EN function isn’t required the EN should be tied
directly to IN.
Output Decoupling (COUT)
Output Current Limit
The NCP163 requires an output capacitor connected as
close as possible to the output pin of the regulator. The
recommended capacitor value is 1 mF and X7R or X5R
dielectric due to its low capacitance variations over the
specified temperature range. The NCP163 is designed to
remain stable with minimum effective capacitance of 0.7 mF
to account for changes with temperature, DC bias and
package size. Especially for small package size capacitors
such as 0201 the effective capacitance drops rapidly with the
applied DC bias. Please refer Figure 22.
Output Current is internally limited within the IC to a
typical 700 mA. The NCP163 will source this amount of
current measured with a voltage drops on the 90% of the
nominal VOUT. If the Output Voltage is directly shorted to
ground (VOUT = 0 V), the short circuit protection will limit
the output current to 690 mA (typ). The current limit and
short circuit protection will work properly over whole
temperature range and also input voltage range. There is no
limitation for the short circuit duration.
Input Capacitor Selection (CIN)
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
threshold (TSD − 160°C typical), Thermal Shutdown event
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
Thermal Shutdown Reset threshold (TSDU − 140°C typical).
Once the IC temperature falls below the 140°C the LDO is
enabled again. The thermal shutdown feature provides the
protection from a catastrophic device failure due to
accidental overheating. This protection is not intended to be
used as a substitute for proper heat sinking.
Power Dissipation
As power dissipated in the NCP163 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part.
Figure 22. Capacity vs DC Bias Voltage
There is no requirement for the minimum value of
Equivalent Series Resistance (ESR) for the COUT but the
maximum value of ESR should be less than 2 W. Larger
output capacitors and lower ESR could improve the load
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NCP163
The maximum power dissipation the NCP163 can handle
is given by:
ƪ125oC * T Aƫ
P D [ V IN @ I GND ) I OUTǒV IN * V OUTǓ
(eq. 1)
q JA
160
1.6
PD(MAX), TA = 25°C, 2 oz Cu
150
PD(MAX), TA = 25°C, 1 oz Cu
140
1.4
1.2
130
1.0
120
0.8
qJA, 1 oz Cu
110
0.6
0.4
100
qJA, 2 oz Cu
90
0.2
80
0
100
200
300
400
500
600
PD(MAX), MAXIMUM POWER DISSIPATION (W)
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)
P D(MAX) +
The power dissipated by the NCP163 for given
application conditions can be calculated from the following
equations:
0
700
PCB COPPER AREA (mm2)
1.0
220
qJA, 2 oz Cu
210
0.9
200
0.8
qJA, 1 oz Cu
190
0.7
PD(MAX), TA = 25°C, 2 oz Cu
PD(MAX), TA = 25°C, 1 oz Cu
180
0.6
170
0.5
160
0.4
150
0
100
200
300
400
PCB COPPER AREA (mm2)
500
600
Figure 24. qJA and PD (MAX) vs. Copper Area (XDFN4)
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0.3
700
PD(MAX), MAXIMUM POWER DISSIPATION (W)
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)
Figure 23. qJA and PD (MAX) vs. Copper Area (CSP4)
(eq. 2)
NCP163
Reverse Current
Turn−On Time
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case that VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
The turn−on time is defined as the time period from EN
assertion to the point in which VOUT will reach 98% of its
nominal value. This time is dependent on various
application conditions such as VOUT(NOM), COUT, TA.
Power Supply Rejection Ratio
To obtain good transient performance and good regulation
characteristics place CIN and COUT capacitors close to the
device pins and make the PCB traces wide. In order to
minimize the solution size, use 0402 or 0201 capacitors with
appropriate capacity. Larger copper area connected to the
pins will also improve the device thermal resistance. The
actual power dissipation can be calculated from the equation
above (Equation 2). Expose pad can be tied to the GND pin
for improvement power dissipation and lower device
temperature.
PCB Layout Recommendations
The NCP163 features very high Power Supply Rejection
ratio. If desired the PSRR at higher frequencies in the range
100 kHz – 10 MHz can be tuned by the selection of COUT
capacitor and proper PCB layout.
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NCP163
ORDERING INFORMATION (WLCSP4)
Voltage
Option
Marking
Rotation
NCP163AFCS180T2G
1.8 V
Y
180
NCP163AFCS260T2G
2.6 V
4
180
NCP163AFCS280T2G
2.8 V
3
180
NCP163AFCS285T2G
2.85 V
5
180
NCP163AFCS290T2G
2.9 V
6
180
NCP163AFCS2925T2G
2.925 V
2
180
NCP163BFCS180T2G
1.8 V
Y
270
NCP163BFCS2925T2G
2.925 V
2
270
NCP163AFCT180T2G
1.8 V
Y
180
NCP163AFCT260T2G
2.6 V
6
270
NCP163AFCT280T2G
2.8 V
3
180
NCP163AFCT285T2G
2.85 V
5
270
NCP163AFCT290T2G
2.9 V
4
270
NCP163AFCT2925T2G
2.925 V
2
180
NCP163AFCT300T2G
3.0 V
3
270
NCP163BFCT180T2G
1.8 V
Y
270
NCP163BFCT2925T2G
2.925 V
2
270
Device
Description
250 mA, Active Discharge
Package
Shipping†
WLCSP4
CASE 567KA
(Pb-Free)
5000 /
Tape &
Reel
WLCSP4
CASE 567JZ
(Pb-Free)
5000 /
Tape &
Reel
250 mA, Non−Active Discharge
250 mA, Active Discharge
250 mA, Non−Active Discharge
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ORDERING INFORMATION (XDFN4)
Device
Voltage
Option
Marking
NCP163AMX120TBG*
1.2 V
ME
NCP163AMX130TBG*
1.3 V
MG
NCP163AMX180TBG
1.8 V
MA
NCP163AMX1825TBG
1.825 V
MC
NCP163AMX190TBG
1.9 V
MH
NCP163AMX260TBG
2.6 V
MN
NCP163AMX275TBG
2.75 V
MD
NCP163AMX280TBG
2.8 V
MM
NCP163AMX285TBG
2.85 V
MQ
NCP163AMX290TBG
2.9 V
MR
NCP163AMX300TBG
3.0 V
MJ
NCP163AMX330TBG
3.3 V
MK
NCP163AMX500TBG
5.0 V
ML
NCP163BMX180TBG
1.8 V
PA
NCP163BMX1825TBG
1.825 V
PC
NCP163BMX275TBG
2.75 V
PD
Description
Package
Shipping†
XDFN4
CASE 711AJ
(Pb-Free)
3000 /
Tape &
Reel
250 mA, Active Discharge
250 mA, Non−Active Discharge
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*Contact sales office for availability information.
www.onsemi.com
11
NCP163
PACKAGE DIMENSIONS
WLCSP4, 0.64x0.64
CASE 567JZ
ISSUE A
A
E
ÈÈ
PIN A1
REFERENCE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
B
D
DIM
A
A1
A2
b
D
E
e
TOP VIEW
A2
0.05 C
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.05 C
A1
NOTE 3
C
SIDE VIEW
SEATING
PLANE
A1
4X
MILLIMETERS
MIN
NOM
MAX
−−−
−−−
0.33
0.04
0.06
0.08
0.23 REF
0.195
0.210
0.225
0.610
0.640
0.670
0.610
0.640
0.670
0.35 BSC
PACKAGE
OUTLINE
e
b
e
0.03 C A B
4X
0.35
PITCH
B
0.20
0.35
PITCH
A
1
DIMENSIONS: MILLIMETERS
2
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
BOTTOM VIEW
WLCSP4, 0.64x0.64
CASE 567KA
ISSUE A
A
E
ÈÈ
PIN A1
REFERENCE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
B
D
DIM
A
A1
A2
b
D
E
e
TOP VIEW
A2
0.05 C
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.05 C
A1
NOTE 3
C
SIDE VIEW
SEATING
PLANE
A1
4X
0.03 C
PACKAGE
OUTLINE
e
b
0.05 C A B
MILLIMETERS
MIN
NOM
MAX
0.35
0.40
0.45
0.18
0.14
0.16
0.25 REF
0.185
0.200
0.215
0.610
0.640
0.670
0.610
0.640
0.670
0.35 BSC
e
0.35
PITCH
B
A
1
DIMENSIONS: MILLIMETERS
2
BOTTOM VIEW
4X
0.20
0.35
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
12
NCP163
PACKAGE DIMENSIONS
XDFN4 1.0x1.0, 0.65P
CASE 711AJ
ISSUE A
PIN ONE
REFERENCE
4X
A
B
D
ÉÉ
ÉÉ
E
4X
0.05 C
2X
L2
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM THE TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
b2
DETAIL A
DIM
A
A1
A3
b
b2
D
D2
E
e
L
L2
0.05 C
2X
TOP VIEW
(A3)
0.05 C
A
0.05 C
NOTE 4
A1
SIDE VIEW
C
SEATING
PLANE
RECOMMENDED
MOUNTING FOOTPRINT*
e
e/2
DETAIL A
1
4X
2
MILLIMETERS
MIN
MAX
0.33
0.43
0.00
0.05
0.10 REF
0.15
0.25
0.02
0.12
1.00 BSC
0.43
0.53
1.00 BSC
0.65 BSC
0.20
0.30
0.07
0.17
L
0.65
PITCH
2X
0.52
PACKAGE
OUTLINE
D2
45 5
4X
D2
4
4X
3
4X
b
0.05
BOTTOM VIEW
M
C A B
0.11
4X
0.24
NOTE 3
0.39
1.20
4X
0.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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13
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For additional information, please contact your local
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NCP163/D
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