TI1 CFLM7705 Low noise negative bias generator Datasheet

LM7705
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SNVS420A – NOVEMBER 2008 – REVISED JUNE 2009
LM7705 Low Noise Negative Bias Generator
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FEATURES
1
•
•
•
•
•
•
•
•
2
Regulated output voltage −0.232V
Output voltage tolerance 5%
Output voltage ripple 4 mVPP
Max output current 26 mA
Supply voltage 3V to 5.25V
Conversion efficiency up to 98%
Quiescent current 78 µA
Shutdown current 20 nA
•
•
•
Turn on time 500 µs
Operating temperature range −40°C to 125°C
8-Pin MSOP Package
APPLICATIONS
•
•
•
True zero amplifier output
Portable instrumentation
Low voltage split power supplies
DESCRIPTION
The LM7705 is a switched capacitor voltage inverter with a low noise, −0.23V fixed negative voltage regulator.
This device is designed to be used with low voltage amplifiers to enable the amplifiers output to swing to zero
volts. The −0.23 volts is used to supply the negative supply pin of an amplifier while maintaining less then 5.5
volts across the amplifier. Rail-to-Rail output amplifiers cannot output zero volts when operating from a single
supply voltage and can result in error accumulation due to amplifier output saturation voltage being amplified by
following gain stages. A small negative supply voltage will prevent the amplifiers output from saturating at zero
volts and will help maintain an accurate zero through a signal processing chain. Additionally, when an amplifier is
used to drive an ADC’s input, it can output a zero voltage signal and the full input range of an ADC can be used.
The LM7705 has a shutdown pin to minimize standby power consumption
Typical Application
+V
+V
+ In
+
- In
-V
CFLY
CF+
VDD
shutdown
SD
VOUT
LM7705
VSS
true zero
output voltage
CF-0.23V
COUT
CRES
CRES
low voltage
amplifier
VSS
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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LM7705
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ABSOLUTE MAXIMUM RATINGS (1)
VALUE
Supply Voltage
VDD - VSS
+5.75V
SD
VDD+0.3V, VSS-0.3V
Human Body Model
ESD Tolerance (2)
For input pins only
2000V
For all other pins
2000V
Machine Model
200V
Charged Device Model
750V
−65°C to 150°C
Storage Temp. Range
Junction Temperature (3)
Mounting Temperature
(1)
(2)
(3)
150°C max
Infrared or Convection (20 sec)
260°C
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and test
conditions, see the Electrical Characteristics.
Human Body Model, applicable std. MIL-STD-883, Method 3015.7. Machine model, applicable std JESD22–A115–A (ESSD MM srd of
JEDEC). Field induced Charge-Device Model, applicable std. JESD22–C101–C. (ESD FICDM std of JEDEC).
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
Operating Ratings
Supply Voltage ( VDD to GND)
3V to 5.25V
Supply Voltage ( VDD wrt VOUT)
3.23V to 5.48V
−40°C to 125°C
Temperature Range
Thermal Resistance (θJA )
8-Pin MSOP
2
253°C/W
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3.3V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA = 25°C, VDD = 3.3V, VSS = 0V, SD = 0V, CFLY= 5 µF, CRES = 22 µF,
COUT = 22 µF. Boldface limits apply at temperature extremes (1).
Symbol
VOUT
Parameter
Output Voltage
Conditions
Min
Typical
Max
IOUT = 0 mA
−0.242
−0.251
−0.232
−0.219
−0.209
IOUT = −20 mA
−0.242
−0.251
−0.226
−0.219
−0.209
50
78
(2)
(3)
(2)
Units
V
VR
Output Voltage Ripple
IOUT = −20 mA
IS
Supply Current
No Load
ISD
Shutdown Supply Current
SD = VDD
20
nA
ηPOWER
Current Conversion Efficiency
−5 mA ≤ IOUT ≤ −20 mA
98
%
ηPOWER
Current Conversion Efficiency
IOUT = −5 mA
98
%
tON
Turn On Time
IOUT = −5 mA
500
μs
Turn Off Time
IOUT = −5 mA
700
μs
Turn Off Time Charge Pump
IOUT = −5 mA
11
ZOUT
Output Impedance
−1 mA ≤ IOUT ≤ −20 mA
IO_MAX
Maximum Output Current
VOUT < −200 mV
fOSC
Oscillator Frequency
VIL
Shutdown Input Low
VIH
Shutdown Input High
IC
Shutdown Pin Input Current
SD = VDD
Load Regulation
0 mA ≤ IOUT ≤ −20 mA
Line Regulation
3V ≤ VDD ≤ 5.25V (No Load)
t OFF
tOFF
(1)
(2)
(3)
CP
4
0.23
mVPP
100
150
μs
0.8
1.3
-26
Ω
mA
92
kHz
1.6
1.25
1.85
2.15
V
V
50
-0.2
μA
pA
0.12
0.6
0.85
%/mA
0.29
0.7
1.1
%/V
Boldface limits apply to temperature range of −40°C to 125°C
All limits are guaranteed by testing or statistical analysis.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
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5.0V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for TA = 25°C, VDD = 5.0V, VSS = 0V, SD = 0V, CFLY = 5 µF, CRES = 22
µF, COUT = 22 µF. Boldfacelimits apply at temperature extremes (1).
Symbol
VOUT
Parameter
Conditions
Output Voltage
Min
Typical
Max
IOUT = 0 mA
−0.242
−0.251
−0.233
−0.219
−0.209
IOUT = −20 mA
−0.242
−0.251
−0.226
−0.219
−0.209
60
103
(2)
(3)
(2)
Units
V
VR
Output Voltage Ripple
IOUT = −20 mA
IS
Supply Current
No Load
ISD
Shutdown Supply Current
SD = VDD
20
nA
ηPOWER
Current Conversion Efficiency
−5 mA ≤ IOUT ≤ −20 mA
98
%
ηPOWER
Current Conversion Efficiency
IOUT = −5 mA
98
%
tON
Turn On Time
IOUT = −5 mA
200
μs
Turn Off Time
IOUT = −5 mA
700
μs
Turn Off Time Charge Pump
IOUT = −5 mA
11
ZOUT
Output Impedance
−1 mA ≤ IOUT ≤ −20 mA
IO_MAX
Maximum Output Current
VOUT < − 200 mV
fOSC
Oscillator Frequency
VIL
Shutdown Input Low
VIH
Shutdown Input High
IC
Shutdown Pin Input Current
SD = VDD
Load Regulation
0 mA ≤ IOUT ≤ −20 mA
Line Regulation
3V ≤ VDD ≤ 5.25V (No Load)
t OFF
tOFF
(1)
(2)
(3)
CP
4
0.26
mVPP
135
240
μs
0.8
1.3
−35
Ω
mA
91
kHz
2.55
1.95
2.8
3.25
V
V
50
−0.2
μA
pA
0.14
0.6
0.85
%/mA
0.29
0.7
1.1
%/V
Boldface limits apply to temperature range of −40°C to 125°C
All limits are guaranteed by testing or statistical analysis.
Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not guaranteed on
shipped production material.
Connection Diagram
8
1
LM7705
4
5
Figure 1. 8-Pin MSOP -Top View
Table 1. Pin Descriptions
4
Pin Number
Symbol
1
CF+
CFLY Positive Capacitor Connection
Description
2
VSS
Power Ground
3
SD
Shutdown Pin
If SD pin is LOW, device is ON
If SD pin is HIGH, device is OFF
4
VDD
Positive Supply Voltage
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Table 1. Pin Descriptions (continued)
Pin Number
Symbol
5
VSS
Power Ground
Description
6
VOUT
Output Voltage
7
CRES
Reserve Capacitor Connection
8
CF-
CFLY Negative Capacitor Connection
Block Diagram
CFLY
VCP,OUT
VCP,IN
VDD
PRE
REGULATOR
VSS
CHARGE
PUMP
INVERTOR
VOUT
CRESERVE
POST
REGULATOR
Cout
VSS
fosc
VREF1
VREF2
Figure 2. LM7705
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Typical Performance Characteristics
VDD = 3.3V and TA = 25°C unless otherwise noted.
Output Voltage
vs.
Supply Voltage
Supply Current
vs.
Supply Voltage
300
SUPPLY CURRENT (éA)
OUTPUT VOLTAGE (V)
-0.19
-0.20
-0.21
IOUT=10 mA
IOUT = 20 mA
-0.22
-0.23
250
200
125°C
85°C
150
25°C
100
50
0
-0.24
IOUT = 5 mA
IOUT = 0 mA
3.0
3.5
4.0
4.5
SUPPLY VOLTAGE (V)
-40°C
5.0
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
Output Voltage
vs.
Output Current
Output Voltage
vs.
Output Current
125°C
-0.20
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
-0.20
85°C
-0.21
-0.22
-40°C
-0.23
-0.24
25°C
-0.25
125°C
-0.21
-0.22
85°C
25°C
-0.23
-40°C
-0.24
-0.25
SUPPLY VOLTAGE = 5.0V
SUPPLY VOLTAGE = 3.3V
0
5
10
15
20
25
30
0
40
50
Output Voltage Ripple
vs.
Temperature
60
15
SUPPLY VOLTAGE = 3.3V
12
CRES = CFILTER = 10 éF
9
6
CRES = CFILTER = 22 éF
3
0
40
80
OUTPUT VOLTAGE RIPPLE (mVPP)
OUTPUT VOLTAGE RIPPLE (mVPP)
30
Output Voltage Ripple
vs.
Temperature
SUPPLY VOLTAGE = 5.0V
12
CRES = CFILTER = 10 éF
9
6
CRES = CFILTER = 22 éF
3
0
-40
120
TEMPERATURE (°C)
6
20
OUTPUT CURRENT (mA)
15
0
-40
10
OUTPUT CURRENT (mA)
0
40
80
120
TEMPERATURE (°C)
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Typical Performance Characteristics (continued)
VDD = 3.3V and TA = 25°C unless otherwise noted.
Supply Current
vs.
Output Current
Supply Current
vs.
Output Current
SUPPLY VOLTAGE = 5.0V
SUPPLY VOLTAGE = 3.3V
20
SUPPLY CURRENT (mA)
16
-40°C
12
25°C
8
85°C
4
0
4
-40°C
12
25°C
8
85°C
4
0
125°C
0
16
8
12
16
20
125°C
0
4
SUPPLY VOLTAGE = 3.3V
110
85°C
25°C
100
95
125°C
90
85
80
0
4
8
12
16
100
95
90
85°C
25°C
125°C
85
80
20
0
4
8
12
16
20
OUTPUT CURRENT (mA)
Turn On Time
SUPPLY VOLTAGE = 5.0V
0V
OUTPUT VOLTAGE (0.2V/DIV)
ENABLE PULSE
ENABLE VOLTAGE
OUTPUT VOLTAGE (0.2V/DIV)
-40°C
105
SUPPLY VOLTAGE = 3.3V
0 mA
20
SUPPLY VOLTAGE = 5.0V
Turn On Time
10 mA 20 mA
16
110
OUTPUT CURRENT (mA)
0V
12
Current Conversion Efficiency
vs.
Output Current
CURRENT CONVERSION EFFICIECY (%)
CURRENT CONVERSION EFFICIECY (%)
Current Conversion Efficiency
vs.
Output Current
105 -40°C
8
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
5 mA
ENABLE PULSE
0V
0 mA
0V
10 mA
20 mA
ENABLE VOLTAGE
SUPPLY CURRENT (mA)
20
5 mA
TURN ON TIME (200 és/DIV)
TURN ON TIME (100 és/DIV)
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Typical Performance Characteristics (continued)
VDD = 3.3V and TA = 25°C unless otherwise noted.
Load Regulation
vs.
Temperature
SUPPLY VOLTAGE = 3.3V
SUPPLY VOLTAGE = 5.0V
0.4
LOAD REGULATION (%/mA)
0.4
0.3
0.2
0.1
0.0
0.3
0.2
0.1
0.0
0
40
80
120
-40
Transient Response
10
-0.234
OUTPUT VOLTAGE (V)
+85/+125°C
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
20
-0.226
0
-0.242
+25°C
-10
Transient Response
40
40
-0.210
30
+25°C
20
10
+85/+125°C
0
OUTPUT VOLTAGE (V)
SUPPLY VOLTAGE = 5V
OUTPUT CURRENT (mA)
SUPPLY VOLTAGE = 3.3V
OUTPUT VOLTAGE (V)
0
TIME (20 us/DIV)
-0.210
-0.218
-40°C
30
+25°C
20
-0.226
10
-0.234
+85/+125°C
0
-0.242
OUTPUT CURRENT
OUTPUT CURRENT
-10
-10
-0.250
TIME (20 us/DIV)
8
10
-0.250
TIME (20 us/DIV)
-0.250
+85/+125°C
-0.234
Transient Response
-0.242
20
-0.226
-0.242
-10
-0.234
30
OUTPUT CURRENT
-0.250
-0.226
SUPPLY VOLTAGE = 5V
-0.218
OUTPUT CURRENT
-40°C
120
40
-40°C
30
-0.218
-0.218
80
-0.210
SUPPLY VOLTAGE = 3.3V
+25°C
40
Transient Response
40
-0.210
-40°C
0
TEMPERATURE (°C)
TEMPERATURE (°C)
OUTPUT CURRENT (mA)
-40
OUTPUT CURRENT (mA)
LOAD REGULATION (%/mA)
Load Regulation
vs.
Temperature
TIME (20 us/DIV)
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Typical Performance Characteristics (continued)
VDD = 3.3V and TA = 25°C unless otherwise noted.
Output voltage
vs.
shutdown Voltage
Supply Current
vs.
Shutdown Voltage
300
SUPPLY VOLTAGE = 5V
0
-0.05
SUPPLY CURRENT (éA)
OUTPUT VOLTAGE (V)
250
SUPPLY
VOLTAGE = 3.3V
-0.10
-0.15
SUPPLY
VOLTAGE = 5V
-0.20
200
150
SUPPLY VOLTAGE = 3.3V
100
50
-0.25
0
1
2
3
4
0
0
5
SHUTDOWN VOLTAGE (V)
1
2
3
4
5
SHUTDOWN VOLTAGE (V)
Oscillator Frequency
vs.
Temperature
OSCILLATOR FREQUENCY (kHz)
100
SUPPLY VOLTAGE = 3.3V
95
90
85
SUPPLY VOLTAGE = 5V
80
75
70
-40
0
40
80
120
TEMPERATURE (°C)
Application Information
This applications section will give a description of the functionality of the LM7705. The LM7705 is a switched
capacitor voltage inverter with a low noise, −0.23V fixed negative bias output. The part will operate over a supply
voltage range of 3 to 5.25 Volt. Applying a logical low level to the SD input will activate the part, and generate a
fixed −0.23V output voltage. The part can be disabled; the output is switched to ground level, by applying a
logical high level to the SD input of the part.
FUNCTIONAL DESCRIPTION
The LM7705, low noise negative bias generator, can be used for many applications requiring a fixed negative
voltage. A key application for the LM7705 is an amplifier with a true zero output voltage using the original parts,
while not exceeding the maximum supply voltage ratings of the amplifier.
The voltage inversion in the LM7705 is achieved using a switched capacitor technique with two external
capacitors (CFLY and CRES). An internal oscillator and a switching network transfers charge between the two
storage capacitors. This switched capacitor technique is given in Figure 3.
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V+
CAP+ S3
S1
CFLY
S4
S2
OUT=V-
CAP-
CRES
Ó1
Ó2
OSCILLATOR
Figure 3. Voltage Inverter
The internal oscillator generates two anti-phase clock signals. Clock 1 controls switches S1 and S2. Clock 2
controls switches S3 and S4. When Switches S1 and S2 are closed, capacitor CFLY is charged to V+. When
switches S3 and S4 are closed (S1 and S2 are open) charge from CFLY is transferred to CRES and the output
voltage OUT is equal to -V+.
Due to the switched capacitor technique a small ripple will be present at the output voltage, with a frequency of
the oscillator. The magnitude of this ripple will increase for increasing output currents. The magnitude of the
ripple can be influenced by changing the values of the used capacitors.
In the next section a more detailed technical description of the LM7705 will be given.
TECHNICAL DESCRIPTION
As indicated in the functional description section, the main function of the LM7705 is to supply a stabilized
negative bias voltage to a load, using only a positive supply voltage. A general block diagram for this charge
pump inverter is given in Figure 4. The external power supply and load are added in this diagram as well.
LM7705
POWER
SUPPLY
PRE
REGULATOR
CHARGE
PUMP
POST
REGULATOR
LOAD
Figure 4. LM7705 Architecture
The architecture given in Figure 4 shows that the LM7705 contains 3 functional blocks:
• Pre-regulator
• Charge pump inverter
• Post-regulator
The output voltage is stabilized by:
• Controlling the power supplied from the power supply to the charge pump input by the pre-regulator
• The power supplied from the charge pump output to the load by the post-regulator.
A more detailed block diagram of the negative bias generator is given in Figure 5. The control of the preregulator is based on measuring the output voltage of the charge pump. The goal of the post-regulator is to
provide an accurate controlled negative voltage at the output, and acts as a low pass filter to attenuate the output
voltage ripple. The voltage ripple is a result of the switching behavior of the charge pump and is dependent of the
output current and the values of the used capacitors.
10
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CFLY
VCP,OUT
VCP,IN
VDD
VOUT
CHARGE
PUMP
INVERTOR
PRE
REGULATOR
VSS
CRESERVE
POST
REGULATOR
Cout
VSS
fosc
VREF2
VREF1
Figure 5. Charge Pump Inverter with Input/Output Control
In the next section a simple equation will be derived, that shows the relation between the ripple of the output
current, the frequency of the internal clock generator and the value of the capacitor placed at the output of the
LM7705.
Charge Pump Theory
This section uses a simplified but realistic equivalent circuit that represents the basic function of the charge
pump. The schematic is given in Figure 6.
A B
V2
V1
CFLY
RL
CRES
Figure 6. Charge Pump
When the switch is in position A, capacitor CFLY will charge to voltage V1. The total charge on capacitor CFLY is
Q1 = CFLY x V 1. The switch then moves to position B, discharging CFLY to voltage V2. After this discharge, the
charge on CFLY will be Q2 = CFLY x V2. Note that the charge has been transferred from the source V1 to the
output V2. The amount of charge transferred is:
Âq = q1 -q2 = CFLY (V1 ± V2)
(1)
When the switch changes between A and B at a frequency f, the charge transfer per unit time, or current is:
I = f Âq = f CFLY (V1 ± V2)
(2)
The switched capacitor network can be replaced by an equivalent resistor, as indicated in Figure 7.
REQ
V2
V1
CRES
RL
Figure 7. Switched Capacitor Equivalent Circuit
The value of this resistor is dependent on both the capacitor value and the switching frequency as given in
Equation 3
I=
V1 ± V2
V1 ± V2
=
REQ
1
·
§
©f CFLY ¹
(3)
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The value for REQ can be calculated from Equation 3 and is given in Equation 4
REQ =
§ 1 ·
© f CFLY ¹
(4)
Equation 4 show that the value for the resistance at an increased internal switching frequency, allows a lower
value for the used capacitor.
Key Specification
The key specifications for the LM7705 are given in the following overview:
Supply Voltage
The LM7705 will operate over a supply voltage range of 3V to 5.25V, and meet the specifications
given in the Electrical Table. Supply voltage lower than 3.3 Volt will decrease performance (The
output voltage will shift towards zero, and the current sink capabilities will decrease) A voltage
higher than 5.25V will exceed the Abs Max ratings and therefore damage the part.
Output Voltage/Line Regulation
The fixed and regulated output voltage of −0.23 V has tight limits, as indicated in the Electrical
Characteristics table, to guarantee a stable voltage level. The usage of the pre- and post
regulator in combination with the charge pump inverter ensures good line regulation of 0.29%/V
Output current/Load regulation
The LM7705 can sink currents > 26 mA, causing an output voltage shift to −200 mV. A specified
load-regulation of 0.14% mA/V ensures a minor voltage deviation for load current up to 20 mA.
Quiescent current
The LM7705 consumes a quiescent current less than 100 µA. Sinking a load current, will result in
a current conversion efficiency better than 90%, even for load currents of 1 mA, increasing to
98% for a current of 5mA.
In the next section a general amplifier application requiring a true-zero output, will be discussed, showing an
increased performance using the LM7705.
GENERAL AMPLIFIER APPLICATION
This section will discuss a general DC coupled amplifier application. First, one of the limitations of a DC coupled
amplifier is discussed. This is illustrated with two application examples. A solution is a given for solving this
limitation by using the LM7705.
Due to the architecture of the output stage of general amplifiers, the output transistors will saturate. As a result,
the output of a general purpose op amp can only swing to a few 100 mV of the supply rails. Amplifiers using
CMOS technology do have a lower output saturation voltage. This is illustrated in Figure 8. E.g. National
Semiconductors LM7332 can swing to 200 mV to the negative rail, for a 10 kΩ load, over all temperatures.
OUTPUT VOLTAGE (V)
V+
OUTPUT SATURATION
VDSAT
0
0
V+
INPUT VOLTAGE (V)
Figure 8. Limitation of the Output of an Amplifier
The introduction of operational amplifiers with output Rail-to-rail drive capabilities is a strong improvement and
the (output) performance of op amps is for many applications no longer a limiting factor. For example, National
Semiconductors LMP7701 (a typical rail-to-rail op amp), has an output drive capability of only 50 mV over all
temperatures for a 10 kΩ load resistance. This is close to the lower supply voltage rail.
12
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However, for true zero output applications with a single supply, the saturation voltage of the output stage is still a
limiting factor. This limitation has a negative impact on the functionality of true zero output applications. This is
illustrated in Figure 9.
+V
VIN
VOUT
+
VDSAT
-
0V
0V
Figure 9. Output Limitation for Single Supply True Zero Output Aapplication
In the following section, two applications will be discussed, showing the limitations of the output stage of an op
amp in a single supply configuration.
• A single stage true zero amplifier, with a 12 bit ADC back end.
• A dual stage true zero amplifier, with a 12 bit ADC back end.
One-stage, Single Supply True Zero Amplifier
This application shows a sensor with a DC output signal, amplified by a single supply op amp. The output voltage
of the op amp is converted to the digital domain using an Analog to Digital Converter (ADC). Figure 10 shows the
basic setup of this application.
+V
LMP7701
VREF
ADC122S021
+
ADC
-
SENSOR
RG1
RF1
GAIN = 50x
Figure 10. Sensor with DC Output and a Single Supply Op Amp
The sensor has a DC output signal that is amplified by the op amp. For an optimal
output voltage swing of the op amp should be matched to the input voltage range
Converter (ADC). For the high side of the range this can be done by adjusting the gain
the low side of the range can’t be adjusted and is affected by the output swing of the op
signal-to-noise ratio, the
of the Analog to Digital
of the op amp. However,
amp.
Example:
Assume the output voltage range of the sensor is 0 to 90 mV. The available op amp is a LMP7701, using a
0/+5V supply voltage, having an output drive of 50 mV from both rails. This results in an output range of 50 mV
to 4.95V.
Let choose two resistors values for RG1 and RF1 that result in a gain of 50x. The output of the LMP7701 should
swing from 0 mV to 4.5V. The higher value is no problem, however the lower swing is limited by the output of the
LM7701 and won’t go below 50 mV instead of the desired 0V, causing a non-linearity in the sensor reading.
When using a 12 bit ADC, and a reference voltage of 5 Volt (having an ADC step size of approximate 1.2 mV),
the output saturation results in a loss of the lower 40 quantization levels of the ADCs dynamic range.
Two-Stage, Single Supply True Zero Amplifier
This sensor application produces a DC signal, amplified by a two cascaded op amps, having a single supply. The
output voltage of the second op amp is converted to the digital domain. Figure 11 shows the basic setup of this
application.
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+V
1/2 LMP7702
VREF
+V
+
A1
1/2 LMP7702
+
A2
ADC122S021
-
ADC
-
SENSOR
RG1
RF1
RG2
GAIN = 10x
RF2
GAIN = 5x
Figure 11. Sensor with DC Output and a 2-Stage, Single Supply Op Amp.
The sensor generates a DC output signal. In this case, a DC coupled, 2-stage amplifier is used. The output
voltage swing of the second op amp should me matched to the input voltage range of the Analog to Digital
Converter (ADC). For the high side of the range this can be done by adjusting the gain of the op amp. However,
the low side of the range can’t be adjusted and is affected by the output drive of the op amp.
Example:
Assume; the output voltage range of the sensor is 0 to 90 mV. The available op amp is a LMP7702 (Dual
LMP7701 op amp) that can be used for A1 and A2. The op amp is using a 0/+5V supply voltage, having an output
drive of 50mV from both rails. This results in an output range of 50 mV to 4.95V for each individual amplifier.
Let choose two resistors values for RG1 and RF1 that result in a gain of 10x for the first stage (A1) and a gain of
5x for the second stage (A2) The output of the A2 in the LMP7702 should swing from 0V to 4.5 Volt. This swing is
limited by the 2 different factors:
1. The high voltage swing is no problem; however the low voltage swing is limited by the output saturation
voltage of A2 from the LM7702 and won’t go below 50mV instead of the desired 0V.
2. Another effect has more impact. The output saturation voltage of the first stage will cause an offset for the
input of the second stage. This offset of A1 is amplified by the gain of the second stage (10x in this example),
resulting in an output offset voltage of 500mV. This is significantly more that the 50 mV (VDSAT) of A2.
When using a 12 bit ADC, and a reference voltage of 5 Volt (having an ADC step size of approximate 1.2 mV),
the output saturation results in a loss of the lower 400 quantization levels of the ADCs dynamic range. This will
cause a major non-linearity in the sensor reading.
Dual Supply, True Zero Amplifiers
The limitations of the output stage of the op amp, as indicated in both examples, can be omitted by using a dual
supply op amp. The output stage of the used op amp can then still swing from 50 mV of the supply rails.
However, the functional output range of the op amp is now from ground level to a value near the positive supply
rail. Figure 12 shows the output drive of an amplifier in a true zero output voltage application.
+V
VIN
VOUT
+
0V
-
0V
-V
Figure 12. Amplifier output drive with a dual supply
Disadvantages of this solution are:
• The usage of a dual supply instead of a simple single supply is more expensive.
• A dual supply voltage for the op amps requires parts that can handle a larger operating range for the supply
voltage. If the op amps used in the current solution can’t handle this, a redesign can be required.
A better solution is to use the LM7705. This low noise negative bias generator has some major advantages with
respect to a dual supply solution:
• Operates with only a single positive supply, and is therefore a much cheaper solution.
14
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•
•
SNVS420A – NOVEMBER 2008 – REVISED JUNE 2009
The LM7705 generates a negative supply voltage of only −0.23V. This is more than enough to create a Truezero output for most op amps.
In many applications, this “small” extension of the supply voltage range can be within the abs max rating for
many op amps, so an expensive redesign is not necessary.
In the next section a typical amplifier application will be evaluated. The performance of an amplifier will be
measured in a single supply configuration. The results will be compared with an amplifier using a LM7705
supplying a negative voltage to the bias pin.
TYPICAL AMPLIFIER APPLICATION
This section shows the measurement results of a true zero output amplifier application with an analog to digital
converter (ADC) used as back-end. The biasing of the op amp can be done in two ways:
• A single supply configuration
• A single supply in combination with the LM7705, extending the negative supply from ground level to a fixed 0.23 Voltage.
Basic Setup
The basic setup of this true zero output amplifier is given in Figure 13. The LMP7701 op amp is configured as a
voltage follower to demonstrate the output limitation, due to the saturation of the output stage. The negative
power supply pin of the op amp can be connected to ground level or to the output of the negative bias generator,
to demonstrate the VDSAT effect at the output voltage range.
VREF
+V
LMP7701
VIN
ADC122S021
+
ADC
SDO
-
CRES
-V
A
B
+V
LM7705
CFLY
COUT
Figure 13. Typical True Zero Output Voltage Application with/without LM7705
The output voltage of the LMP7701 is converted to the digital domain using an ADC122S021. This is an 12 bit
analog to digital converter with a serial data output. Data processing and graphical displaying is done with a
computer. The negative power supply pin of the op amp can be connected to ground level or to the output of the
negative bias generator, to demonstrate the effect at the output voltage range of the op amp.
The key specifications of the used components are given in the next part of the section.
Supply Voltage/Reference Voltage
Supply voltage
+5V
ADC Voltage Reference
+5V
LMP7701
VDSAT (typical)
18 mV
VDSAT (over temperature)
50 mV
LM7705
Output voltage ripple
4 mVPP
Output voltage noise
10 mVPP
ADC
Type
ADC122S021
Resolution
12 bit
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Quantization level
5V/4096 = 1.2mV
Measurement Results
The output voltage range of the LMP7701 has been measured, especially the range to ground level. A small DC
signal, with a voltage swing of 50 mVPP is applied to the input. The digitized output voltage of the op amp is
measured over a given time period, when its negative supply pin is connected to ground level or connected to
the output of the LM7705.
Figure 14A and Figure 15B show the digitized output voltage of the LMP7701 op amp.
DIGITIZED OUTPUT VOLTAGE (`V)
0.050
0.040
0.030
0.020
0.010
VDSAT
0.000
0
80
160
240
320
400
TIME (SAMPLES)
Figure 14. (A)
DIGITIZED OUTPUT VOLTAGE (V)
0.050
0.040
0.030
0.020
0.010
0.000
0
80
160
240
320
400
TIME (SAMPLES)
(B)
Figure 15. Digitized Output Voltage without (A) and with (B) LM7705
Figure 14A shows the digitized output voltage of the op amp when its negative supply pin is connected to ground
level. The output of the amplifier saturates at a level of 14 mv (this is in line with the typical value of 18 mV given
in the datasheet) The graph shows some fluctuations (1 bit quantization error). Figure 15B show the digitized
output voltage of the op amp when its negative supply pin is connected to the output of the LM7705. Again, the
graph shows some 1 bit quantization errors caused by the voltage ripple and output noise. In this case the op
amps output level can reach the true zero output level.
The graphs in Figure 14 and Figure 15 show that:
• With a single supply, the output of the amplifier is limited by the VDSAT of the output stage.
• The amplifier can be used as a true zero output using a LM7705.
• The quantization error of the digitized output voltage is caused by the noise and the voltage ripple.
• Using the LM7705 does not increase the quantization error in this set up.
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DESIGN RECOMMENDATIONS
The LM7705 is a switched capacitor voltage inverter. This means that charge is transferred from different
external capacitors, to generate a negative voltage. For this reason the part is very sensitive for contact
resistance between the package and external capacitors. It’s also recommended to use low ESR capacitors for
CFLY, CRES and COUT in combination with short traces.
To prevent large variations at the VDD pin of the package it is recommended to add a decouple capacitor as
close to the pin as possible.
The output voltage noise can be suppressed using a small RF capacitor, will a value of e.g. 100 nF.
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PACKAGE OPTION ADDENDUM
www.ti.com
17-Nov-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Samples
(3)
(Requires Login)
LM7705MM/NOPB
ACTIVE
VSSOP
DGK
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
LM7705MME/NOPB
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
LM7705MMX/NOPB
ACTIVE
VSSOP
DGK
8
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Nov-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
LM7705MM/NOPB
VSSOP
DGK
8
LM7705MME/NOPB
VSSOP
DGK
LM7705MMX/NOPB
VSSOP
DGK
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
8
250
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
8
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Nov-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM7705MM/NOPB
VSSOP
DGK
8
1000
203.0
190.0
41.0
LM7705MME/NOPB
VSSOP
DGK
8
250
203.0
190.0
41.0
LM7705MMX/NOPB
VSSOP
DGK
8
3500
349.0
337.0
45.0
Pack Materials-Page 2
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