BAL-NRF02D3 50 ohm nominal input / conjugate match balun to nRF51822CEAA/CDAB/CFAC and nRF51422-CEAA/CDAB/CFAC Datasheet - production data Description STMicroelectronics BAL-NRF02D3 is an ultraminiature balun. The BAL-NRF02D3 integrates matching network and harmonics filter. Matching impedance has been customized for the following Nordic Semiconductor circuits: nRF51422-CEAA, nRF51422-CDAB, nRF51422CFAC and nRF51822-CEAA, nRF51822-CDAB, nRF51822-CFAC. Flip-Chip (5 bumps) package The BAL-NRF02D3 uses STMicroelectronics IPD technology on non-conductive glass substrate which optimize RF performances. Features 50 Ω nominal input / conjugate match to Nordic Semiconductor chips nRF51422CEAA, nRF51422-CDAB, nRF51422-CFAC and nRF51822-CEAA, nRF51822-CDAB, nRF51822-CFAC Low insertion loss Low amplitude imbalance Low phase imbalance Small footprint: < 1.2 mm2 The BAL-NRF02D3 has been tested and approved by Nordic Semiconductor in the nRFgo modules. Figure 1: Pin coordinates Benefits Very low profile < 560 μm after reflow High RF performances RF BOM and area reduction Applications 2.45 GHz impedance matched balun filter Optimized for Nordic's chip set nRF51422CEAA, nRF51422-CDAB, nRF51422-CFAC and nRF51822-CEAA, nRF51822-CDAB, nRF51822-CFAC December 2016 DocID024794 Rev 6 This is information on a product in full production. 1/11 www.st.com Application 1 BAL-NRF02D3 Application Figure 2: Application schematic C1 12pF C2 X1 16MHz 12pF P0.29 P0.28 P0.27 P0.26 P0.25 P0.24 P0.23 P0.22 P0.21 C8 100nF C7 B7 A8 A7 C5 A6 B6 B5 A5 A4 A3 A2 VCC_nRF VCC_nRF AVDD VSS VSS VSS ANT2 ANT1 VDD_PA DEC2 P0.20 P0.19 P0.18 P0.17 P0.08 P0.09 P0.10 P0.11 P0.12 P0.13 P0.14 P0.15 P0.16 SWDIO SWDCLK B1 B4 J8 J7 H6 J6 J5 H5 H4 J4 J3 J2 H2 C8 H3 C11 100nF VDD DCC P0.30 P0.31 P0.00 P0.01 P0.02 P0.03 P0.04 P0.05 P0.06 P0.07 VDD VSS VSS P0.08 P0.09 P0.10 P0.11 P0.12 P0.13 P0.14 P0.15 P0.16 SWDIO/nRESET SWDCLK VSS VSS C7 100nF P0.30 P0.31 P0.00 P0.01 P0.02 P0.03 P0.04 P0.05 P0.06 P0.07 B8 B9 D8 E8 C9 E9 D9 F9 F8 H9 G8 H7 H8 P0.29 P0.28 P0.27 P0.26 P0.25 P0.24 P0.23 P0.22 P0.21 DEC1 XC2 XC1 VCC_nRF C9 1.0nF 2/11 A1 G6 G9 D7 C1 D1 E1 F1 G1 F2 H1 G2 B1 B3 A3 A2 P0.20 P0.19 P0.18 P0.17 BAL-NRF02D3 C10 47nF U1 nRF51822-CEAA R1 12k DocID024794 Rev 6 ANT2 SE ANT1 VDD_PA GND C3 2.2nF A1 RF B1 BAL-NRF02D3 2 Characteristics Characteristics Table 1: Absolute ratings (limiting values) Value Symbol Parameter Unit Min. PIN Typ. Max. - 20 Input power RFIN ESD ratings human body model (JESD22-A114-C), all I/O one at a time while others connected to GND 2000 - ESD ratings charge device model (JESD22-C101-C) 500 - ESD ratings machine model, all I/O 200 - TOP Operating temperature (JESD22-A115-C), all I/O -40 - Tstg Storage temperature range VESD 55°C dBm V +105 °C +150 °C Table 2: Impedances (Tamb = 25 °C) Value Symbol ZOUT ZIN Parameter Unit Min. Typ. Max. Nominal differential output impedance - matched - Ω Nominal input impedance - 50 - Ω Table 3: RF performances (Tamb = 25 °C) Value Symbol Parameter Unit Min. Typ. f Frequency range (bandwidth) IL Insertion loss in bandwidth 1.9 dB Return loss in bandwidth 12 dB φimb Phase imbalance 6 ° Aimb Amplitude imbalance 0.15 dB 10 dB 20 dB RL 2400 Max. 2f0 2nd harmonic S21 attenuation 4880 MHz 3f0 3rd harmonic S21 attenuation 7320 MHz DocID024794 Rev 6 44 2540 MHz 3/11 Characteristics 2.2 BAL-NRF02D3 On-board measurements Figure 3: Transmission (Tamb = 25 °C) Figure 4: Insertion loss (Tamb = 25 °C) dB -0 dB -0 -5 -0.5 -10 -1.0 -1.5 -15 -2.0 -20 -2.5 -25 F (GHz) F (GHz) -3.0 -30 0 1 2 3 4 6 5 7 2.41 2.42 2.40 8 Figure 5: Return loss on SE port (Tamb = 25 °C) dB -11 2.44 2.45 2.46 2.47 2.48 2.49 2.50 Figure 6: Return loss on DIFF port (Tamb = 25 °C) -15.0 -10 2.43 dB -17.5 -12 -20.0 -13 -22.5 -14 F (GHz) F (GHz) -25.0 -15 2.41 2.42 2.40 2.43 2.44 2.45 2.46 2.47 2.48 2.49 2.50 2.40 Figure 7: Amplitude imbalance (Tamb = 25 °C) 0.5 2.43 2.44 2.45 2.46 2.47 2.48 2.49 2.50 15.0 Degrees 12.5 0.4 10.0 0.3 7.5 5.0 2.5 0.0 -2.5 -5.0 -7.5 -10.0 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 2.41 2.42 2.43 2.44 2.45 2.46 2.47 2.48 2.49 F (GHz) -7.5 -15.0 F (GHz) -0.5 4/11 2.42 Figure 8: Phase imbalance (Tamb = 25 °C) dB 2.40 2.41 2.50 DocID024794 Rev 6 2.40 2.41 2.42 2.43 2.44 2.45 2.46 2.47 2.48 2.49 2.50 BAL-NRF02D3 Characteristics Table 4: Compatibility matrix (nRF51422) nRF51422 IC revision Packet/variant Build code 1 CEAA A0A 2 CEAA Bx0 CDAB Ax0 CEAA Cx0 CFAC Ax0 3 Table 5: Compatibility matrix (nRF51822) nRF51822 IC revision Packet/variant Build code CEAA BA CEAA B0 CEAA CA0 CEAA DA0 CEAA Dx0 CDAB Ax0 CEAA Ex0 CFAC Ax0 1 2 3 DocID024794 Rev 6 5/11 Package information 3 BAL-NRF02D3 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 3.1 Epoxy meets UL94, V0 Lead-free package Flip-Chip 5 bumps package information Figure 9: Flip-Chip 5 bumps package outline 6/11 DocID024794 Rev 6 Package information BAL-NRF02D3 Figure 10: Recommended land pattern Figure 11: PCB stack-up recommendation 35um 230um 35um 9 30um 35um 230um 35um DocID024794 Rev 6 7/11 Package information 3.2 BAL-NRF02D3 Flip-chip 5 bumps packing information Figure 12: Marking Dot, ST logo ECOPACK grade xx = marking z = manufacturing location yww = datecode x x z y ww Figure 13: Flip Chip tape and reel specifications More packing information is available in the application note: 8/11 AN2348 Flip-Chip: “Package description and recommendations for use” AN4315: “BAL-NRF02D3 matched balun with integrated harmonics filter for Nordic Semiconductor ultralow power transceivers” DocID024794 Rev 6 Package information BAL-NRF02D3 Figure 14: Footprint - 3 mils stencil -non solder mask defined Figure 15: Footprint - 3 mils stencil - solder mask defined Copper pad diameter: 220 µm recommended 180 µm minimum 260 µm maximum Solder mask opening: 220 µm recommended 180 µm minimum 260 µm maximum Solder mask opening: 320 µm recommended 300 µm minimum 340 µm maximum Copper pad diameter: 320 µm recommended 300 µm minimum Solder stencil opening: 220 µm recommended Solder stencil opening: 220 µm recommended Figure 16: Footprint - 5 mils stencil -non solder mask defined Figure 17: Footprint - 5 mils stencil - solder mask defined Copper pad diameter: 220 µm recommended 180 µm minimum 260 µm maximum Solder mask opening: 220 µm recommended 180 µm minimum 260 µm maximum Solder mask opening: 320 µm recommended 300 µm minimum 340 µm maximum Copper pad diameter: 320 µm recommended 300 µm minimum Solder stencil opening: 330 µm recommended* Solder stencil opening: 330 µm recommended* *depending on paste, it can go down to 270 µm *depending on paste, it can go down to 270 µm DocID024794 Rev 6 9/11 Ordering information 4 BAL-NRF02D3 Ordering information Table 6: Ordering information 5 Order code Marking Package Weight Base qty. Delivery mode BAL-NRF02D3 SK Flip-Chip 5 bumps 1.58 mg 5000 Tape and reel Revision history Table 7: Document revision history 10/11 Date Revision Changes 02-Jul-2013 1 Initial release. 30-Aug-2013 2 Updated Table 1. 13-Oct-2014 3 Updated Figure 9. 25-Mar-2015 4 Updated cover page, added Table 4 and Table 5. 15-Jun-2015 5 Updated Table 1. 07-Dec-2016 6 Updated Table 1: "Absolute ratings (limiting values)". DocID024794 Rev 6 BAL-NRF02D3 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved DocID024794 Rev 6 11/11