TI LMP8480MMX-S/NOPB Precision 76v high-side current sense amplifiers with voltage output Datasheet

LMP8480, LMP8481
www.ti.com
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
LMP8480 / LMP8481 Precision 76V High-Side Current Sense Amplifiers with Voltage
Output
Check for Samples: LMP8480, LMP8481
FEATURES
1
•
•
•
•
•
•
•
•
•
•
•
•
•
2
Typical values, TA = 25°C
Bi-Directional or Uni-Directional Sensing
Common Mode Voltage Range 4.0V to 76V
Supply Voltage Range 4.5V to 76V
Fixed Gains 20, 50, 60 and 100 V/V
Gain Accuracy ±0.1%
Offset ±80µV
Bandwidth (-3dB) 270KHz
Quiescent Current <100µA
Buffered High-Current Output >5mA
Input Bias Current 7µA
PSRR (DC) 122dB
CMRR (DC) 124dB
•
•
Temperature Range -40 to +125°C
MSOP-8 or LLP-8 Packages
APPLICATIONS
•
•
•
•
•
•
•
High-side current sense
Vehicle current measurement
Telecommunications
Motor controls
Laser or LED Drivers
Energy Management
Solar Panel Monitoring
DESCRIPTION
The LMP8480 and LMP8481 are precision high-side current sense amplifiers that amplify a small differential
voltage developed across a current sense resistor in the presence of high input common-mode voltages.
These amplifiers are designed for bidirectional (LMP8481) or unidirectional (LMP8480) current applications and
will accept input signals with common-mode voltage range from 4V to 76V with a bandwidth of 270 kHz.
Since the operating power supply range overlaps the input common mode voltage range, the LMP848x can be
powered by the same voltage that is being monitored. This benefit eliminates the need for an intermediate supply
voltage to be routed to the point of load where the current is being monitored, resulting in reduced component
count and board space.
The LMP848x family consists of fixed gains of 20, 50, 60 and 100 for applications that demand high accuracy
over temperature. The low input offset voltage allows the use of smaller sense resistors without sacrificing
system error.
The wide operating temperature range of -40C to 125C makes the LMP848x an ideal choice for automotive,
telecommunications, industrial, and consumer applications.
The LMP8480 and LMP8481 are pin for pin replacements for the MAX4080 and MAX4081, offering improved
offset voltage, wider reference adjust range and higher output drive capabilities.
The LMP8480 and LMP8481 are available in a 8-pin MSOP package and the LMP8481 is also available in a
8–pad LLP.
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2012, Texas Instruments Incorporated
LMP8480, LMP8481
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
www.ti.com
Typical Application
To Load
ISENSE
VCC = +4.5V to +76V
C1
0.1 PF
RSENSE
RSN
LMP8481
VSENSE
GND
VOUT
VIN+
REFA
REFB
RSP
ADC
VIN-
VREF
LM4140ACM-1.2
C2
0.1 PF
Block Diagram
Figure 1. LMP8480 Block Diagram
RSENSE
4.0V < VIN < 76V
+IN
IL
-IN
+
L
o
a
d
LMP8480
VSENSE
RGP
VCC
4.5V < VCC < 76V
Internal
14V LDO
Regulator
VCM
SENSE
+
Difference
Amplifier
(x5)
RGN
2 M:
-
+
VOUT
100 k:
V to I
Converter
1.95 M:
100 k:
400 k:
400 k:
V5()¶
GND
2
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
LMP8480, LMP8481
www.ti.com
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
Figure 2. LMP8481 Block Diagram
RSENSE
4.0V < VIN < 76V
+IN
IL
-IN
+
L
o
a
d
LMP8481
VSENSE
VCM
SENSE
RGP
VCC
4.5V < VCC < 76V
Difference
Amplifier
(x5)
Internal
14V LDO
Regulator
+
RGN
2 M:
-
VOUT
+
100 k:
V to I
Converter
VREFA
1.95 M:
100 k:
VREFB
400 k:
400 k:
V5()¶
GND
Connection Diagram
LMP8480 8-Pin MSOP
RSP
1
8
RSN
VCC
2
7
NC
NC
3
6
NC
GND
4
5
VOUT
LMP8480
Figure 3. Top View
LMP8480 8-Pad LLP
RSP
1
VCC
2
NC
3
GND
4
LMP
8480
8
RSN
7
NC
6
NC
5
VOUT
Figure 4. Top View
LMP8481 8-Pin MSOP
RSP
1
8
RSN
VCC
2
7
REFA
NC
3
6
REFB
GND
4
5
VOUT
LMP8481
Figure 5. Top View
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
3
LMP8480, LMP8481
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
www.ti.com
LMP8481 8-Pad LLP
RSP
1
8
RSN
VCC
2
7
VREFA
NC
3
6
VREFB
GND
4
5
VOUT
LMP
8481
Figure 6. Top View
Table 1. Pin Descriptions
Pin
Name
Description
1
RSP
Positive current sense input
2
VCC
Positive supply voltage
3
NC
No Connection – Not internally Connected.
4
GND
Ground
5
VOUT
Output
6
NC or REFA
LMP8480: No Connection
LMP8481: Reference Voltage “B” Input
7
NC or REFB
LMP8480: No Connection
LMP8481: Reference Voltage “A” Input
8
RSN
Negative current sense input
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)
Over operating free-air temperature range (unless otherwise noted).
LMP8480, LMP8481
UNIT
Supply Voltage (VCC to GND)
-0.3 to +85
V
RSP or RSN to GND
-0.3 to +85
V
VOUT to GND
-0.3 to the lesser of (VCC + 0.3) or +20
V
Other VREF pin tied to ground
-0.3 to +12
V
Applied to both VREF Pins tied together
-0.3 to +6
V
±85
V
VREF Pins
(LMP8481 Only)
Differential Input Voltage
(2)
Current into output pin
±20
Current into any other pins
±5
Operating Temperature
–40 to +125
°C
Storage Temperature
-65° to +150
°C
Junction Temperature
Package Thermal
Resistance (θJA)
ESD Ratings
(1)
(2)
4
(2)
mA
mA
+150
°C
MSOP-8
185
°C/W
LLP-8
70
°C/W
Human Body Model (HBM)
2000
V
Charged Device Model (CDM)
750
V
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test
conditions, see the Electrical Characteristics Tables.
When the input voltage (VIN) at any pin exceeds power supplies (VIN < GND or VIN > VS ), the current at that pin must not exceed
5mA, and the voltage (VIN) has to be within the Absolute Maximum Rating for that pin. The 20mA package input current rating limits the
number of pins that can safely exceed the power supplies with current flow to four pins.
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
LMP8480, LMP8481
www.ti.com
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
Recommended Operating Ratings
Expected normal operating conditions over free-air temperature range (unless otherwise noted).
LMP8480, LMP8481
Supply Voltage (VCC)
+4.5V to +76
Common Mode Voltage
+4.0V to +76
Differential Input Voltage (VSENSE)
±667
Reference Input
(LMP8481 Only)
UNIT
V
V
mV
VREFA and VREFB tied together
-0.3 to the lesser of (VCC - 1.5) or +6
V
Single VREF pin with other VREF pin grounded
-0.3 to +12, or where the average of the two VREF
pins is less than the lesser of (VCC - 1.5) or +6
V
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
5
LMP8480, LMP8481
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
Electrical Characteristics
www.ti.com
(1)
Unless otherwise specified, all limits guaranteed for at TA = 25°C, VCC= +4.5V to +76V, +4.5V < VCM < +76V, RL= 100k,
VSENSE = (VRSP - VRSN) = 0V. Boldface limits apply at the temperature extremes, TMIN ≦ TA ≦ TMAX.
Min
Parameter
Input Offset Voltage (RTI)
Input Offset Voltage Drift
(4)
Input Bias Current
(5)
Input Leakage Current
Differential Input Voltage Across Sense
Resistor (6)
(2)
Condition
VOS
VCC = VRSP = 48V,
ΔVSENSE = 100mV
Ta= +25°C
±80
IB VCC = VRSP = 76V, Per Input
AV
Gain Error
VCC = 16
6.3
12
μA
2
μA
-F Version
267
-S Version
222
20
20.2
-F Version
49.6
50
50.4
-S Version
59.5
60
60.5
-H Version
99.2
100
100.8
±0.6
%
Ta= –40°C to +125°C
±0.8
%
Input Common Mode Voltage Range
CMVR CMRR > 100dB
100
122
dB
100
124
dB
124
4
dB
76
V
230
500
mV
VCC = VRSP = 48V, VSENSE = -1V,
IOUT (sinking) = 10µA
3
15
VCC = VRSP = 4.5V, VSENSE = -1V,
IOUT (sinking) = 10µA
3
VCC = VRSP = 48V, VSENSE = -1V,
IOUT (sinking) = 100µA
18
VCC = VRSP = 4.5V, VSENSE = -1V,
IOUT (sinking) = 100µA
18
ROUT VSENSE = 100mV
VOMIN
V/V
Ta= +25°C
DC VCC = 48V, VRSP = 4.5 to 76V
CMRR VCC = 48V, VRSP = 4 to 76V
Minimum Output Voltage
mV
133
19.8
DC Common Mode Rejection Ratio
VOMAX
µV
0.01
-T Version
VCC = VRSP = 48V
Units
μV/°C
667
DC Power Supply Rejection Ratio
Maximum Output Voltage
(Headroom)
(VOMAX = VCC – VOUT)
±265
-T Version
DC
V
= 48V, VCC = 4.5 to 76V
PSRR RSP
Output Resistance / Load Regulation
(2)
6
-H Version
Gain
Max
±900
ILEAK VCC = 0, VRSP = 76V, Both Inputs Together
MAX)
(3)
Ta= –40°C to +125°C
TCVOS
VSENSE(
Typ
0.1
VCC = 4.5V, VRSP = 48V, VSENSE = +1V
IOUT (sourcing) = 500μA
mV
55
Output voltage with load
VOLOAD
VCC=28V, VRSP=28V, VSENSE=600mV, IOUT
(sourcing)=500uA
12
V
Output Load Regulation
VOLREG
VCC = 20, VRSP = 16, VOUT =12, ΔIL= 200na
to 8mA
0.001
%
Supply Current
ICC VOUT=2V, RL = 10M, VCC= VRSP = 76V
88
−3 dB Bandwidth
BW RL= 10M, CL = 20pF
270
(1)
(2)
(3)
(4)
(5)
(6)
6
155
uA
kHz
Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very
limited self-heating of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under
conditions of internal self-heating where TJ > TA.
All limits are guaranteed by testing, design, or statistical analysis.
Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and
will also depend on the application and configuration. The typical values are not tested and are not guaranteed on shipped production
material.
Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature
change.
Positive Bias Current corresponds to current flowing into the device.
This parameter is guaranteed by design and/or characterization and is not tested in production.
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
LMP8480, LMP8481
www.ti.com
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
Electrical Characteristics (1) (continued)
Unless otherwise specified, all limits guaranteed for at TA = 25°C, VCC= +4.5V to +76V, +4.5V < VCM < +76V, RL= 100k,
VSENSE = (VRSP - VRSN) = 0V. Boldface limits apply at the temperature extremes, TMIN ≦ TA ≦ TMAX.
Min
Parameter
Slew Rate
(7)
Input Referred Voltage Noise
Output Settling Time to 1% of Final Value
Power-up Time
Saturation Recovery Time
SR
(7)
VSENSE from 10mV to 80mV, RL=10M,
CL=20pF
tSETTLE
tPU
tRECOVE
Typ
(3)
Max
(2)
1
eni f = 1 kHz
RY
Max Output Capacitance Load
(2)
Condition
95
Units
V/µs
nV/
VSENSE = 10mV to 100mV and 100mV to
10mV,
20
µs
VCC = VRSP = 48V, VSENSE = 100mV, output
to 1% of final value
50
µs
Output settles to 1% of final value, the device
will not experience phase reversal when
overdriven.
50
µs
500
pF
CLOAD No sustained oscillations
The number specified is the average of rising and falling slew rates and measured at 90% to 10%.
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
7
LMP8480, LMP8481
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
www.ti.com
Typical Performance Characteristics
Unless otherwise specified, TA = 25°C, VCC= 4.5V to 76V, 4.5V < VCM < 76V, RL= 100k, VSENSE = (VRSP – VRSN) = 0V, for all
gain options.
Typical Offset Voltage
vs.
Temperature
Offset Voltage Histogram
60
INPUT OFFSET VOLTAGE ( V)
50
PERCENTAGE (%)
50
40
30
20
10
0
-50 -40 -30 -20 -10 0
10
0
-10
-20
-30
-40
-50
INPUT OFFSET VOLTAGE ( V)
-50
0
25 50 75
TEMPERATURE (°C)
Typical Gain Accuracy
vs.
Temperature
Typical Gain Accuracy vs. Supply Voltage
-25
100 125
VRSP= 48V
0.4
VCC= VRSP= 48V
0.3
GAIN ACCURACY (%)
GAIN ACCURACY (%)
20
0.5
0.4
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
0.3
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.5
-50
-25
0
25 50 75
TEMPERATURE (°C)
100 125
0
Typical Offset Voltage
vs.
Supply Voltage
10
20 30 40 50 60
SUPPLY VOLTAGE (V)
70
80
AC Common-Mode Rejection Ratio
vs.
Frequency
-40
100
VRSP= 48V
80
ûVCM = 2Vpp
-50
60
-60
40
CMRR (dB)
INPUT OFFSET ( V)
VCC= VRSP= 48V
30
10 20 30 40 50
0.5
20
0
-20
-40
-70
-80
-90
-100
-60
-110
-80
-100
-120
0
8
40
10
20 30 40 50 60
SUPPLY VOLTAGE (V)
70
80
Submit Documentation Feedback
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
LMP8480, LMP8481
www.ti.com
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
Typical Performance Characteristics (continued)
Unless otherwise specified, TA = 25°C, VCC= 4.5V to 76V, 4.5V < VCM < 76V, RL= 100k, VSENSE = (VRSP – VRSN) = 0V, for all
gain options.
Small Signal Gain
vs.
Frequency
-40
50
-50
45
VOUT= 100mVpp
-60
40
LMP8480-S
-70
35
GAIN (dB)
PSRR (dB)
AC Power Supply Rejection Ratio
vs.
Frequency
-80
-90
-100
30
25
20
-110
15
-120
10
-130
5
-140
0
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
100
0.08
3
0.06
2
0.04
1
0
-1
0.02
0.00
-0.02
-2
-0.04
-3
-0.06
-4
-0.08
0
20 40 60 80 100 120 140 160 180 200
TIME ( s)
0 20 40 60 80 100120140160180200
TIME ( s)
Supply Current
vs.
Supply Voltage
Supply Current
vs.
Temperature
115
100
VRSP= 48V
110
SUPPLY CURRENT ( A)
SUPPLY CURRENT ( A)
1M
Small Signal Pulse Response
4
OUTPUT (V)
OUTPUT (V)
Large Signal Pulse Response
1k
10k
100k
FREQUENCY (Hz)
95
90
85
80
VCC= VRSP= 48V
105
100
95
90
85
75
80
0
10
20 30 40 50 60
SUPPLY VOLTAGE (V)
70
80
-50
-25
0
25 50 75
TEMPERATURE (°C)
100 125
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
9
LMP8480, LMP8481
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
www.ti.com
Typical Performance Characteristics (continued)
Unless otherwise specified, TA = 25°C, VCC= 4.5V to 76V, 4.5V < VCM < 76V, RL= 100k, VSENSE = (VRSP – VRSN) = 0V, for all
gain options.
Saturated Output Sourcing Current at 4.5V
Saturated Output Sinking Current at 4.5V
10
10
VCC= 5V
VCC= 5V
1
VOUT (V)
VCC - VOUT (V)
1
.1
.01
.01
-40°C
+25°C
+85°C
+125°C
.001
.1
-40°C
+25°C
+85°C
+125°C
.001
.01
.1
1
SOURCING CURRENT (mA)
10
Saturated Output Sourcing Current at 12V
.01
10
Saturated Output Current Sinking at 12V
10
10
VCC= 12V
VCC= 12V
1
VOUT (V)
1
VCC - VOUT (V)
.1
1
SINKING CURRENT (mA)
.1
.01
.01
-40°C
+25°C
+85°C
+125°C
.001
.01
.1
1
SOURCING CURRENT (mA)
.1
-40°C
+25°C
+85°C
+125°C
.001
10
.01
.1
1
SINKING CURRENT (mA)
10
Application Information
LMP8480 AND LMP8481 INTRODUCTION
The LMP8480 and LMP8481 are single supply, high side current sense amplifiers with available fixed gains of
x20, x50, x60 and x100. The power supply range is 4.5V to 76V, while the common mode input voltage range is
capable of 4.0V to 76V operation. The supply voltage and common mode range are completely independent of
each other. This makes the LMP848x supply voltage extremely flexible, as the LMP848x's supply voltage can be
greater than, equal to, or less than the load source voltage, and allowing the device to be powered from the
system supply or the load supply voltage.
The amplifier supply voltage does not have to be larger than the load source voltage. A 76V load source voltage
with a 5V LMP8481 supply voltage is perfectly acceptable.
THEORY OF OPERATION
The LMP8480 and LMP8481 are comprised of two main stages. The first stage is a differential input current to
voltage converter, followed by a differential voltage amplifier and level-shifting output stage. Also present is an
internal 14 Volt Low Dropout Regulator (LDO) to power the amplifiers and output stage, as well as a reference
divider resistor string to allow the setting of the reference level.
As seen in Figure 7, the current flowing through RSENSE develops a voltage drop called VSENSE. The voltage
across the sense resistor, VSENSE, is then applied to the input RSP and RSN pins of the amplifier.
10
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
LMP8480, LMP8481
www.ti.com
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
RSENSE
4.0V < VIN < 76V
+IN
IL
-IN
+
L
o
a
d
LMP8481
VSENSE
VCM
SENSE
RGP
Internal
14V LDO
Regulator
VCC
4.5V < VCC < 76V
+
Difference
Amplifier
(x5)
RGN
2 M:
-
VOUT
+
100 k:
V to I
Converter
VREFA
1.95 M:
100 k:
VREFB
400 k:
400 k:
V5()¶
GND
Figure 7. LMP8481 Functional Diagram
Internally, the voltage on each input pin is converted to a current by the internal precision thin-film input resistors
RGP and RGN . A second set of much higher value VCM sense resistors between the inputs provide a sample of
the input common mode voltage for internal use by the differential amplifier.
VSENSE is applied to the differential amplifier through RGP and RGN. These resistors change the input voltage to a
differential current. The differential amplifier then servos the resistor currents through the MOSFETs to maintain
a zero balance across the differential amplifier inputs.
With no input signal present, the currents in RGP and RGN are equal. When a signal is applied to VSENSE, the
current through RGP and RGN are imbalanced and are no longer equal. The amplifier then servos the MOSFETS
to correct this current imbalance, and the extra current required to balance the input currents is then reflected
down into the two lower 400kΩ “tail” resistors. The difference in the currents into the tail resistors is therefore
proportional to the amplitude and polarity of VSENSE. The tail resistors, being larger than the input resistors for the
same current, then provide voltage gain by changing the current into a proportionally larger voltage. The gain of
the first stage is then set by the tail resistor value divided by RG value.
The differential amplifier stage then samples the voltage difference across the two 400K tail resistors and also
applies a further gain-of-five and output level-shifting according to the applied reference voltage (VREF).
The resulting output of the amplifier will be equal to the differential input voltage times the gain of the device, plus
any voltage value applied to the two VREF pins.
The resistor values in the schematic are ideal values for clarity and understanding. The table below shows the
actual values used that account for parallel combinations and loading. This table can be used for calculating the
effects of any additional external resistance.
Table 2. Actual Internal Resistor Values
Gain Option
RGP and RGN
(each)
RVCMSENSE
(each)
RTAIL
(each)
Differential Amp FB
(each)
VREFx Resistors
(each)
20x
98.38k
491.9k
393.52k
1967.6k
98.38k
50x
39.352k
196.76k
393.52k
1967.6k
98.38k
60x
32.793k
172.165k
393.52k
1967.6k
98.38k
100x
19.676k
98.38k
393.52k
1967.6k
98.38k
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
11
LMP8480, LMP8481
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
www.ti.com
UNI-DIRECTIONAL VS. BI-DIRECTIONAL OPERATION
Uni-directional operation is where the load current only flows in one direction (VSENSE is always positive).
Application examples would be PA monitoring, non-inductive load monitoring and laser or LED drivers. This
allows the output zero reference to be true zero volts on the output. The LMP8480 is designed for unidirectional
applications where the setting of VREF is not required. See the UNI-DIRECTIONAL OPERATION for more
details.
Bi-directional operation is where the load current can flow in both directions (VSENSE can be positive or
negative). Application examples would be battery charging or regenerative motor monitoring. The LMP8481 is
designed for bidirectional applications and has a pair of VREF pins to allow the setting of the output zero
reference level (VREF). See the BI-DIRECTIONAL OPERATION (LMP8481 ONLY) section for more details.
UNI-DIRECTIONAL OPERATION
The LMP8480 is designed for unidirectional current sense applications. The output of the amplifier will be equal
to the differential input voltage times the fixed device gain.
+4.0V
to
+76V
ISENSE
To Load
VCC = +4.5V to +76V
C1
0.1 PF
RSENSE
RSN
VSENSE
VCC
LMP8480
RSP
VOUT
VIN+
ADC
GND
VIN- VREF
Figure 8. Uni-Directional Application with LMP8480
14
12
VCC> 14V
VOUT (V)
10
8
6
4
2
0
0.0
0.1
0.2
0.3 0.4 0.5
VSENSE (V)
0.6
0.7
Figure 9. Uni-Directional Transfer Function for Gain-of-20 option
The output voltage can be calculated from:
VOUT = ( (VRSP – VRSN) * Av )
(1)
It should be noted that the minimum “zero” reading will be limited by the lower output swing and input offset.
The LMP8480 is functionally identical to the LMP8481, but with the VREFA and VREFB nodes grounded internally.
The LMP8481 can replace the LMP8480 if both the VREF inputs (pins 6 & 7) are grounded.
BI-DIRECTIONAL OPERATION (LMP8481 ONLY)
Bi-directional operation is required where the measured load current can be positive or negative. Because VSENSE
can be positive or negative, and the output cannot swing negative, the “zero” output level must be level-shifted
above ground to a known zero reference point. The LMP8481 allows for the setting this reference point.
12
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
LMP8480, LMP8481
www.ti.com
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
To Load
ISENSE
VCC = +4.5V to +76V
C1
0.1 PF
RSENSE
RSN
VSENSE
GND
VOUT
REFA
REFB
RSP
LMP8481
VIN+
ADC
VIN-
VREF
LM4140ACM-1.2
C2
0.1 PF
Figure 10. Bi-Directional current sensing using LMP8481
The VREFA and VREFB pins set the zero reference point. The output “zero” reference point is set by applying a
voltage to the REFA and/or REFB pins. See the BI-DIRECTIONAL OPERATION (LMP8481 ONLY) section
below. REFA AND REFB PINS (LMP8481 Only) below shows the output transfer function with a 1.2V reference
applied to the Gain-of-20 option
14
12
VCC> 14V
VOUT (V)
10
8
6
4
VREF= 1.2V
2
0
-0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
VSENSE (V)
Figure 11. Bi-Directional Transfer Function using 1.2V Reference Voltage
REFA AND REFB PINS (LMP8481 Only)
The voltage applied to the VREFA and VREFB pins controls the output zero reference level.
The reference inputs consist of a pair of divider resistors with equal values to a common summing point, VREF’,
as shown in Figure 16 below.
100 k:
VREFA
VREF¶
(6V Max)
100 k:
VREFB
Figure 12. VREF Input Resistor Network
VREF’ is the voltage at the resistor tap point that will be directly applied to the output as an offset.
VOUT = ( (VRSP – VRSN) * Av ) + VREF’
(2)
Where:
VREF’ = VREFA = VREFB (Equal Inputs)
OR
(3)
(4)
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
13
LMP8480, LMP8481
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
www.ti.com
VREF’ = ( VREFA + VREFB ) / 2 (Separate inputs)
(5)
100 k:
VREFA
VREF¶
VREF
2.5V
2.5V
100 k:
VREFB
Figure 13. Applying 1:1 Direct Reference Voltage
For mid-range operation VREFB should be tied to ground and VREFA can be tied to VS or an external A/D
reference voltage. The output will be set to one-half the reference voltage. For example, a 5V reference would
result in a 2.5V output “zero” reference.
100 k:
VREFA
5V
100 k:
VREFB
VREF¶
2.5V
Figure 14. Applying A Divided Reference Voltage.
VREF’ = (VREFA – VREFB) / 2
(6)
When the reference pins are biased at different voltages, the output will be referenced to the average of the two
applied voltages.
The reference pins should always be driven from clean, stable sources, such as A/D reference lines or clean
supply lines. Any noise or drifts on the reference inputs are directly reflected in the output. Care should be taken
if the power supply is used as the reference source so as to not introduce supply noise, drift or sags into the
measurement.
It is possible to set different resistor divider ratios by adding external resistors in series with the internal 100K
resistors, though the temperature coefficient (tempco) of the external resistors may not tightly track the internal
resistors and there will be slight errors over temperature.
REFERENCE INPUT VOLTAGE LIMITS
The maximum voltage on either reference input pin is limited to VCC or 12V, whichever is less.
The average voltage on the two VREF pins, and thus the actual output reference voltage level, is limited to a
maximum of 1.5V below VCC, or 6V, whichever is less. Beware that supply voltages of less than 7.5V will have a
diminishing VREF maximum.
Both VREFA and VREFB may both be grounded to provide a ground referenced output (thus functionally duplicating
the LMP8480).
It should be noted that there can be a dynamic error in the VREF to output level matching of up to 100µV/V.
Normally this is not an issue for fixed references, but if the reference voltage is dynamically adjusted during
operation, this error needs to be taken into account during calibration routines. This error will vary in both
amplitude and polarity part-to-part, but the slope will generally be linear.
SELECTION OF THE SENSE RESISTOR
The accuracy of the current measurement depends heavily on the accuracy of the shunt resistor RSENSE. Its
value depends on the application and is a compromise between small-signal accuracy, maximum permissible
voltage drop and allowable power dissipation in the current measurement circuit.
The use of a “4-terminal” or “Kelvin” sense resistor is highly recommended. See the ERROR SOURCES AND
LAYOUT CONSIDERATIONS below.
14
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
LMP8480, LMP8481
www.ti.com
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
For best results, the value of the resistor is calculated from the maximum expected load current ILMAX and the
expected maximum output swing VOUTMAX, plus a few percent of headroom. See the MAXIMUM OUTPUT
VOLTAGE section for details about the maximum output voltage limits.
High values of RSENSE provide better accuracy at lower currents by minimizing the effects of amplifier offset. Low
values of RSENSE minimize load voltage loss, but at the expense of accuracy at low currents. A compromise
between low current accuracy and load circuit losses must generally be made.
The maximum VSENSE voltage that must be generated across the RSENSE resistor will be:
VSENSE = VOUTMAX / AV.
(7)
Note: The maximum VSENSE voltage should be no more than 667mV.
From this maximum VSENSE voltage, the RSENSE value can be calculated from:
RSENSE = VSENSE / ILMAX
(8)
Care must be taken to not exceed the maximum power dissipation of the resistor. The maximum sense resistor
power dissipation will be:
PRSENSE = VSENSE * ILMAX
(9)
It is recommended that a 2-3x minimum safety margin be used in selecting the power rating of the resistor.
USING PCB TRACES AS SENSE RESISTORS
While it may be tempting to use a known length of PCB trace resistance as a sense resistor, it is not
recommended.
The tempco of copper is typically 3300-4000ppm/°K, which can vary over PCB process variations and require
measurement correction (possibly requiring ambient temperature measurements).
A typical surface mount sense resistor tempco is in the 50ppm to 500ppm/°C range offering more measurement
consistency and accuracy over the copper trace. Special low tempco resistors are available in the 0.1 to 50ppm
range, but at a higher cost.
INPUT COMMON MODE AND DIFFERENTIAL VOLTAGE RANGE
The input common mode range, where “common mode range” is defined as the voltage from ground to the
voltage on RSP input, should be in the range of +4.0V to +76V. Operation below 4.0V on either input pin will
introduce severe gain error and nonlinearities.
The maximum differential voltage (defined as the voltage difference between RSP and RSN) should be 667mV or
less. The theoretical maximum input is 700mV (14V / 20).
Taking the inputs below 4V will not damage the device, but the output conditions during this time are not
predictable and are not guaranteed.
If the load voltage (Vcm) is expected to fall below 4V as part of normal operation, preparations must be made for
invalid output levels during this time.
LOW SIDE CURRENT SENSING
The LMP8480 and LMP8481 are not recommended for low-side current sensing at ground level. The voltage on
either input pin must be a minimum of 4.0V above the ground pin for proper operation.
INPUT SERIES RESISTANCE
Because the input stage uses precision resistors to convert the voltage on the input pin to a current, any
resistance added in series with the input pins will change the gain. If a resistance is added in series with an
input, the gain of that input will not track that of the other input, causing a constant gain error.
It is not recommended to use external resistances to alter the gain, as external resistors will not have the same
thermal matching as the internal thin film resistors.
If resistors are purposely added for filtering, resistance should be added equally to both inputs and the user
should be aware that the gain will change slightly. See end of the THEORY OF OPERATION section for the
internal resistor values.
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
15
LMP8480, LMP8481
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
www.ti.com
MINIMUM OUTPUT VOLTAGE
The amplifier output cannot swing to exactly zero volts. There will always be a minimum output voltage set by the
output transistor saturation and input offset errors. This will create a minimum output swing around the zero
current reading due to the output saturation. The user should be aware of this when designing any servo loops or
data acquisition systems that may assume 0V = 0A. If a true zero is required, the LMP8481 should be used with
a VREF set slightly above ground (>50mV). See the SWINGING OUTPUT BELOW GROUND section below for a
possible solution to this issue.
SWINGING OUTPUT BELOW GROUND
If a negative supply is available, a pull-down resistor can be added from the output to the negative voltage to
allow the output to swing a few millivolts below ground. This will now allow the ADC to resolve true zero and
recover codes that would normally be lost to the negative output saturation limit.
VCC = +4.5V to +76V
C1
0.1 PF
RSN
VCC
LMP848x
RSP
GND
VOUT
VIN+
ADC
50 µA
RPD
VIN- VREF
-VS
RPD = -VS / 50 µA
Figure 15. Output “Pull-Down” Resistor Example
A minimum of 50µA should be sourced (“pulled”) from the output to a negative voltage. The pulldown resistor can
be calculated from:
RPD = –VS/50µA
(10)
For example, if a -5V supply is available, a pull-down resistor of 5V/50uA = 100K should be used. This will allow
the output to swing to about 10mV below ground.
This technique may also reduce the maximum positive swing voltage. Do not forget to include the parallel loading
effects of the pulldown any output load. It is recommended not to exceed -100mV on the output. Source currents
greater than 100uA should be avoided to prevent self-heating at high supply voltages. Pulldown resistor values
should not be so low as to heavily load the output during positive output excursions. This mode of operation is
not directly specified and is not guaranteed.
MAXIMUM OUTPUT VOLTAGE
The LMP8481 has an internal precision 14V low dropout regulator which limits the maximum amplifier output
swing to about 250mV below VCC or 13.7V (whichever is less). This effectively clamps the maximum output to
slightly less than 13.7V even with a VCC greater than 14V.
Care should be taken if the output is driving an A/D input with a maximum A/D maximum input voltage lower than
the amplifier supply voltage, as the output can swing higher than the planned load maximum due to input
transients or shorts on the load and overload or possibly damage the A/D input.
A resistive attenuator, as shown in Figure 16 below, can be used to match the maximum swing to the input range
of the A/D.
16
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
LMP8480, LMP8481
www.ti.com
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
+4.5V
to
+76V
ISENSE
To Load
VCC = +4.5V to +76V
C1
0.1 PF
RSENSE
RSN
VSENSE
VCC
LMP8480
RSP
VOUT
GND
R1
VIN+
ADC
VIN- VREF
R2
Figure 16. Typical Application with Resistive Divider
ERROR SOURCES AND LAYOUT CONSIDERATIONS
The traces leading to and from the sense resistor can be significant error sources. With small value sense
resistors (<100m), any trace resistance shared with the load current can cause significant errors.
Load Current Path
PCB
Source
Trace
PCB
Load
Trace
Kelvin Sense
Traces to
Amplifer
Sense Resistor
VSENSE
Figure 17. “Kelvin” or “4–wire” Connection to the Sense Resistor
The amplifier inputs should be directly connected to the sense resistor pads using “Kelvin” or “4-wire” connection
techniques. The traces should be one continuous piece of copper from the sense resistor pad to the amplifier
input pin pad, and ideally on the same copper layer with minimal vias or connectors. This can be important
around the sense resistor if it is generating any significant heat gradients.
To minimize noise pickup and thermal errors, the input traces should be treated as a differential signal pair and
routed tightly together with a direct path to the input pins. The input traces should be run away from noise
sources, such as digital lines, switching supplies or motor drive lines. Remember that these traces can contain
high voltage, and should have the appropriate trace routing clearances.
Since the sense traces only carry the amplifier bias current (about 7µA at room temp), the connecting input
traces can be thinner, signal level traces. Excessive Resistance in the trace should also be avoided.
The paths of the traces should be identical, including connectors and vias, so that these errors will be equal and
cancel.
The sense resistor will heat up as the load increases. As the resistor heats up, the resistance generally goes up,
which will cause a change in the readings The sense resistor should have as much heatsinking as possible to
remove this heat through the use of heatsinks or large copper areas coupled to the resistor pads. A reading
drifting over time after turn-on can usually be traced back to sense resistor heating.
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
17
LMP8480, LMP8481
SNVS829A – JUNE 2012 – REVISED AUGUST 2012
www.ti.com
POWER SUPPLY DECOUPLING
In order to decouple the LMP8480/81 from AC noise on the power supply, it is recommended to use a 0.1 μF
bypass capacitor between the VCC and GND pins. This capacitor should be placed as close as possible to the
supply pins. In some cases an additional 10 μF bypass capacitor may further reduce the supply noise.
Do not forget that these bypass capacitors must be rated for the full supply and/or load source voltage! It is
recommended that the working voltage of the capacitor (WVDC) should be at least two times the maximum
expected circuit voltage.
LLP DIE ATTACH PAD
The bottom thermal pad of the LLP package should be tied to the same ground as the ground pin. Be aware that
noise on this pad can couple into the bottom of the die, so the ground should be as clean as possible.
18
Submit Documentation Feedback
Copyright © 2012, Texas Instruments Incorporated
Product Folder Links: LMP8480 LMP8481
PACKAGE OPTION ADDENDUM
www.ti.com
8-Mar-2013
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package Qty
Drawing
Eco Plan
Lead/Ball Finish
(2)
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
(3)
(4)
LMP8480MM-T/NOPB
ACTIVE
VSSOP
DGK
8
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
AV8A
LMP8480MME-S/NOPB
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
AY8A
LMP8480MME-T/NOPB
ACTIVE
VSSOP
DGK
8
250
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
AV8A
LMP8480MMX-S/NOPB
ACTIVE
VSSOP
DGK
8
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
AY8A
LMP8480MMX-T/NOPB
ACTIVE
VSSOP
DGK
8
3500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
AV8A
LMP8481MM-S/NOPB
PREVIEW
VSSOP
DGK
8
TBD
Call TI
Call TI
-40 to 125
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Only one of markings shown within the brackets will appear on the physical device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
8-Mar-2013
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Mar-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LMP8480MM-T/NOPB
VSSOP
DGK
8
1000
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMP8480MME-S/NOPB
VSSOP
DGK
8
250
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMP8480MME-T/NOPB
VSSOP
DGK
8
250
178.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMP8480MMX-S/NOPB
VSSOP
DGK
8
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
LMP8480MMX-T/NOPB
VSSOP
DGK
8
3500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Mar-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LMP8480MM-T/NOPB
VSSOP
DGK
8
1000
203.0
190.0
41.0
LMP8480MME-S/NOPB
VSSOP
DGK
8
250
203.0
190.0
41.0
LMP8480MME-T/NOPB
VSSOP
DGK
8
250
203.0
190.0
41.0
LMP8480MMX-S/NOPB
VSSOP
DGK
8
3500
349.0
337.0
45.0
LMP8480MMX-T/NOPB
VSSOP
DGK
8
3500
349.0
337.0
45.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
Automotive and Transportation
www.ti.com/automotive
Amplifiers
amplifier.ti.com
Communications and Telecom
www.ti.com/communications
Data Converters
dataconverter.ti.com
Computers and Peripherals
www.ti.com/computers
DLP® Products
www.dlp.com
Consumer Electronics
www.ti.com/consumer-apps
DSP
dsp.ti.com
Energy and Lighting
www.ti.com/energy
Clocks and Timers
www.ti.com/clocks
Industrial
www.ti.com/industrial
Interface
interface.ti.com
Medical
www.ti.com/medical
Logic
logic.ti.com
Security
www.ti.com/security
Power Mgmt
power.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Microcontrollers
microcontroller.ti.com
Video and Imaging
www.ti.com/video
RFID
www.ti-rfid.com
OMAP Applications Processors
www.ti.com/omap
TI E2E Community
e2e.ti.com
Wireless Connectivity
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated
Similar pages