AN022 High Side Driver for Buck Converter with an LDO Introduction And it works well at low input voltages. For example, a 2.5V input, which comes from the output of AIC1630A, Most boost converters have been applied to step-up can be converted into an output of 1.8V. Due to the voltage applications, such as the PDA, N/B PC, cellular ultra-low dropout voltage, the power dissipation is phone, palmtop computer, GPS, camcorder, portable much lower than the general LDO’s. DVD, toy, and DSC, to elevate a low voltage to a high voltage to provide low quiescent current and high efficiency regulator in the recent years. Yet, technically, Principle of operation the boost converter does not supply applications of The principle of energy storage in the inductor L can be high loading current today. Also, the LDO usually can applied to the buck converter. And the inductor energy not transform to a relatively high energy. then is to be transferred to the output via the schootky diode D. When the switch is on, the diode is used as a AIC1630A is not only a boost converter but also an reverse biased and the inductor current will ramp up. application of step-down and a low-dropout function. When the switch is off, the inductor reverses its polarity The circuit, shown as Fig. 1, can step down from 5V or with a switch current to maintain output voltage. 12V to as low as 2.5V, 1.8V and 1.25V with 80% efficiencies. A linear controller can be implemented by using the pin 6 and 7 of AIC1630A, as shown Fig. 1. 1. AIC1630A driving P-MOSFET L1 U4 5V— 12V + C1 820µF R1 1.8K R2 270 CEM4435 U3 D2 1N5820 47µH + C3 1500µF D1 D3 5.1V 2N2222 1N4148 1 0.1µF C5 U2 2N2222 2 C4 680P 36K R3 3 4 U1 EXT VOUT 8 7 LBI LBO 6 GND FB 5 SD VIN 2.5V R9 1M U5 D45H2A R8 2.2 1.8V R4 R6 C6 62K 820PF 9.1K AIC1630A R5 20K + C2 470µF R7 20K Fig. 1 AIC1630A+LDO for P-MOSFET Circuit February, 2002 1 AN022 A boost-switching regulator with the addition of two gate polarity will be high and U4 will be turned off, due external switching transistors is considered as a buck to the input voltage delivered to gate polarity via U3 converter, shown in Fig. 1. Via EXT (pin3), the internal transistor. The rising time of gate signal is much longer switch of AIC1630A, drives the transistor (U2). When when U3 and D1 are not considered. See Fig. 2 and 3 U2 is set on, the gate polarity of U4 (P-MOS) will be for the difference. low and U4 will be turned on. When U2 is off, the U4 . Fig. 2 Gate Signal of P-MOS Fig. 3 Gate Signal of P-MOS CISS capacitor of MOSFET results in the gate signal in Fig. 3. The use of U3 and D1 can reduce the influence of CISS on the boost-switching regulator. 2. AIC1630A Driving N-MOSFET 5V--12V D1 + R11 1.8K 470µF C1 1N5819 D4 5.1V L1 D2 40µH 1N5820 Q4 CEB6030 C7 1µF D3 1N5819 + C5 C6 0.1µF Q1 2N2222 Q2 2N2907 Q5 R12 9.1K 2N2222 2N2222 R3 2K R2 2K Q3 C3 1000µF 2.5V R9 1M U5 D45H2A 100µF R1 2K + R13 1 SD 2 VIN 3 EXT 4 GND U1 VOUT LBI LBO FB 8 R8 2.2 1.8V C4 7 6 R4 820P 62K R6 9.1K 5 AIC1630A 2K R10 2K R5 20K + C2 470µF R7 20K Fig. 4 AIC1630A+LDO for N-MOSFET Circuit 2 AN022 AIC1630A with the addition of four external switching N-channel circuit play important roles in the application transistors is considered as a buck converter, shown in of AIC1630A and LDO with N-MOSFET circuit. Fig. drives 4. Via EXT (pin3), the internal switching of IC fast driving N-channel circuit, which is 3. Bootstrapped Function composed of Q1, Q2, Q3, and Q5. Bootstrapping circuit (composed of D1, D3, C5 and C7) can provide N-channel circuit with twice as much as the input voltage. When Q4 is on, the diode is used as a reverse biased. Current flows via Q4 as well as the inductor L1 to output polarity. When Q4 is off, the inductor L1 reverses its polarity with its energy transferred to the output loading, and the diode turns forward biased. As shown in Fig. 5 and 6, the peak rectifier circuit comprises two diodes (D1 and D3) and two filter capacitors (C7 and C5). And the voltage filtered by peak rectifier may provide control voltage with two times of VIN dc voltage as shown in Fig. 6 (the lower waveform). Because the output voltage is boosted up by a square waveform of amplitude VIN to two times of the input voltage, the circuit is considered as a Functions of the bootstrapped driver circuit and driven D3 1N5819 C1 470µF D1 1N5819 C7 V1 +5V + “bootstrapped circuit”. 10V DC C5 100µF 1µF V2 5V VPULSE Fig. 5 Bootstrapped Voltage Fig. 6 Bootstrapped Circuit Upper: D1 Cathode Polarity Signal Lower: 10VDC 3 AN022 l Vc +10V Driven N-channel function C5 100µF R2 2K R1 2K R12 9.1K R13 Q3 2N2222 2K R10 2K Q2 2N2222 Q1 2N2222 Q5 R3 2K 10V 0V 2N2907 V1 5V Fig. 7 Fast Driven N-MOSFET Circuit Fig. 8 Driven N-channel Signal Upper: 5V-Driving Signal Lower: 10V-Driving Signal Such as Fig. 7, this driven N-channel function is level of quiescent current. composed of three NPN transistors, one PNP transistor and six resistors. The configuration of the function block consists of two inverters and one push-pull. The output from the driven circuit, which has an input of 1MHZ, can produce a perfect square signal of 1MHZ. As Fig. 8, the 5V-driving signal will Component selection The section is divided into two parts. The first part talks about the calculation and selection of the circuit components on buck converter. And the second part introduces an LDO application. push to 10V-driving signal, which drives N-MOSFET Q4 working properly. All of the following calculations are effective when switch 3. AIC1630A for LDO application converter is in a continuous-conduction mode. 1. Input voltage of LDO is provided by the output (1) Switch converter application voltage of buck converter. It can resolve some LDO The duty cycle is calculated as: problems, such as: high dropout voltage and high DUTY(MAX ) = power consumption. Therefore, the advantage of operated TON (MAX ) T = VOUT + VF VIN(MIN ) − VQ + VF LDO is to provide a fast transient response, which is Where what switch converter can not offer. Fig. 4 illustrates VF: sckottky diode forward voltage that the base current of U5 is controlled by R8 and VQ: series pass element (MOSFET) switch on R9 turns U5 off when LBO floats. Note that, at a light voltage (VQ= IQ× RDS(ON) ) load, R8 and R9 have an effect on efficiency as well as the maximum available output current. And lower R8 and R9 may drive higher output current, but cause AIC1630A N-MOSFET circuit to draw higher 4 AN022 The input capacitor is selected mainly on its ESR For example 1: Min VIN typ 5 VOUT max unit value and the RMS current rating, in order to support 12 V high current on an instant at input polarity. Low ESR V capacitors may decrease input ripple and avoid the A disturbance to other circuits in the system. In addition, 2.5 IOUT 0.1 3 VRIPPLE 50 mV Assumed that the frequency of operation is 100KHZ, a LC filter circuit can improve EMI in the power system. the forward voltage of sckottky diode is 0.2V and the switch on voltage of MOSFET is 0.5V. The sequence, when the switch is on, is calculated as below: l Selection of inductor II. Output capacitor: Capacitance and ESR value are two major considerations for output capacitor. Capacitance There are many different ways to calculate the must be able to deliver high loading current when the inductance of the required inductor. We can get switch turns on. And ESR value is a main parameter easily it from the inductor ripple current ∆IP. When in determining the output ripple, transient voltage and the minimum loading current is 100mA, the regulator load impedance. will operate in continuous–conduction mode. Thus, Thus the ESR of output capacitor is calculated as: the inductor ripple current is calculated as: TON(MAX ) = DUTY(MAX ) × T = 2. 5 + 0. 2 1 × = 4.7µs 5 − 0.5 + 0.2 120K ESR = ∆VRIPPLE 50 × 10 −3 = = 250mΩ ∆IP 200 × 10 −3 ∆VRIPPLE: desired output ripple voltage The maximum output peak switch current: ∆IP = 2IOUT(MIN ) = 200mA IP(MAX ) = IO(MAX ) + Required inductance: V − VOUT − VQ ∆VL L(MIN) = × ∆T = IN × TON ∆IP ∆IP = 5 − 2.5 − 0.5 200 × 10 = 47µH −3 × 4.7 × 10 − 6 The minimum capacitor value for a desired output ripple and load current: C OUT(MIN ) = = IP(MAX ) 8∆VRIPPLE F 8 × 50 × 10 = 65µF In order to avoid inductor saturation and achieve the best power efficiency, the material of the inductor core is recommended to be either in MPP or in iron powder and also inductance over 47µH should be applied. l I. Selection of capacitor Input capacitor: ∆IP 200mA =3+ = 3.1A 2 2 l 3.1 −3 × 120 × 10 3 Selection of efficiency As shown in Fig. 9 and 10 for AIC1630A-2.5V application, the efficiency of N-MOS circuit is better than that of P-MOS circuit. Yet, some problems like 2 MOSFET I R loss, inductor loss, feedback resistor loss, output capacitor ESR loss, sckottky diode loss, and switch loss, which have influence on MOSFET 5 AN022 efficiency, need to be concerned. 90 90 VIN =5V 85 85 80 Efficiency(%) Efficiency(%) 80 75 V IN =12V 70 65 75 65 60 55 55 1 2 3 4 5 6 7 VIN=12V 70 60 50 VIN=5V 50 1 2 Fig. 9 3 4 5 6 7 Load Current (A) Load Current(A) Efficiency of N-MOS Circuit Fig. 10 Efficiency of P-MOS Circuit (2) LDO application between power ground and signal ground. However, a The selecting of bipolar transistor or MOSFET depends small trace is connecting between power ground and on output current, power efficiency, and dropout signal ground to avoid power ground noise to affect voltage. However, a 100uF(or great) capacitor is signals of AIC1630A. required between the LDO output and ground for stability. Otherwise, the output polarity will oscillate. At higher load current (>1A), the size of metal traces Most types of capacitors may work. Yet, when and the placement of components have to be aluminum electrolytic type of capacitor is used its cautiously concerned. Note that high switch currents equivalent series resistor (ESR) should be 5Ω or less. may cause voltage drops in long metal traces. In addition, short component leads may avoid unwanted 5. PCB Layout Guidelines A recommended printed circuit board (PCB) layout for parasitic inductance, which is a serious problem to EMI. AIC1630A N-MOS application circuit is shown in Fig. 10, 11, and12. It is very important to place the bootstrapped circuit as close as possible to input line and source polarity of N-MOS. In order to achieve the When low ESR capacitors fail to avoid the spikes at input/output polarities, application of input/output LC filters are recommended. best performance, the driven N-MOS circuit has to be placed as close as to the EXT pin of AIC1630A, too. A good layout practice is always the use of a separation layer of AIC1630A 6 AN022 7 AN022 N-MOS Fig. 11 Fig. 13 N-MOS Top Layer of AIC1630A Fig. 12 Bottom Layer of AIC1630A Silk screen of AIC1630A N-MOS Conclusion Most low voltage microprocessors, DSPs, and PLDs AIC1630A+LDO of high efficiency and heavy load use two power supplies of different voltages, such as current can support a larger range of application fields. VCORE voltage and I/O voltage of graphic card. The use In addition, not only AIC1630A can be applied to of requires step-up converter for high efficiency, but also it can be management of both voltages to avoid potential used as a step-down solution for different applications problems with device and system reliability. Users must and requirements. dual voltage architecture often consider the timing sequence between core and I/O during power switching operations. Timing sequence for dual low voltage applications has grown rapidly. Also power IC’s of two output voltages have been in great demand recently. AIC1630A+LDO provide VCORE voltage and I/O voltage with power and solve the problems with different potentials. 8