Infineon IGCM06G60GA Control integrated power system Datasheet

C o ntrol In t eg ra t ed P Owe r
Sys te m (C IPOS™)
I GCM 06G6 0GA
Datasheet
For Power Management Application
1
Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
Table of Contents
CIPOS™ Control Integrated POwer System ........................................................................................................ 3
Features .............................................................................................................................................................. 3
Target Applications ........................................................................................................................................... 3
Description ......................................................................................................................................................... 3
System Configuration ....................................................................................................................................... 3
Pin Configuration .................................................................................................................................................... 4
Internal Electrical Schematic ................................................................................................................................. 4
Pin Assignment ....................................................................................................................................................... 5
Pin Description .................................................................................................................................................. 5
HIN(U,V,W) and LIN(U,V,W) (Low side and high side control pins, Pin 7 - 12) ................................................ 5
VFO (Fault-output and NTC, Pin 14) ................................................................................................................. 6
ITRIP (Over current detection function, Pin 15) ................................................................................................ 6
VDD, VSS (Low side control supply and reference, Pin 13, 16) ....................................................................... 6
VB(U,V,W) and VS(U,V,W) (High side supplies, Pin 1 - 6) ............................................................................... 6
N (Low side common emitter, Pin 17 - 19) ........................................................................................................ 6
W, V, U (High side emitter and low side collector, Pin 20 - 22)......................................................................... 6
P (Positive bus input voltage, Pin 23)................................................................................................................ 6
Absolute Maximum Ratings................................................................................................................................... 7
Module Section .................................................................................................................................................. 7
Inverter Section.................................................................................................................................................. 7
Control Section .................................................................................................................................................. 7
Recommended Operation Conditions .................................................................................................................. 8
Static Parameters ................................................................................................................................................... 9
Dynamic Parameters ............................................................................................................................................ 10
Bootstrap Parameters .......................................................................................................................................... 10
Thermistor ............................................................................................................................................................. 11
Mechanical Characteristics and Ratings............................................................................................................ 11
Circuit of a Typical Application ........................................................................................................................... 12
Switching Times Definition .................................................................................................................................. 12
Electrical characteristic ....................................................................................................................................... 13
Package Outline .................................................................................................................................................... 14
Datasheet
2
Ver. 1.1, 2014-06-01
CIPO™ IGCM06G60GA
CIPOS™
Control Integrated POwer System
Dual In-Line Intelligent Power Module
3Φ-bridge 600V / 6A
Features
Description
Fully isolated Dual In-Line molded module
• Infineon reverse conducting IGBTs with
monolithic body diode
• Rugged SOI gate driver technology with stability
against transient and negative voltage
• Allowable negative VS potential up to -11V for
signal transmission at VBS=15V
• Integrated bootstrap functionality
• Over current shutdown
• Temperature monitor
• Under-voltage lockout at all channels
• Low side common emitter
• Cross-conduction prevention
• All of 6 switches turn off during protection
• Lead-free terminal plating; RoHS compliant
The CIPOS™ module family offers the chance for
integrating various power and control components
to increase reliability, optimize PCB size and system
costs.
It is designed to control three phase AC motors and
permanent magnet motors in variable speed drives
for applications like a refrigerator and a dish
washer. The package concept is specially adapted
to power applications, which need good thermal
conduction and electrical isolation, but also EMIsave control and overload protection.
The features of Infineon reverse conducting IGBT
are combined with an optimized SOI gate driver for
excellent electrical performance.
System Configuration
• 3 half bridges with reverse conducting IGBT
• 3Φ SOI gate driver
Target Applications
• Thermistor
• Dish washers
• Pin-to-heasink creepage distance typ. 1.6mm
• Refrigerators
• Fans
• Low power motor drives
Datasheet
3
Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
Pin Configuration
Bottom View
Figure 1: Pin configuration
Internal Electrical Schematic
Figure 2: Internal schematic
Datasheet
4
Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
Pin Assignment
Pin Number
Pin Name
Pin Description
1
VS(U)
U-phase high side floating IC supply offset voltage
2
VB(U)
U-phase high side floating IC supply voltage
3
VS(V)
V-phase high side floating IC supply offset voltage
4
VB(V)
V-phase high side floating IC supply voltage
5
VS(W)
W-phase high side floating IC supply offset voltage
6
VB(W)
W-phase high side floating IC supply voltage
7
HIN(U)
U-phase high side gate driver input
8
HIN(V)
V-phase high side gate driver input
9
HIN(W)
W-phase high side gate driver input
10
LIN(U)
U-phase low side gate driver input
11
LIN(V)
V-phase low side gate driver input
12
LIN(W)
W-phase low side gate driver input
13
VDD
Low side control supply
14
VFO
Fault output / Temperature monitor
15
ITRIP
Over current shutdown input
16
VSS
Low side control negative supply
17, 18, 19
N
Low side common emitter
20
W
Motor W-phase output
21
V
Motor V-phase output
22
U
Motor U-phase output
23
P
Positive bus input voltage
24
NC
No Connection
Pin Description
Schmitt-Trigger
HIN(U,V,W) and LIN(U,V,W) (Low side and high
side control pins, Pin 7 - 12)
These pins are positive logic and they are
responsible for the control of the integrated IGBT.
The Schmitt-trigger input thresholds of them are
such to guarantee LSTTL and CMOS compatibility
down to 3.3V controller outputs. Pull-down resistor
of about 5kΩ is internally provided to pre-bias inputs
during supply start-up and a zener clamp is
provided for pin protection purposes. Input Schmitttrigger and noise filter provide beneficial noise
rejection to short input pulses.
HINx
LINx
SΩITCH LEVEL
VIH; VIL
Figure 3: Input pin structure
a)
tFILIN
HO
LO
b)
tFILIN
HIN
LIN
HIN
LIN
The noise filter suppresses control pulses which are
below the filter time tFILIN. The filter acts according to
Figure 4.
Datasheet
INPUT NOISE
FILTER
UZ=10.5V
≈ 5kΩ
high
low
HO
LO
Figure 4: Input filter timing diagram
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Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
It is recommended for proper work of CIPOS™ not
to provide input pulse-width lower than 1us.
The IC shuts down all the gate drivers’
outputs, when the VDD supply voltage is
VDDUV- = 10.4V. This prevents the external
switches from critically low gate voltage
during on-state and therefore from excessive
dissipation.
The integrated gate drive provides additionally a
shoot through prevention capability which avoids
the simultaneous on-state of two gate drivers of the
same leg (i.e. HO1 and LO1, HO2 and LO2, HO3
and LO3). When two inputs of a same leg are
activated, only former activated one is activated so
that the leg is kept steadily in a safe state.
VB(U,V,W) and VS(U,V,W) (High side supplies,
Pin 1 - 6)
VB to VS is the high side supply voltage. The high
side circuit can float with respect to VSS following
the external high side power device emitter voltage.
A minimum deadtime insertion of typically 380ns is
also provided by driver IC, in order to reduce crossconduction of the external power switches.
Due to the low power consumption, the floating
driver stage is supplied by integrated bootstrap
circuit.
VFO (Fault-output and NTC, Pin 14)
The VFO pin indicates a module failure in case of
under voltage at pin VDD or in case of triggered
over current detection at ITRIP. A pull-up resistor is
externally required to bias the NTC.
The under-voltage detection operates with a rising
supply threshold of typical VBSUV+ = 12.1V and a
falling threshold of VBSUV- = 10.4V.
VS(U,V,W) provide a high robustness against
negative voltage in respect of VSS of -50V
transiently. This ensures very stable designs even
under rough conditions.
VDD
RON ,FLT
VFO
>1
VSS
from ITRIP -Latch
N (Low side common emitter, Pin 17 - 19)
The low side common emitter is available for current
measurement. It is recommended to keep the
connection to pin VSS as short as possible in order
to avoid unnecessary inductive voltage drops..
from uv - detection
Thermistor
power
below
power
levels
power
CIPOS™
Figure 5: Internal circuit at pin VFO
W, V, U (High side emitter and low side collector,
Pin 20 - 22)
These pins are motor U, V, W input pins
The same pin provides direct access to the NTC,
which is referenced to VSS. An external pull-up
resistor connected to +5V ensures, that the resulting
voltage can be directly connected to the
microcontroller
P (Positive bus input voltage, Pin 23)
The high side IGBT are connected to the bus
voltage. It is noted that the bus voltage does not
exceed 450 V.
ITRIP (Over current detection function, Pin 15)
CIPOS™ provides an over current detection
function by connecting the ITRIP input with the
motor current feedback. The ITRIP comparator
threshold (typ. 0.47V) is referenced to VSS ground.
An input noise filter (typ: tITRIPMIN = 530ns) prevents
the driver to detect false over-current events.
Over current detection generates a shut down of all
outputs of the gate driver after the shutdown
propagation delay of typically 1000ns.
The fault-clear time is set to typical 65us.
VDD, VSS (Low side control supply and
reference, Pin 13, 16)
VDD is the low side supply and it provides power
both to input logic and to low side output power
stage. Input logic is referenced to VSS ground.
The under-voltage circuit enables the device to
operate at power on when a supply voltage of at
least a typical voltage of VDDUV+ = 12.1V is present.
Datasheet
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Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
Absolute Maximum Ratings
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Module Section
Description
Condition
Storage temperature range
Insulation test voltage
RMS, f = 60Hz, t =1min
Operating case temperature range
Refer to Figure 6
Symbol
Value
Unit
min
max
Tstg
-40
125
°C
VISOL
2000
-
V
TC
-40
100
°C
Inverter Section
Description
Condition
Symbol
Value
min
max
Unit
Max. blocking voltage
IC = 250µA
VCES
600
-
V
DC link supply voltage of P-N
Applied between P-N
VPN
-
450
V
DC link supply voltage (surge) of P-N
Applied between P-N
VPN(surge)
-
500
V
Output current
TC = 25°C, TJ < 150°C
TC = 100°C, TJ < 150°C
IC
-6
-4
6
4
A
less than 1ms
IC
-12
12
A
VDC ≤ 400V, TJ = 150°C
tSC
-
5
µs
Power dissipation per IGBT
Ptot
-
23.6
W
Operating junction temperature range
TJ
-40
150
°C
RthJC
-
5.3
K/W
Maximum peak output current
Short circuit withstand time
1
Single IGBT thermal resistance,
junction-case
Control Section
Description
Condition
Value
min
max
Unit
Module supply voltage
VDD
-1
20
V
High side floating supply voltage
(VB vs. VS)
VBS
-1
20
V
VIN
VITRIP
-1
-1
10
10
V
fPWM
-
20
kHz
Input voltage
LIN, HIN, ITRIP
Switching frequency
1
Symbol
Allowed number of short circuits: <1000; time between short circuits: >1s.
Datasheet
7
Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
Recommended Operation Conditions
All voltages are absolute voltages referenced to VSS -potential unless otherwise specified.
Description
Symbol
Value
min
typ
max
Unit
DC link supply voltage of P-N
VPN
0
-
400
V
High side floating supply voltage (VB vs. VS)
VBS
13.5
-
18.5
V
Low side supply voltage
VDD
14.0
16
18.5
V
Control supply variation
ΔVBS,
ΔVDD
-1
-1
-
1
1
V/µs
Logic input voltages LIN,HIN,ITRIP
VIN
VITRIP
0
0
-
5
5
V
Between VSS - N (including surge)
VSS
-5
-
5
V
Figure 6: TC measurement point 1
1
Any measurement except for the specified point in figure 6 is not relevant for the temperature verification and
brings wrong or different information.
Datasheet
8
Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
Static Parameters
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Description
Condition
Symbol
Value
Unit
min
typ
max
VCE(sat)
-
1.6
1.8
2.0
-
V
TJ = 25°C
150°C
VF
-
1.75
1.8
2.2
-
V
VCE = 600V
ICES
-
-
1
mA
Logic "1" input voltage (LIN,HIN)
VIH
-
2.1
2.5
V
Logic "0" input voltage (LIN,HIN)
VIL
0.7
0.9
-
V
ITRIP positive going threshold
VIT,TH+
400
470
540
mV
ITRIP input hysteresis
VIT,HYS
40
70
-
mV
VDD and VBS supply under voltage
positive going threshold
VDDUV+
VBSUV+
10.8
12.1
13.0
V
VDD and VBS supply under voltage
negative going threshold
VDDUVVBSUV-
9.5
10.4
11.2
V
VDD and VBS supply under voltage
lockout hysteresis
VDDUVH
VBSUVH
1.0
1.7
-
V
VINCLAMP
9.0
10.1
12.5
V
Collector-Emitter saturation voltage
Iout = 4A
TJ = 25°C
150°C
Emitter-Collector forward voltage
Collector-Emitter leakage current
Iout = -4A
Input clamp voltage
(HIN, LIN, ITRIP)
Iin = 4mA
Quiescent VBx supply current
(VBx only)
HIN = 0V
IQBS
-
300
500
µA
Quiescent VDD supply current
(VDD only)
LIN = 0V, HINX = 5V
IQDD
-
370
900
µA
Input bias current
VIN = 5V
IIN+
-
1
1.5
mA
Input bias current
VIN = 0V
IIN-
-
2
-
µA
ITRIP input bias current
VITRIP = 5V
IITRIP+
-
65
150
µA
VFO input bias current
VFO = 5V, VITRIP = 0V
IFO
-
60
-
µA
VFO output voltage
IFO = 10mA, VITRIP = 1V
VFO
-
0.5
-
V
Datasheet
9
Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
Dynamic Parameters
(VDD = 15V and TJ = 25°C, if not stated otherwise)
Description
Condition
typ
max
ton
-
650
-
ns
tr
-
20
-
ns
tc(on)
-
100
-
ns
trr
-
130
-
ns
toff
-
680
-
ns
tf
-
180
-
ns
tc(off)
-
220
-
ns
tSCP
-
1420
-
ns
tITRIPmin
-
530
-
ns
tFILIN
-
290
-
ns
tFLTCLR
40
65
200
µs
DTPWM
1.0
-
-
µs
DTIC
-
380
-
ns
VLIN,HIN = 5V; Iout =4A,
VDC = 300V
Turn-on switching time
Reverse recovery time
Turn-off propagation delay time
Turn-off fall time
Turn-off switching time
VLIN,HIN = 0V; Iout =4A,
VDC = 300V
Short circuit propagation delay time
From VIT,TH+ to 10% ISC
Input filter time ITRIP
VITRIP = 1V
Input filter time at LIN, HIN for turn
on and off
VLIN,HIN = 0V & 5V
Fault clear time after ITRIP-fault
VITRIP = 1V
Deadtime between low side and high
side
Unit
min
Turn-on propagation delay time
Turn-on rise time
Value
Symbol
Deadtime of gate drive circuit
IGBT turn-on energy (includes
reverse recovery of diode)
VDC = 300V, IC = 4A,
TJ = 25°C
150°C
Eon
-
75
130
-
µJ
IGBT turn-off energy
VDC = 300V, IC = 4A,
TJ = 25°C
150°C
Eoff
-
120
190
-
µJ
Diode recovery energy
VDC = 300V, IC = 4A,
TJ = 25°C
150°C
Erec
-
40
70
-
µJ
Bootstrap Parameters
(TJ = 25°C, if not stated otherwise)
Description
Condition
Symbol
Repetitive peak reverse
voltage
1
VRRM
Value
Unit
min
typ
max
600
-
-
V
-
Ω
Bootstrap resistance of
U-phase 1
VS2 or VS3 = 300V, TJ = 25°C
VS2 and VS3 = 0V, TJ = 25°C
VS2 or VS3 = 300V, TJ = 125°C
VS2 and VS3 = 0V, TJ = 125°C
RBS1
-
35
40
50
65
Reverse recovery time
IF = 0.6A, di/dt = 80A/µs
trr_BS
-
50
-
ns
Forward voltage drop
IF = 20mA, VS2 and VS3 = 0V
VF_BS
-
2.6
-
V
RBS2 and RBS3 have same values to RBS1.
Datasheet
10
Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
Thermistor
Description
Resistor
Condition
TNTC = 25°C
B-constant of NTC
(Negative temperature coefficient)
Symbol
Value
Unit
min
typ
max
RNTC
-
85
-
kΩ
B(25/100)
-
4092
-
K
Figure 7: Thermistor resistance – temperature curve and table
(For more information, please refer to the application note ‘AN CIPOS-mini 1 Technical description’)
Mechanical Characteristics and Ratings
Description
Condition
Value
Unit
min
typ
max
Mounting torque
M3 screw and washer
0.59
0.69
0.78
Nm
Flatness
Refer to Figure 8
-50
-
100
µm
-
6.15
-
g
Weight
Figure 8: Flatness measurement position
Datasheet
11
Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
Circuit of a Typical Application
NC (24)
P (23)
(1) VS(U)
(2) VB(U)
VB1
HO1
RBS1
(3) VS(V)
(4) VB(V)
UU(22)
VS1
HO2
VB2
RBS2
V (21)
VS2
3-ph AC
Motor
(5) VS(W)
(6) VB(W)
HO3
VB3
W (20)
VS3
RBS3
(7) HIN(U)
(8) HIN(V)
(9) HIN(W)
Micro
Controller
(10) LIN(U)
(11) LIN(V)
(12) LIN(W)
VDD line
(13) VDD
5 or 3.3V line
LO1
HIN1
HIN2
N (19)
HIN3
LIN1
LO2
LIN2
LIN3
N (18)
VDD
(14) VFO
VFO
(15) ITRIP
ITRIP
(16) VSS
VSS
LO3
N (17)
Thermistor
Figure 9: Application circuit
Switching Times Definition
HINx
LINx
2.1V
0.9V
trr
toff
ton
10%
iCx
90%
90%
tf
vCEx
10%
tr
10%
10%
10%
tc(on)
tc(off)
Figure 10: Switching times definition
Datasheet
12
Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
Electrical characteristic
9
8
7
6
VDD=13V
VDD=15V
VDD=20V
4
3
2
1
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
VCE(sat), Collector - Emitter voltage [V]
4.0
Eoff, Turn off switching energy loss [mJ]
High side @TJ=25℃dd
High side @TJ=150℃d
Low side @TJ=25℃dd
Low side @TJ=150℃d
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
1
2
3
4
5
6
7
8
Ic, Collector current [A]
9
10
11
7
6
5
4
TJ=25℃
TJ=150℃
3
2
1
12
700
650
3.5
4.0
0.15
0.10
0.05
0.00
VDC=300V
VDD=15V
0
1
2
3
4
5
6
7
8
Ic, Collector current [A]
9
10
11
1
2
3
4
5
6
7
8
Ic, Collector current [A]
9
10
11
trr, Reverse recovery time [ns]
High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃
Low side @TJ=150℃
600
500
400
300
200
300
250
200
150
100
0
1
2
3
4
5
6
7
8
Ic, Collector current [A]
9
10
11
100
1
2
3
4
5
6
7
8
Ic, Collector current [A]
9
Typ. Turn off switching time
Datasheet
10
TJ=25℃
TJ=150℃
3
2
1
450
VDC=300V
VDD=15V
400
High side @TJ=25℃dd
350
11
12
Low side @TJ=25℃ddd
Low side @TJ=150℃d
250
160
1.5
2.0
2.5
3.0
3.5
High side @TJ=25℃dd
High side @TJ=150℃d
Low side @TJ=25℃dd
Low side @TJ=150℃d
140
120
100
80
60
40
20
0
1
2
3
4
5
6
7
8
Ic, Collector current [A]
9
10
11
12
VDC=300V
VDD=15V
1600
High side @TJ=25℃
High side @TJ=150℃
Low side @TJ=25℃
Low side @TJ=150℃
1400
1200
1000
800
600
0
1
2
3
4
5
6
7
8
Ic, Collector current [A]
9
10
11
12
10
1
0.1
0.01
200
150
D : duty ratio
D=50%
D=20%
D=10%
D=5%
D=2%
Single pulse
1E-3
100
0
1.0
Typ. Turn off propagation delay time
High side @TJ=150℃d
300
0.5
VDC=300V
VDD=15V
180
0
12
50
0
4
Typ. Turn on switching time
900
700
5
1800
High side @TJ=25℃dd
High side @TJ=150℃d
Low side @TJ=25℃dd
Low side @TJ=150℃d
500
800
6
Typ. Reverse recovery energy loss
VDC=300V
VDD=15V
350
0
12
VDC=300V
VDD=15V
1000
7
VF, Emitter - Collector voltage [V]
Typ. Emitter – Collector forward voltage
12
50
0
8
0
0.0
4.5
0.20
1100
tc(off), Turn off switching time [ns]
3.0
0.25
Typ. Turn on propagation delay time
0
2.5
9
200
0.30
tc(on), Turn on switching time [ns]
ton, Turn on propagation delay time [ns]
750
600
2.0
High side @TJ=25℃dd
High side @TJ=150℃d
Low side @TJ=25℃dd
Low side @TJ=150℃d
0.35
400
High side @TJ=25℃dd
High side @TJ=150℃d
Low side @TJ=25℃dd
Low side @TJ=150℃d
800
1.5
10
Typ. Turn off switching energy loss
VDC=300V
VDD=15V
850
1.0
0.40
Typ. Turn on switching energy loss
900
0.5
VCE(sat), Collector - Emitter voltage [V]
ZthJC, RC-IGBT transient thermal resistance [K/W]
Eon, Turn on switching energy loss [mJ]
0.8
0.7
8
Typ. Collector – Emitter saturation voltage
VDC=300V
VDD=15V
0.9
9
0
0.0
Typ. Collector – Emitter saturation voltage
1.0
10
Erec, Reverse recovery energy loss [uJ]
5
11
IF, Emitter - Collector current [A]
10
12
VDD=15V
11
Ic, Collector - Emitter current [A]
Ic, Collector - Emitter current [A]
12
TJ=25℃
11
toff, Turn off propagation delay time [ns]
12
0
1
2
3
4
5
6
7
8
Ic, Collector current [A]
9
Typ. Reverse recovery time
13
10
11
12
1E-4
1E-7 1E-6 1E-5 1E-4 1E-3 0.01 0.1
tP, Pulse width [sec.]
1
10
100
IGBT transient thermal resistance at all six
IGBTs operation
Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
Package Outline
Datasheet
14
Ver. 1.1, 2014-06-01
CIPOS™ IGCM06G60GA
Revision History
Previous Version:
Datasheet Ver. 1.0
Major changes since the last revision
Page or Reference
8
14
Datasheet
Description of change
Figure 6 updated
Package Outline updated
15
Ver. 1.1, 2014-06-01
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Edition 2014-06-01
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