ON NLU1GT125CMUTCG Non-inverting 3-state buffer, ttl level Datasheet

NLU1GT125
Non-Inverting 3-State
Buffer, TTL Level
LSTTL−Compatible Inputs
The NLU1GT125 MiniGatet is an advanced CMOS high−speed
non−inverting buffer in ultra−small footprint.
The NLU1GT125 requires the 3−state control input OE to be set
High to place the output in the high impedance state.
The device input is compatible with TTL−type input thresholds and
the output has a full 5.0 V CMOS level output swing.
The NLU1GT125 input and output structures provide protection
when voltages up to 7.0 V are applied, regardless of the supply voltage.
Features
•
•
•
•
•
•
•
•
•
High Speed: tPD = 3.8 ns (Typ) @ VCC = 5.0 V
Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
TTL−Compatible Input: VIL = 0.8 V; VIH = 2.0 V
CMOS−Compatible Output:
VOH > 0.8 VCC; VOL < 0.1 VCC @ Load
Power Down Protection Provided on inputs
Balanced Propagation Delays
Ultra−Small Packages
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These are Pb−Free Devices
OE
1
6
VCC
IN A
2
5
NC
GND
3
4
OUT Y
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MARKING
DIAGRAMS
1
UDFN6
1.2 x 1.0
CASE 517AA
7M
UDFN6
1.0 x 1.0
CASE 517BX
LM
UDFN6
1.45 x 1.0
CASE 517AQ
DM
1
1
7
M
= Device Marking
= Date Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 4 of
this data sheet.
Figure 1. Pinout (Top View)
OE
IN A
OUT Y
Figure 2. Logic Symbol
FUNCTION TABLE
Input
Output
A
OE
Y
L
H
X
L
L
H
L
H
Z
© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 6
PIN ASSIGNMENT
1
OE
2
IN A
3
GND
4
OUT Y
5
NC
6
VCC
1
Publication Order Number:
NLU1GT125/D
NLU1GT125
MAXIMUM RATINGS
Symbol
Value
Unit
VCC
DC Supply Voltage
−0.5 to +7.0
V
VIN
DC Input Voltage
−0.5 to +7.0
V
DC Output Voltage
−0.5 to +7.0
V
VIN < GND
−20
mA
VOUT < GND
±20
mA
VOUT
Parameter
IIK
DC Input Diode Current
IOK
DC Output Diode Current
IO
DC Output Source/Sink Current
±12.5
mA
ICC
DC Supply Current Per Supply Pin
±25
mA
IGND
DC Ground Current per Ground Pin
±25
mA
TSTG
Storage Temperature Range
−65 to +150
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
260
°C
TJ
Junction Temperature Under Bias
150
°C
MSL
Moisture Sensitivity
FR
Flammability Rating
ILATCHUP
Level 1
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Latchup Performance Above VCC and Below GND at 125°C (Note 2)
mA
±500
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
2. Tested to EIA / JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
1.65
5.5
V
VCC
Positive DC Supply Voltage
VIN
Digital Input Voltage
0
5.5
V
Output Voltage
0
5.5
V
−55
+125
°C
0
0
100
20
ns/V
VOUT
TA
Operating Free−Air Temperature
Dt/DV
Input Transition Rise or Fall Rate
VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
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2
NLU1GT125
DC ELECTRICAL CHARACTERISTICS
TA = 25 5C
Symbol
Parameter
Conditions
VCC (V)
Min
1.4
2.0
VIH
Low−Level Input
Voltage
3.0
4.5 to 5.5
VIL
Low−Level Input
Voltage
3.0
4.5 to 5.5
VOH
High−Level Output
Voltage
VOL
Low−Level Output
Voltage
Typ
Max
TA = +855C
TA = −555C
to +1255C
Min
Min
1.4
2.0
0.53
0.8
VIN = VIH or VIL
IOH = −50 mA
3.0
4.5
2.9
4.4
VIN = VIH or VIL
IOH = −4 mA
IOH = −8 mA
3.0
4.5
2.58
3.94
VIN = VIH or VIL
IOL = 50 mA
3.0
4.5
VIN = VIH or VIL
IOL = 4 mA
IOL = 8 mA
Max
3.0
4.5
0
0
Max
1.4
2.0
0.53
0.8
V
0.53
0.8
2.9
4.4
2.9
4.4
2.48
3.80
2.34
3.66
Unit
V
V
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
IIN
Input Leakage
Current
0 v VIN v 5.5 V
0 to 5.5
±0.1
±1.0
±1.0
mA
ICC
Quiescent Supply
Current
0 v VIN v VCC
5.5
1.0
20
40
mA
ICCT
Quiescent Supply
Current
VIN = 3.4 V
Other Input: VCC
or GND
5.5
1.35
1.50
1.65
mA
IOPD
Output Leakage
Current
VOUT = 5.5 V
0.0
0.5
5.0
10
mA
IOZ
3−State Leakage
Current
VIN = VIH or VIL
VOUT = VCC or
GND
0.0
±0.25
±2.5
±2.5
mA
TA = +855C
TA = −555C
to +1255C
Min
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
VCC
(V)
Test
Condition
3.0 to 3.6
TA = 25 5C
Max
Unit
9.5
13.0
12.0
16.0
ns
1.0
1.0
6.5
8.5
8.5
10.5
8.0
11.5
1.0
1.0
9.5
13.0
11.5
15.0
3.6
5.1
5.1
7.1
1.0
1.0
6.0
8.0
7.5
9.5
CL = 15 pF
CL = 50 pF
6.5
8.0
9.7
13.2
1.0
1.0
11.5
15.0
14.5
18.5
CL = 15 pF
CL = 50 pF
4.8
7.0
6.8
8.8
1.0
1.0
8.0
10.0
10.0
12.0
Input Capacitance
4
10
10
10.0
COUT
3−State Output Capacitance
(Output in High Impedance
State)
6
pF
CPD
Power Dissipation
Capacitance (Note 3)
14
pF
Symbol
tPLH,
tPHL
tPZL,
tPZH
tPLZ,
tPHZ
CIN
Parameter
Propagation Delay, A to Y
(Figures 3 and 5)
Output Enable Time, OE to Y
(Figures 4 and 6)
Output Disable Time, OE to Y
(Figures 4 and 6)
Min
Typ
Max
Min
Max
CL = 15 pF
CL = 50 pF
5.6
8.1
8.0
11.5
1.0
1.0
4.5 to 5.5
CL = 15 pF
CL = 50 pF
3.8
5.3
5.5
7.5
3.0 to 3.6
CL = 15 pF
CL = 50 pF
5.4
7.9
4.5 to 5.5
CL = 15 pF
CL = 50 pF
3.0 to 3.6
4.5 to 5.5
5.0
ns
ns
pF
3. CPD is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without
load. Average operating current can be obtained by the equation ICC(OPR) = CPD • VCC • fin + ICC. CPD is used to determine the no−load
dynamic power consumption: PD = CPD • VCC2 • fin + ICC • VCC.
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3
NLU1GT125
SWITCHING WAVEFORMS
OE
VCC
tPHL
tPLH
GND
tPZL
50%
A
VCC
50%
GND
tPLZ
HIGH
IMPEDANCE
50% VCC
Y
VOL + 0.3V
tPZH tPHZ
50% VCC
Y
Figure 3. Switching Waveforms
HIGH
IMPEDANCE
Figure 4.
TEST POINT
TEST POINT
OUTPUT
DEVICE
UNDER
TEST
VOH − 0.3V
50% VCC
Y
DEVICE
UNDER
TEST
CL *
*Includes all probe and jig capacitance
OUTPUT
1 kW
CL *
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND
WHEN
TESTING tPHZ AND tPZH.
*Includes all probe and jig capacitance
Figure 5. Test Circuit
Figure 6. Test Circuit
INPUT
Figure 7. Input Equivalent Circuit
ORDERING INFORMATION
Package
Shipping†
NLU1GT125MUTCG
UDFN6, 1.2 x 1.0, 0.4P
(Pb−Free)
3000 / Tape & Reel
NLU1GT125AMUTCG,
NLVU1GT125AMUTCG*
UDFN6, 1.45 x 1.0, 0.5P
(Pb−Free)
3000 / Tape & Reel
NLU1GT125CMUTCG
UDFN6, 1.0 x 1.0, 0.35P
(Pb−Free)
3000 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
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4
NLU1GT125
PACKAGE DIMENSIONS
UDFN6, 1.2x1.0, 0.4P
CASE 517AA
ISSUE C
EDGE OF PACKAGE
PIN ONE
REFERENCE
2X
0.10 C
L1
ÉÉ
ÉÉ
E
DETAIL A
Bottom View
(Optional)
TOP VIEW
2X
EXPOSED Cu
0.10 C
(A3)
0.10 C
A1
A
10X
0.08 C
ÉÉÉ
ÉÉÉ
A3
DETAIL B
Side View
(Optional)
5X
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.15
0.25
1.20 BSC
1.00 BSC
0.40 BSC
0.30
0.40
0.00
0.15
0.40
0.50
MOUNTING FOOTPRINT*
6X
6X
0.42
C
A1
DIM
A
A1
A3
b
D
E
e
L
L1
L2
MOLD CMPD
SEATING
PLANE
SIDE VIEW
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
D
0.22
L
3
L2
6X
b
0.10 C A B
0.05 C
6
0.40
PITCH
4
e
NOTE 3
1.07
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
5
NLU1GT125
PACKAGE DIMENSIONS
UDFN6, 1.2x1.0, 0.4P
CASE 517AA
ISSUE D
EDGE OF PACKAGE
PIN ONE
REFERENCE
2X
0.10 C
L1
ÉÉ
ÉÉ
E
DETAIL A
Bottom View
(Optional)
TOP VIEW
2X
EXPOSED Cu
0.10 C
(A3)
0.10 C
A1
A
10X
0.08 C
ÉÉÉ
ÉÉÉ
MOLD CMPD
5X
DIM
A
A1
A3
b
D
E
e
L
L1
L2
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.15
0.25
1.20 BSC
1.00 BSC
0.40 BSC
0.30
0.40
0.00
0.15
0.40
0.50
MOUNTING FOOTPRINT*
6X
C
A1
A3
DETAIL B
Side View
(Optional)
SEATING
PLANE
SIDE VIEW
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.25 AND
0.30 mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
A
B
D
6X
0.42
0.22
L
3
L2
6X
b
0.10 C A B
0.05 C
6
0.40
PITCH
4
e
NOTE 3
BOTTOM VIEW
1.07
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
6
NLU1GT125
PACKAGE DIMENSIONS
UDFN6 1.0x1.0, 0.35P
CASE 517BX
ISSUE O
PIN ONE
REFERENCE
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
A B
D
ÉÉÉ
ÉÉÉ
ÉÉÉ
E
0.10 C
2X
0.10 C
DIM
A
A1
A3
b
D
E
e
L
L1
TOP VIEW
A3
0.05 C
A
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.12
0.22
1.00 BSC
1.00 BSC
0.35 BSC
0.25
0.35
0.30
0.40
0.05 C
SIDE VIEW
A1
C
RECOMMENDED
SOLDERING FOOTPRINT*
SEATING
PLANE
5X
e
5X
0.48
L
6X
0.22
3
1
L1
1.18
6
4
6X
BOTTOM VIEW
b
0.10
M
C A B
0.05
M
C
0.53
1
PKG
OUTLINE
NOTE 3
0.35
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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NLU1GT125/D
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