Diodes DMN62D0LFB N-channel enhancement mode mosfet Datasheet

DMN62D0LFB
N-CHANNEL ENHANCEMENT MODE MOSFET
Product Summary
NEW PRODUCT
ADVANCE INFORMATION
V(BR)DSS
Features and Benefits
RDS(ON)
ID
TA = 25°C
2Ω @ VGS = 4V
100mA
2.5Ω @ VGS = 2.5V
50mA
•
•
•
•
•
•
•
•
60V
Low On-Resistance
Low Input Capacitance
Fast Switching Speed
Low Input/Output Leakage
ESD Protected
Lead Free By Design/RoHS Compliant (Note 1)
"Green" Device (Note 2)
Qualified to AEC-Q101 Standards for High Reliability
Description and Applications
This new generation MOSFET has been designed to minimize the onstate resistance (RDS(on)) and yet maintain superior switching
performance, making it ideal for high efficiency power management
applications.
Mechanical Data
•
•
•
•
•
•
•
•
DC-DC Converters
Power management functions
Battery Operated Systems and Solid-State Relays
Drivers: Relays, Solenoids, Lamps, Hammers, Displays,
Memories, Transistors, etc.
Case: X1-DFN1006-3
Case Material: Molded Plastic, "Green" Molding Compound. UL
Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020
Terminals: Finish ⎯ NiPdAu over Copper leadframe. Solderable
per MIL-STD-202, Method 208
Weight: 0.001 grams (approximate)
•
Drain
X1-DFN1006-3
Gate
S
D
G
ESD PROTECTED
Bottom View
Top View
Pin-Out
Gate
Protection
Diode
Source
Equivalent Circuit
Ordering Information (Note 3)
Product
DMN62D0LFB-7
DMN62D0LFB-7B
Notes:
Marking
NK
NK
Reel size (inches)
7
7
Tape width (mm)
8
8
Quantity per reel
3,000
10,000
1. No purposefully added lead.
2. Diodes Inc.'s "Green" policy can be found on our website at http://www.diodes.com.
3. For packaging details, go to our website at http://www.diodes.com.
Marking Information
DMN62D0LFB-7
DMN62D0LFB-7B
NK
NK
Top View
Dot Denotes Drain Side
Top View
Bar Denotes Gate and Source Side
DMN62D0LFB
Document number: DS35409 Rev. 2 - 2
NK = Product Type Marking Code
1 of 6
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October 2011
© Diodes Incorporated
DMN62D0LFB
Maximum Ratings @TA = 25°C unless otherwise specified
Characteristic
Symbol
VDSS
VGSS
NEW PRODUCT
ADVANCE INFORMATION
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (Note 4) VGS = 4.0V
Unit
V
V
IDM
Value
60
±20
100
75
200
Symbol
PD
RθJA
TJ, TSTG
Max
0.47
258
-55 to +150
Unit
W
°C/W
°C
TA = 25°C
TA = 70°C
Steady
State
ID
Pulsed Drain Current (Note 5)
mA
mA
Thermal Characteristics
Characteristic
Power Dissipation (Note 4)
Thermal Resistance, Junction to Ambient @TA = 25°C (Note 4)
Operating and Storage Temperature Range
Electrical Characteristics @ TA = 25°C unless otherwise stated
Characteristic
OFF CHARACTERISTICS (Note 6)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current TJ = 25°C
Gate-Source Leakage
Symbol
Min
Typ
Max
Unit
BVDSS
IDSS
60
-
-
1.0
±100
±500
±2.0
V
μA
nA
nA
μA
VGS = 0V, ID = 250μA
VDS = 60V, VGS = 0V
VGS = ±5V, VDS = 0V
VGS = ±10V, VDS = 0V
VGS = ±15V, VDS = 0V
1.3
1.5
1.9
2.6
0.8
0.9
1.0
2
2.5
3
1.3
V
|Yfs|
VSD
0.6
-
VDS = VGS, ID = 250μA
VGS = 4V, ID = 100mA
VGS = 2.5V, ID = 50mA
VGS = 1.8V, ID = 50mA
VGS = 1.5V, ID = 10mA
VDS = 10V, ID = 200mA
VGS = 0V, IS = 115mA
Ciss
Coss
Crss
Rg
Qg
Qgs
Qgd
tD(on)
tr
tD(off)
tf
-
32
4.4
2.9
126
0.45
0.08
0.08
3.4
3.4
26.4
16.3
-
IGSS
ON CHARACTERISTICS (Note 6)
Gate Threshold Voltage
VGS(th)
Static Drain-Source On-Resistance
RDS (ON)
Forward Transfer Admittance
Diode Forward Voltage
DYNAMIC CHARACTERISTICS (Note 7)
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Notes:
Ω
S
V
Test Condition
pF
VDS = 25V, VGS = 0V,
f = 1.0MHz
Ω
VDS = 0V, VGS = 0V, f = 1MHz
nC
VGS = 4.5V, VDS = 10V,
ID = 250mA
ns
ns
ns
ns
VGS = 10V, VDS = 30V,
RL = 150Ω, RG = 25Ω,
ID = 200mA
4. Device mounted on FR-4 PCB with minimum recommended pad layout, single sided.
5. Repetitive rating, pulse width limited by junction temperature.
6. Short duration pulse test used to minimize self-heating effect.
7. Guaranteed by design. Not subject to production testing.
DMN62D0LFB
Document number: DS35409 Rev. 2 - 2
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DMN62D0LFB
0.6
1
ID(A) @ VGS=2.5V
0.5
ID, DRAIN CURRENT (A)
ID(A) @ VGS=4.0V
ID(A) @ VGS=3.0V
0.3
ID(A) @ VGS=4.5V
0.2
ID(A) @ VGS=1.5V
0.0
0
0.5 1 1.5 2 2.5 3 3.5 4 4.5
VDS, DRAIN -SOURCE VOLTAGE(V)
Fig. 1 Typical Output Characteristics
5
RDS(ON)(Ω ) Ave @ VG=1.8V
2.5
2
RDS(ON)(Ω) Ave @ VG=2.5V
1.5
RDS(ON)(Ω ) Ave @ VG=4.5V
1
0.5
0
0
0.1
0.2
0.3
ID, DRAIN SOURCE CURRENT
Fig. 3 Typical On-Resistance vs.
Drain Current and Gate Voltage
0.4
0.01
0.5
1
1.5
VGS, GATE SOURCE VOLTAGE(V)
Fig. 2 Typical Transfer Characteristics
2
10
VGS = 5.0V
Ave RDS(ON)(Ω ) @ 125° C
Ave RDS(ON)(Ω) @ 150°C
Ave RDS(ON)(Ω ) @ 85° C
1
Ave RDS(ON)(Ω ) @ 25° C
Ave RDS(ON)(Ω ) @ -55° C
0.1
0
0.1
0.2
0.3
ID, DRAIN SOURCE CURRENT (A)
Fig. 4 Typical On-Resistance vs.
Drain Current and Temperature
0.4
1.6
3
VTH, GATE THRESHOLD VOLTAGE (V)
RDS(ON),DRAIN-SOURCE ON-RESISTANCE(Ω)
3
0.1
0.001
0
RDS(ON), DRAIN-SOURCE ON-RESISTANCE(Ω)
ID, DRAIN CURRENT (A)
ID(A) @ VGS=1.8V
0.4
0.1
RDS(ON), STATIC DRAIN-SOURCE ON-RESISTANCE (Ω)
NEW PRODUCT
ADVANCE INFORMATION
ID(A) @ VGS=2.0V
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Fig. 5 On-Resistance Variation with Temperature
DMN62D0LFB
Document number: DS35409 Rev. 2 - 2
1.4
1.2
1
0.8
0.6
0.4
0.2
-50
-25
0
25
50
75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
Fig. 6 Gate Threshold Variation vs. Ambient Temperature
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DMN62D0LFB
1
60
CT, JUNCTION CAPACITANCE (pF)
55
IS (A)
0.01
45
40
35
30
25
20
15
10
5
0.001
0.1
0.3
0.5
0.7
0.9
VSD, SOURCE-DRAIN VOLTAGE (V)
Fig. 7 Diodes Forward Voltage vs. Current
0
1.1
0
5
10
15
VDS, DRAIN-SOURCE VOLTAGE (V)
Fig. 8 Typical Junction Capacitance
20
1
10
VDS, DRAIN-SOURCE VOLTAGE (V)
Fig. 10 SOA, Safe Operation Area
100
1
10
VDS =10V, ID=250mA
ID, DRAIN CURRENT (A)
8
VGS (V)
6
4
0.1
0.01
2
0
0
0.2
0.6
0.8
1
QG (nC)
Fig. 9 Gate Charge Characteristics
0.4
0.001
0.1
1.2
1
r(t), TRANSIENT THERMAL RESISTANCE
NEW PRODUCT
ADVANCE INFORMATION
0.1
50
r(t) @ D=0.5
r(t) @ D=0.9
r(t) @ D=0.3
0.1
r(t) @ D=0.7
r(t) @ D=0.1
r(t) @ D=0.05
r(t) @ D=0.02
0.01
r(t) @ D=0.01
RθJA(t)=r(t) * RθJA
r(t) @ D=0.005
RθJA=273°C/W
Duty Cycle, D=t1 / t2
r(t) @ D=Single Pulse
0.001
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
10
100
1000
t1, PULSE DURATION TIME (sec)
Fig. 11 Transient Thermal Resistance
DMN62D0LFB
Document number: DS35409 Rev. 2 - 2
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DMN62D0LFB
NEW PRODUCT
ADVANCE INFORMATION
Package Outline Dimensions
A
X1-DFN1006-3
Dim Min
Max Typ
A
0.47
0.53 0.50
A1
0
0.05 0.03
b1
0.10
0.20 0.15
b2
0.45
0.55 0.50
D
0.95 1.075 1.00
E
0.55 0.675 0.60
e
0.35
⎯
⎯
L1
0.20
0.30 0.25
L2
0.20
0.30 0.25
L3
0.40
⎯
⎯
All Dimensions in mm
A1
D
b1
E
e
b2
L2
L3
L1
Suggested Pad Layout
C
X1
X
G2
G1
Dimensions
Z
G1
G2
X
X1
Y
C
Value (in mm)
1.1
0.3
0.2
0.7
0.25
0.4
0.7
Y
Z
DMN62D0LFB
Document number: DS35409 Rev. 2 - 2
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© Diodes Incorporated
DMN62D0LFB
IMPORTANT NOTICE
NEW PRODUCT
ADVANCE INFORMATION
DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT,
INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
(AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).
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application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or
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Copyright © 2011, Diodes Incorporated
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DMN62D0LFB
Document number: DS35409 Rev. 2 - 2
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October 2011
© Diodes Incorporated
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