ON MC74HCT4851ADWG Analog multiplexers/ demultiplexers with injection current effect control with lsttl compatible input Datasheet

MC74HCT4851A
Analog Multiplexers/
Demultiplexers with
Injection Current Effect
Control with LSTTL
Compatible Inputs
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MARKING
DIAGRAMS
Automotive Customized
This device is pin compatible to standard HC4051 and MC14051B
analog mux/demux devices, but feature injection current effect
control. This makes them especially suited for usage in automotive
applications where voltages in excess of normal logic voltage are
common.
The injection current effect control allows signals at disabled analog
input channels to exceed the supply voltage range without affecting
the signal of the enabled analog channel. This eliminates the need for
external diode/ resistor networks typically used to keep the analog
channel signals within the supply voltage range.
The devices utilize low power silicon gate CMOS technology. The
Channel Select and Enable inputs are compatible with standard CMOS
or LSTTL outputs.
Features
•
•
•
•
•
•
Injection Current Cross−Coupling Less than 1mV/mA (See Figure 4)
Pin Compatible to HC4051 and MC14051B Devices
Power Supply Range (VCC − GND) = 2.0 to 6.0 V
In Compliance With the Requirements of JEDEC Standard No. 7A
Chip Complexity: 154 FETs or 36 Equivalent Gates
These are Pb−Free Devices*
16
PDIP−16
N SUFFIX
CASE 648
16
1
MC74HCT4851AN
AWLYYWWG
1
16
SOIC−16
D SUFFIX
CASE 751B
16
1
HCT4851AG
AWLYWW
1
16
SOIC−16 WIDE
DW SUFFIX
CASE 751G
16
1
HCT4851A
AWLYWWG
1
16
16
1
TSSOP−16
DT SUFFIX
CASE 948F
HCT48
51A
ALYWG
G
1
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2009
November, 2009 − Rev. 1
1
Publication Order Number:
MC74HCT4851A/D
MC74HCT4851A
FUNCTION TABLE − MC74HCT4851A
Control Inputs
13
X0
14
X1
15
X2
ANALOG
12
MULTIPLEXER/
INPUTS/ X3
DEMULTIPLEXER
OUTPUTS X4 1
5
X5
2
X6
4
X7
11
A
CHANNEL
10
B
SELECT
9
INPUTS
C
6
ENABLE
PIN 16 = VCC
PIN 8 = GND
3
X
Select
B
A
Enable
C
L
L
L
L
L
L
L
L
H
L
L
L
L
H
H
H
H
X
L
L
H
H
L
L
H
H
X
COMMON
OUTPUT/
INPUT
ON Channels
X0
X1
X2
X3
X4
X5
X6
X7
NONE
L
H
L
H
L
H
L
H
X
VCC
X2
X1
X0
X3
A
B
C
16
15
14
13
12
11
10
9
6
7
Figure 1. MC74HCT4851A Logic Diagram
Single−Pole, 8−Position Plus Common Off
1
2
3
4
5
X4
X6
X
X7
X5
Enable NC
8
GND
Figure 2. MC74HCT4851A 16−Lead Pinout (Top View)
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2
MC74HCT4851A
MAXIMUM RATINGS
Symbol
Value
Unit
VCC
Positive DC Supply Voltage
(Referenced to GND)
–0.5 to + 7.0
V
Vin
DC Input Voltage (Any Pin)
(Referenced to GND)
–0.5 to VCC + 0.5
V
$25
mA
750
500
450
mW
–65 to + 150
°C
I
Parameter
DC Current, Into or Out of Any Pin
PD
Power Dissipation in Still Air,
Plastic DIP†
SOIC Package†
TSSOP Package†
Tstg
Storage Temperature Range
TL
Lead Temperature, 1 mm from Case for 10 Seconds
Plastic DIP, SOIC or TSSOP Package
°C
260
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect device
reliability.
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance circuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
Positive DC Supply Voltage
(Referenced to GND)
2.0
6.0
V
Vin
DC Input Voltage (Any Pin)
(Referenced to GND)
GND
VCC
V
0.0
1.2
V
– 55
+ 125
°C
0
0
0
1000
500
400
ns
VIO*
Static or Dynamic Voltage Across Switch
TA
Operating Temperature Range, All Package Types
tr, tf
Input Rise/Fall Time
(Channel Select or Enable Inputs)
VCC = 2.0 V
VCC = 4.5 V
VCC = 6.0 V
*For voltage drops across switch greater than 1.2 V (switch on), excessive VCC current may be
drawn; i.e., the current out of the switch may contain both VCC and switch input components. The
reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
DC CHARACTERISTICS — Digital Section (Voltages Referenced to GND) VEE = GND, Except Where Noted
Symbol
Parameter
Condition
VCC
V
Guaranteed Limit
−55 to 25°C
≤85°C
≤125°C
Unit
VIH
Minimum High−Level Input Voltage,
Channel−Select or Enable Inputs
Ron = Per Spec
4.5
to
5.5
2.0
2.0
2.0
V
VIL
Maximum Low−Level Input Voltage,
Channel−Select or Enable Inputs
Ron = Per Spec
4.5
to
5.5
0.8
0.8
0.8
V
Iin
Maximum Input Leakage Current on Digital Pins
(Enable/A/B/C)
Vin = VCC or GND
5.5
± 0.1
± 1.0
± 1.0
mA
ICC
Maximum Quiescent Supply Current
(per Package)
Vin(digital) = VCC or GND
Vin(analog) = GND
5.5
2.0
20
40
mA
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3
MC74HCT4851A
DC CHARACTERISTICS — Analog Section
Guaranteed Limit
Symbol
Ron
Parameter
Condition
VCC
−55 to 25°C
≤85°C
≤125°C
Unit
Maximum “ON” Resistance
Vin = VIL or VIH;VIS = VCC to
GND; IS ≤ 2.0 mA
4.5
5.5
550
400
650
500
750
600
W
Delta “ON” Resistance
Vin = VIL or VIH; VIS = VCC/2
IS ≤ 2.0 mA
4.5
5.5
80
60
100
80
120
100
W
Ioff
Maximum Off−Channel Leakage Current,
Any One Channel
Common Channel
Vin = VCC or GND
5.5
±0.1
±0.1
±0.1
±0.1
±0.1
±0.1
Ion
Maximum On−Channel Leakage
Vin = VCC or GND
Channel−to−Channel
5.5
±0.1
±0.1
±0.1
VCC
−55 to 25°C
≤85°C
≤125°C
Unit
Maximum Propagation Delay, Analog Input to Analog Output
5.0
40
45
50
ns
Maximum Propagation Delay, Enable or Channel−Select to Analog Output
5.0
80
90
100
ns
10
35
130
10
35
130
10
35
130
pF
DRon
mA
mA
AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns, VCC = 5.0 V ± 10%)
Parameter
Symbol
tPHL,
tPLH
tPHL,
tPHZ,PZH
tPLH,
tPLZ,PZL
Cin
Maximum Input Capacitance
(All Switches Off)
(All Switches Off)
Digital Pins
Any Single Analog Pin
Common Analog Pin
CPD
Power Dissipation Capacitance
Typical
5.0
20
pF
INJECTION CURRENT COUPLING SPECIFICATIONS (VCC = 5V, TA = −55°C to +125°C)
Parameter
Symbol
VDout
Condition
Maximum Shift of Output Voltage of Enabled Analog Channel
Iin* ≤ 1 mA, RS ≤ 3,9 kW
Iin* ≤ 10 mA, RS ≤ 3,9 kW
Iin* ≤ 1 mA, RS ≤ 20 kW
Iin* ≤ 10 mA, RS ≤ 20 kW
* Iin = Total current injected into all disabled channels.
660
R on , ON RESISTANCE (OHMS)
600
540
480
420
360
-55°C
300
+25°C
240
+125°C
180
120
60
0
0.0
0.9
1.8
2.7
3.6
Vin, INPUT VOLTAGE (VOLTS), REFERENCED TO GND
Figure 3. Typical On Resistance VCC = 4.5V
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4
4.5
Typ
Max
Unit
0.1
1.0
0.5
5.0
1.0
5.0
2.0
20
mV
MC74HCT4851A
External DC P.S.
VCC = 5 V
Vin2 / Iin2 meas. here.
Current Source
HP4155C
Smu #2
Vin1 = 4.9 V (Smu3)
Iin1 meas. Here
Vm1 connected here.
X7
RS
X0
4
16
13
3
X
Vout
Vm2 connected here.
6
NOTES: Rs = 3.9 KW or 20 KW.
NOTES: Vm1 & Vm2 are internal
NOTES:
HP4155C Voltmeters.
8
GND or VSS
Figure 4. Injection Current Coupling Specification
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5
MC74HCT4851A
5V
6V
5V
VCC
VCC
HC4051A
Sensor
Microcontroller
Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
Channel 8
(8x Identical Circuitry)
Common Out
A/D - Input
Figure 5. Actual Technology
Requires 32 passive components and one extra 6V regulator
to suppress injection current into a standard HC4051 multiplexer
5V
VCC
VCC
HC4851A
Sensor
Microcontroller
Channel 1
Channel 2
Channel 3
Channel 4
Channel 5
Channel 6
Channel 7
Channel 8
(8x Identical Circuitry)
Common Out
A/D - Input
Figure 6. MC74HCT4851A Solution
Solution by applying the HC4851A multiplexer
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6
MC74HCT4851A
PLOTTER
VCC
PROGRAMMABLE
POWER
SUPPLY
MINI COMPUTER
DC ANALYZER
16
VEE
VCC
OFF
-
+
VCC
VCC
A
COMMON O/I
OFF
NC
DEVICE
UNDER TEST
ANALOG IN
VIH
COMMON OUT
6
8
GND
Figure 8. Maximum Off Channel Leakage Current,
Any One Channel, Test Set−Up
Figure 7. On Resistance Test Set−Up
VCC
16
VEE
ANALOG I/O
16
A
OFF
VCC
OFF
VIH
VCC
VCC
VCC
ON
VEE
COMMON O/I
VCC
N/C
ANALOG I/O
VIL
6
COMMON O/I
OFF
6
8
8
Figure 9. Maximum Off Channel Leakage Current,
Common Channel, Test Set−Up
Figure 10. Maximum On Channel Leakage Current,
Channel to Channel, Test Set−Up
VCC
VCC
CHANNEL
SELECT
(VI)
ON/OFF
VM
COMMON O/I
ANALOG I/O
OFF/ON
GND
tPLH
ANALOG
OUT
16
VCC
TEST
POINT
CL*
tPHL
6
VM
8
CHANNEL SELECT
VI = GND to 3.0 V
VM = 1.3 V
*Includes all probe and jig capacitance
Figure 11. Propagation Delays, Channel Select
to Analog Out
Figure 12. Propagation Delay, Test Set−Up Channel
Select to Analog Out
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7
MC74HCT4851A
VCC
16
VCC
ANALOG
IN
(VI)
COMMON O/I
ANALOG I/O
ON
VM
TEST
POINT
CL*
GND
tPLH
tPHL
ANALOG
OUT
6
8
VM
VI = GND to 3.0 V
VM = 1.3 V
*Includes all probe and jig capacitance
Figure 13. Propagation Delays, Analog In
to Analog Out
Figure 14. Propagation Delay, Test Set−Up
Analog In to Analog Out
tr
tf
90%
VM
10%
ENABLE
(VI)
tPZL
ANALOG
OUT
2
GND
tPLZ
16
HIGH
IMPEDANCE
10%
1
10kW
ANALOG I/O
TEST
POINT
ON/OFF
2
CL*
VOL
tPHZ
ENABLE
VOH
90%
ANALOG
OUT
VCC
VCC
VM
tPZH
POSITION 1 WHEN TESTING tPHZ AND tPZH
POSITION 2 WHEN TESTING tPLZ AND tPZL
1
VCC
VM
6
8
HIGH
IMPEDANCE
VI = GND to 3.0 V
VM = 1.3 V
Figure 15. Propagation Delays, Enable to
Analog Out
Figure 16. Propagation Delay, Test Set−Up
Enable to Analog Out
VCC
A
VCC
16
ON/OFF
COMMON O/I
NC
ANALOG I/O
OFF/ON
VCC
6
8
11
CHANNEL SELECT
Figure 17. Power Dissipation Capacitance,
Test Set−Up
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8
MC74HCT4851A
Gate = VCC
(Disabled)
Disabled Analog Mux Input
Vin > VCC + 0.7V
P+
Common Analog Output
Vout > VCC
P+
+
+
+
N - Substrate (on VCC potential)
Figure 18. Diagram of Bipolar Coupling Mechanism
Appears if Vin exceeds VCC, driving injection current into the substrate
A
B
C
ENABLE
11
10
9
6
Figure 19. Function Diagram, HC4851A
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9
INJECTION
CURRENT
CONTROL
13
INJECTION
CURRENT
CONTROL
14
INJECTION
CURRENT
CONTROL
15
INJECTION
CURRENT
CONTROL
12
INJECTION
CURRENT
CONTROL
1
INJECTION
CURRENT
CONTROL
5
INJECTION
CURRENT
CONTROL
2
INJECTION
CURRENT
CONTROL
4
INJECTION
CURRENT
CONTROL
3
X0
X1
X2
X3
X4
X5
X6
X7
X
MC74HCT4851A
ORDERING INFORMATION
Package
Shipping†
MC74HCT4851ANG
PDIP−16
(Pb−Free)
500 Units / Box
MC74HCT4851ADG
SOIC−16
(Pb−Free)
48 Units / Rail
MC74HCT4851ADR2G
SOIC−16
(Pb−Free)
2500 Units / Tape & Reel
TSSOP−16*
2500 Units / Tape & Reel
MC74HCT4851ADWG
SOIC−16 WIDE
(Pb−Free)
48 Units / Rail
MC74HCT4851ADWR2G
SOIC−16 WIDE
(Pb−Free)
1000 Units / Tape & Reel
Device
MC74HCT4851ADTR2G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*This package is inherently Pb−Free.
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10
MC74HCT4851A
PACKAGE DIMENSIONS
PDIP−16
N SUFFIX
CASE 648−08
ISSUE T
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
−A−
16
9
1
8
B
F
C
L
DIM
A
B
C
D
F
G
H
J
K
L
M
S
S
SEATING
PLANE
−T−
K
H
G
D
M
J
16 PL
0.25 (0.010)
T A
M
M
INCHES
MIN
MAX
0.740 0.770
0.250 0.270
0.145 0.175
0.015 0.021
0.040
0.70
0.100 BSC
0.050 BSC
0.008 0.015
0.110 0.130
0.295 0.305
0_
10 _
0.020 0.040
MILLIMETERS
MIN
MAX
18.80 19.55
6.35
6.85
3.69
4.44
0.39
0.53
1.02
1.77
2.54 BSC
1.27 BSC
0.21
0.38
2.80
3.30
7.50
7.74
0_
10 _
0.51
1.01
SOIC−16
D SUFFIX
CASE 751B−05
ISSUE J
−A−
16
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
9
−B−
1
P
8 PL
0.25 (0.010)
8
M
B
S
G
R
K
F
X 45 _
C
−T−
SEATING
PLANE
J
M
D
16 PL
0.25 (0.010)
M
T B
S
A
S
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11
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
9.80
10.00
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.386
0.393
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.229
0.244
0.010
0.019
MC74HCT4851A
SOIC−16 WIDE
DW SUFFIX
CASE 751G−03
ISSUE C
A
D
9
h X 45 _
E
0.25
H
8X
M
B
M
16
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INLCUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 TOTAL IN
EXCESS OF THE B DIMENSION AT MAXIMUM
MATERIAL CONDITION.
q
1
MILLIMETERS
DIM MIN
MAX
A
2.35
2.65
A1 0.10
0.25
B
0.35
0.49
C
0.23
0.32
D 10.15 10.45
E
7.40
7.60
e
1.27 BSC
H 10.05 10.55
h
0.25
0.75
L
0.50
0.90
q
0_
7_
8
B
B
16X
M
T A
14X
e
S
B
S
L
A
0.25
A1
SEATING
PLANE
C
T
TSSOP−16
DT SUFFIX
CASE 948F−01
ISSUE A
16X K REF
0.10 (0.004)
0.15 (0.006) T U
M
T U
V
S
S
S
K
ÇÇÇ
ÉÉ
ÇÇÇ
ÉÉ
ÇÇÇ
K1
2X
L/2
16
9
J1
B
−U−
L
SECTION N−N
J
PIN 1
IDENT.
8
1
N
0.15 (0.006) T U
S
0.25 (0.010)
A
−V−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
M
N
F
DETAIL E
−W−
C
0.10 (0.004)
−T− SEATING
PLANE
D
G
H
DETAIL E
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12
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
4.90
5.10
4.30
4.50
−−−
1.20
0.05
0.15
0.50
0.75
0.65 BSC
0.18
0.28
0.09
0.20
0.09
0.16
0.19
0.30
0.19
0.25
6.40 BSC
0_
8_
INCHES
MIN
MAX
0.193 0.200
0.169 0.177
−−− 0.047
0.002 0.006
0.020 0.030
0.026 BSC
0.007
0.011
0.004 0.008
0.004 0.006
0.007 0.012
0.007 0.010
0.252 BSC
0_
8_
MC74HCT4851A
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
13
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
MC74HCT4851A/D
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