Melexis MLX80030 Lin system basis ic Datasheet

MLX80050/51/30/31
LIN System Basis ICs
Datasheet
Features
VS
1
8
VCC
EN
2
7
NRES
MLX80030/50
o
LIN 2.x / SAE J2602 compliant
o
Operating voltage VSUP = 5 ... 27 V
o
3 modes: Normal, Silent and Sleep
o
Linear low drop voltage regulator:
GND
3
5
TxD
LIN
4
5
RxD
MLX80030/31:

Normal mode 3.3V/70mA ±2%

Silent mode 3.3V/20mA ±2%
MLX80050/51:
o

Normal mode 5V/70mA ±2%

Silent mode 5V/20mA ±2
Low current consumption (typ)

Sleep mode 20 A

Silent mode “noload” 45 A
o
Output current limitation
o
LIN-Bus Transceiver

Baud rate up to 20 kBaud

Slew rate control for best EME behaviour

Low slew mode for optimized SAE J2602 transmission

High impedance LIN pin in case of loss of ground or battery

Bus input voltages -24V to 30V independent from VBat
o
Remote and local wake up source recognition
o
VCC undervoltage detection at NRES output (start-up delay 4ms)

Vres threshold 3.0 V (MLX80030/31); Vres threshold 4.1V (MLX80050/51)
o
Programmable Window Watchdog (only MLX80031/51)
o
VSUP undervoltage detection (POR), Over temperature shutdown
o
TxD dominant time out function, Standby mode time out after 350ms
o
Automotive temperature range of –40°C to 125°C
o
Interface I/O’s independent from voltage regulator output
o
Enhanced ESD robustness according to IEC 61000-4-2
o
o
Direct discharge for pin LIN >20kV (only Lin cap connected) and for pin VBAT >15kV
o
Indirect discharge for pin LIN >15kV
Load dump protected (40V)
Order Code
Temp. Range
Package
Delivery
Remark
MLX80050 KDC-CAA-000-RE
MLX80051 KLW-CAA-000-RE
MLX80030 KDC-CAA-000-RE
MLX80031 KLW-CAA-000-RE
-40 - 125 °C
-40 - 125 °C
-40 - 125 °C
-40 - 125 °C
SOIC8
QFN_WF20/5x5
SOIC8
QFN_WF20/5x5
Reel
Reel
Reel
Reel
Silent Mode enabled
Silent Mode enabled
Silent Mode enabled
Silent Mode enabled
Short Description
The MLX8005x/3x consist of a low-drop voltage regulator 5V/3.3V/70mA combined with a Reset/Watchdog unit and a
LIN bus transceiver. The LIN transceiver is suitable for LIN bus systems conform to LIN specification revision 2.x and SAE
J2602. The watchdog times of the integrated window watchdog can be adapted on application needs via external resistors. With the help of an external bipolar transistor it is possible to extend the output current of the integrated voltage
regulator. The combination of voltage regulator and bus transceiver as well as watchdog unit makes it possible to develop simple, but powerful and cheap slave nodes in LIN Bus systems.
MLX80050/51/30/31 – Datasheet
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MLX80050/51/30/31
LIN System Basis ICs
Datasheet
Contents
1. LIST OF TABLES ................................................................................................................................................................ 4
2. LIST OF FIGURES .............................................................................................................................................................. 4
3. ELECTRICAL SPECIFICATION ............................................................................................................................................ 5
3.1. DC CHARACTERISTICS .................................................................................................................................................... 6
3.2. AC CHARACTERISTICS .................................................................................................................................................. 11
3.3. TIMING DIAGRAMS...................................................................................................................................................... 14
4. PIN CONFIGURATION .................................................................................................................................................... 15
4.1. MLX80030 AND MLX80050 - SOIC8 ......................................................................................................................... 15
4.2. MLX80031 AND MLX80051 IN QFN20 ...................................................................................................................... 16
3. FUNCTIONAL DESCRIPTION........................................................................................................................................... 17
3.1. SUPPLY PIN VS........................................................................................................................................................... 19
3.2. EN INPUT PIN ............................................................................................................................................................ 19
3.3. GROUND PIN GND ..................................................................................................................................................... 19
3.4. LIN 19
3.5. RECEIVER OUTPUT RXD ............................................................................................................................................... 19
3.6. TRANSMIT INPUT TXD ................................................................................................................................................. 19
3.6.1. TxD dominant time-out feature .................................................................................................................. 19
3.7. OUTPUT NRES .......................................................................................................................................................... 20
3.8. VOLTAGE REGULATOR PINS VCC AND RTG ...................................................................................................................... 20
3.9. INH OUTPUT (ONLY MLX80031/51) ........................................................................................................................... 20
3.10. WAKE INPUT (ONLY MLX80031/51)......................................................................................................................... 20
3.11. KL15 INPUT (ONLY MLX80031/51) ........................................................................................................................... 20
3.12. WATCHDOG TRIGGER INPUT NWDI (ONLY MLX80031/51) ........................................................................................... 20
3.13. WATCHDOG OSCILLATOR RESISTOR RBWD (ONLY MLX80031/51) ................................................................................... 20
3.14. MODE INPUT MODE (ONLY MLX80031/51) .............................................................................................................. 20
4. OPERATIONAL MODES .................................................................................................................................................. 21
4.1. MODES OVERVIEW ..................................................................................................................................................... 22
4.2. INITIALISATION AND STANDBY MODE .............................................................................................................................. 23
4.3. NORMAL MODE ......................................................................................................................................................... 23
4.4. SILENT MODE ............................................................................................................................................................ 24
4.5. SLEEP MODE ............................................................................................................................................................. 25
4.6. INIT-STATE ................................................................................................................................................................ 27
5. WAKE UP PROCEDURES ................................................................................................................................................ 28
5.1. WAKE UP SOURCE RECOGNITION IN MLX80031/51 ....................................................................................................... 28
6. FUNCTIONALITY ............................................................................................................................................................ 29
6.1. RESET BEHAVIOUR OF MLX8003X/5X .......................................................................................................................... 29
6.2. THERMAL SHUTDOWN ................................................................................................................................................. 29
6.3. VS UNDER VOLTAGE RESET ........................................................................................................................................... 30
6.4. LIN-TRANSCEIVER ...................................................................................................................................................... 30
6.5. VOLTAGE REGULATOR ................................................................................................................................................. 31
7. WINDOW-WATCHDOG (ONLY MLX80031/51) .............................................................................................................. 32
7.1. MLX80031/51 WATCHDOG BEHAVIOUR ...................................................................................................................... 32
7.2. ALL WATCHDOG START-UP SCENARIOS ............................................................................................................................ 33
7.2.1. After power-on and initialization ................................................................................................................ 33
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LIN System Basis ICs
Datasheet
7.2.2. Wake up indicated transition to Standby Mode from Sleep or Silent Mode .............................................. 33
7.2.3. Undervoltage reset on VCC on Normal Mode or Silent Mode .................................................................... 33
7.2.4. EN indicated transition from Silent Mode to Normal Mode ....................................................................... 33
7.3. CALCULATION OF WATCHDOG PERIOD ............................................................................................................................ 34
8. FAIL-SAFE FEATURES ..................................................................................................................................................... 36
9. APPLICATION HINTS ...................................................................................................................................................... 37
9.1. SAFE OPERATING AREA................................................................................................................................................ 37
9.2. APPLICATION CIRCUITRY............................................................................................................................................... 38
10. ESD AND EMC ............................................................................................................................................................. 39
10.1. RECOMMENDATIONS FOR ACTUATOR PRODUCTS ............................................................................................................ 39
10.1.1. Automotive Qualification Test Pulses ......................................................................................................... 40
10.1.2. Test Pulses On supply Lines ........................................................................................................................ 40
10.1.3. Test pulses on Pin LIN ................................................................................................................................. 41
10.1.4. Test pulses on signal lines ........................................................................................................................... 41
10.1.5. EMV Test pulse definition ........................................................................................................................... 42
10.2. TYPICAL APPLICATION CIRCUITRY ................................................................................................................................. 43
10.2.1. External Circuitry on Supply Lines ............................................................................................................... 44
10.2.2. External Circuitry on LIN Lines .................................................................................................................... 44
10.2.3. External Circuitry on Signal Lines ................................................................................................................ 44
11. MECHANICAL SPECIFICATION ..................................................................................................................................... 45
11.1. SOIC8 PACKAGE ...................................................................................................................................................... 45
11.2. QFN20 5X5 PACKAGE............................................................................................................................................... 46
12. REVISION HISTORY ...................................................................................................................................................... 47
13. STANDARD INFORMATION REGARDING MANUFACTURABILITY OF MELEXIS PRODUCTS WITH DIFFERENT SOLDERING
PROCESSES ........................................................................................................................................................................ 49
14. DISCLAIMER ................................................................................................................................................................ 50
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MLX80050/51/30/31
LIN System Basis ICs
Datasheet
1. List of Tables
Table 1: Absolute maximum ratings ................................................................................................................................... 5
Table 2: Voltage Regulator and Reset Unit ......................................................................................................................... 6
Table 3: LIN DC Characteristics ......................................................................................................................................... 10
Table 4: AC Characteristics ............................................................................................................................................... 11
Table 5: MLX80050/30 pin list in SOIC8 ............................................................................................................................ 15
Table 6: MLX80051/31 pin list in QFN20 .......................................................................................................................... 16
Table 7: MLX80050/30 Operation Modes ........................................................................................................................ 22
Table 8: MLX80051/31 Operation Modes ........................................................................................................................ 22
Table 9: Parameters of Window Watchdog ...................................................................................................................... 35
Table 10: Window Watchdog Timing Selection ................................................................................................................ 35
Table 11: Test pulses Supply Line ..................................................................................................................................... 40
Table 12: Test pulses LIN .................................................................................................................................................. 41
Table 13: Test pulses signal lines ...................................................................................................................................... 41
Table 14: Test pulses shapes ISO7637-2 ........................................................................................................................... 42
Table 15: Test pulses shapes ISO7637-3 ........................................................................................................................... 43
Table 12: SOIC8 dimensions.............................................................................................................................................. 45
Table 13: QFN20 Package Dimensions .............................................................................................................................. 46
2. List of Figures
Figure 1: LIN propagation delays ...................................................................................................................................... 14
Figure 2: LIN duty cycles ................................................................................................................................................... 14
Figure 3: MLX80050/30 Block Diagram ............................................................................................................................ 17
Figure 4: MLX80051/31 Block Diagram ............................................................................................................................ 18
Figure 5: MLX8005x3x state diagram of modes of operation........................................................................................... 21
Figure 6: LIN wake-up from Silent Mode .......................................................................................................................... 24
Figure 7 Local Wake-up from Silent Mode via WAKE ....................................................................................................... 25
Figure 8: Remote wake-up from Sleep Mode ................................................................................................................... 26
Figure 9: Local wake-up from Sleep Mode ....................................................................................................................... 27
Figure 10: VCC reset behavior .......................................................................................................................................... 29
Figure 11: MLX80031/51 Watchdog behavior .................................................................................................................. 32
Figure 12: Watchdog timing ............................................................................................................................................. 33
Figure 13: Watchdog open and close window tolerances ................................................................................................ 34
Figure 14: Safe operating area for MLX80030/50 in SOIC-8 for Vsup up to 18V .............................................................. 37
Figure 15: Safe operating area for MLX80031/51 in QFN20 for Vsup up to 18V .............................................................. 38
Figure 16: Application circuit with MLX80050 or MLX80030 (slave node) ....................................................................... 38
Figure 17: Application circuit with MLX80031 or MLX80051 (slave node) ....................................................................... 39
Figure 19: SOIC8 Drawing ................................................................................................................................................. 45
Figure 20: QFN20 Drawing ................................................................................................................................................ 46
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LIN System Basis ICs
Datasheet
3. Electrical Specification
All voltages are referenced to ground (GND), positive currents flow into the IC.
Absolute Maximum Ratings
Table 1: Absolute maximum ratings
Parameter
Condition
Min
Max
Unit
Respective to GND
-0.3
40
V
Transient voltage ISO 7637/2
pulse 1, 2
-100
100
V
Transient voltage ISO 7637/2
pulse 3A; 3B, coupling 1nF
-150
100
V
VLIN_DC
Respective to GND and VS
Loss of Ground (VGND = VS)
-20
-30
40
40
V
VWAKE_DC
Respective to GND and VS
Loss of Ground (VGND = VS)
-20
-30
40
40
V
Supply voltage at VS
DC voltage LIN
DC voltage WAKE
Symbol
VS
DC voltage INH
VINH_DC
-0.3
VS+0.3
V
DC voltage VCC
VVCC_DC
-0.3
7
V
DC voltage RTG
VRTG_DC
-0.3
7
V
VIN
-0.3
7
V
Input voltage at low voltage I/O’s (EN, TxD, RxD,
NRES, WDI, RBWD, MODE)
VESDIEC
IEC 61000-4-2, direct ESD
Pin LIN with LIN cap 220pF
Pin VS to GND
VESDIECind
IEC 61000-4-2, indirect ESD
Pin LIN with LIN cap 220pF
VESDHBM
HBM (CDF-AEC-Q100-002)
Pin LIN
Pin WAKE, KL15, VS
Other pins
VESDCDM
CDM (AEC-Q100-011)
ESD voltage
Power dissipation
Thermal resistance from junction to ambient
20
15
kV
15
kV
±6
±4
±2
kV
kV
kV
±500
V
Internal limited, see
also chapter 9.1
P0
RTHJA_SOIC8
JEDEC 1s0p board, no air
flow
150
K/W
RTHJA_QFN20
JEDEC 1s0p board, no air
flow
50
K/W
Junction temperature
TJ
-40
150
°C
Storage temperature
TSTG
-55
150
°C
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MLX80050/51/30/31
LIN System Basis ICs
Datasheet
3.1. DC Characteristics
Unless otherwise specified all values in the following tables are valid for VS = 5 to 27V and
o
TAMB = -40 to 125 C. All voltages are referenced to ground (GND), positive currents flow into the IC.
For MLX80031/51 apply: RTG connected to VCC.
Table 2: Voltage Regulator and Reset Unit
Parameter
Symbol
Condition
Min
Typ
Max
Unit
T[1]
5
27
V
A
Supply Voltage Pin VS
Nominal DC operating voltage
VS
1.01
VS under voltage reset
VSUVR_OFF
VS ramp up
4.1
5.0
V
A
1.02
VS under voltage reset
VSUVR_ON
VS ramp down
3.7
4.8
V
A
1.03
VS under voltage reset hysteresis
VSUVR_HYS
VSUVR_OFF - VSUVR_ON
0.04
0.3
0.7
V
A
VS  14V, VEN > 2V ,
LIN recessive, no load at
VCC
400
750
1500
A
A
Supply currents MLX80030, MLX80050
2.00
Supply current, normal mode
IVS_nor
VS  14V
2.01
Supply current, sleep mode
IVS_sleep
2.02
Supply current, silent mode
IVS_sil
TA = -40 °C
TA = 25 °C
TA  85 ° C
TA  125 °C
15
VS  14V, LIN recessive
no load at VCC
TA = -40 °C
TA = 25 °C
TA  85 ° C
TA  125 °C
65
30
20
30
45
85
95
100
125
A
A
A
A
Supply currents MLX80031, MLX80051
2.00
Supply current, normal mode
IVS_nor
VS  14V, VEN > 2V ,RBWD =
60k
LIN recessive, no load at
VCC
VS  14V
2.01
Supply current, sleep mode
IVS_sleep
2.02
Supply current, silent mode
IVS_sil
MLX80050/51/30/31 – Datasheet
3901080050
TA = -40 °C
TA = 25 °C
TA  85 ° C
TA  125 °C
VS  14V, LIN recessive
no load at VCC
TA = -40 °C
TA = 25 °C
TA  85 ° C
TA  125 °C
Page 6
400
750
15
65
1500
30
20
30
45
85
95
100
125
A
A
A
A
A
A
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MLX80050/51/30/31
LIN System Basis ICs
Datasheet
Voltage Regulator Pin VCC
MLX80050, MLX80051 (RTG connected to VCC)
3.01
Output voltage VCC
Output voltage VCC under
disturbances functional state A
3.02
3.03
Drop-out voltage [2]
3.04
3.05
Line regulation
3.06
3.07
Load regulation
3.08
VCCn5
6V  VS  18V
1mA  ILOAD  70mA
TA = 25°C
TA = -40°C to 125°C
4.90
4.85
5.0
5.10
5.15
V
A
5.25
V
C
VCCndis5
6V  VS  18V, TA = 25°C
RLOAD = 330 
VD10_5
VS  4V , IVCC = 10mA
75
120
mV
C
VD30_5
VS  4V , IVCC = 30mA
220
350
mV
C
VD70_5
VS  4V , IVCC = 70mA
500
800
mV
C
VLNR5
6V  VS  18V, IVCC = 30mA
6V  VS  18V, IVCC = 70mA
20
100
mV
A
VLDR10_5
1 mA < ILOAD < 10 mA
50
mV
A
VLDR30_5
1 mA < ILOAD < 30 mA
90
mV
A
VLDR70_5
1 mA < ILOAD < 70 mA
150
mV
A
-75
-80
mA
A
F
D
V
A
3.465
V
C
4.75
VS > 6V
3.09
Output current limitation [3]
3.10
Load capacity
IVCCLIM_5
TA = -40 °C
25 °C  TA  125 °C
CLOAD
-135
-150
-110
2.2
22
3.234
3.201
3.3
MLX80030, MLX80031 (RTG connected to VCC)
3.01
Output voltage VCC
VCCn3
4 V  VS  18 V
1m A  ILOAD  70 mA
TA = 25 °C
TA = -40 °C to 125 °C
3.366
3.399
Output voltage VCC under
disturbances functional state A
VCCndis3
6 V  VS  18 V, TA = 25 °C
RLOAD = 330 
Drop-out voltage [2]
VD10_3
VS  3 V , IVCC = 10 mA
100
mV
C
3.03
VD30_3
VS  3 V , IVCC = 30 mA
300
mV
C
3.04
VD70_3
VS  3 V , IVCC = 70 mA
700
mV
C
5 V  VS  18 V, IVCC = 30mA
5V  VS  18V, IVCC = 70mA
20
100
mV
A
3.02
3.135
3.05
Line regulation
VLNR_3
3.06
Load regulation
VLDR10_3
1 mA < ILOAD < 10 mA
50
mV
A
3.07
VLDR30_3
1 mA < ILOAD < 30 mA
90
mV
A
3.08
VLDR70_3
1 mA < ILOAD < 70 mA
150
mV
A
-75
-80
mA
A
F
D
VS > 4 V
3.09
Output current limitation [3]
3.10
Load capacity
MLX80050/51/30/31 – Datasheet
3901080050
IVCCLIM_3
TA = -40 °C
25 °C  TA  125 °C
CLOAD
Page 7
-135
-150
-110
2.2
22
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LIN System Basis ICs
Datasheet
Output Pin NRES
4.01
Output voltage low
VOL_NRES
INRES = 1 mA
4.02
Leakage current low
Ileak_RxD
VNRES = 0 V
4.03
Leakage current high
Ileak_RxD
VNRES = VCC
Output voltage high NRES
under disturbances to fulfil
functional state A
VOH_NRES
Rload = 2.7 k to VCC
0.25
V
A
-5
5
µA
A
-5
5
µA
A
V
C
4.3
V
A
200
mV
C
3.15
V
A
VCC -1
MLX80050, MLX80051
5.01
VCC reset threshold on NRES
pin
VRES5V
5.02
VRES Hysteresis
VRESHYS = |VRES(ON) – VRES(OFF)|
VRESHYS5V
t > trr
3.9
4.10
MLX80030, MLX80031
5.01
VCC reset threshold on NRES
pin
VRES3V
5.02
VRES Hysteresis
VRESHYS = |VRES(ON) – VRES(OFF)|
VRESHYS3V
100
mV
C
0.8
V
A
V
A
t > trr
2.75
2.95
Input Pin EN
6.01
Input voltage low
VIL_EN
6.02
Input voltage high
VIH_EN
2.0
6.03
Hysteresis
VHYS_EN
50
100
700
mV
C
6.04
Pull-down resistor
Rpd_EN
50
125
250
k
A
V
A
VS-3.3V
V
A
-1
µA
A
VEN =VCC
Input Pin WAKE (MLX80031, MLX80051)
7.01
High level input voltage
VIH_WAKE
Sleep mode
VS-1V
7.02
Low level input voltage
VIL_WAKE
Sleep mode
7.03
Pull up current WAKE
IWAKE_PU
Normal & sleep
-30
7.04
Leakage current WAKE high
IWAKE_lk
VS = 18V
-5
5
µA
A
-15
Input Pin KL15 (MLX80031, MLX80051)
8.01
High level input voltage
VIH_KL15
Rv = 50k
4
VS+0.3V
V
A
8.02
Low level input voltage
VIL_KL15
Rv = 50k
-1
2
V
A
8.03
Pull down current KL15
IKL15_PD
65
µA
A
0.8
V
A
V
A
600
mV
C
600
k
A
30
Input Pin MODE (MLX80031, MLX80051)
23.01
Input voltage low
VIL_MODE
23.02
Input voltage high
VIH_MODE
2.0
23.03
Hysteresis
VHYS_MODE
50
23.04
Pull-down resistor
Rpd_MODE
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VMODE = VCC
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LIN System Basis ICs
Datasheet
Input Pin NWDI (MLX80031, MLX80051)
9.01
Input voltage low
VIL_NWDI
0.8
9.02
Input voltage high
VIH_NWDI
2.0
9.03
Hysteresis
VHYS_NWDI
50
100
9.04
Pull-up resistor to VCC
Rpu_NWDI
125
250
9.05
Min low pulse width
VNWDI = 0V
Tminlow_NWDI one WD_OSC clock period
V
A
V
A
600
mV
C
375
k
A
1
D
V
A
1
Watchdog Oscillator pin RBWD (MLX80031, MLX80051)
10.01
Voltage at RBWD
VRBwd
10.02
Range of RBWD resistance
RBWD
10.03
RBWD short resistance threshold to enable fail-safe state
IOUT = -50 A
1.2
20
150
k
B
0
330

B
60

A
RBWDSH
see paragraph 7.3
RON_INH
VS = 12V
IleakH_INH
Sleep Mode, VINH = 18V,
VS = 18V
-5
5
µA
A
IleakL_INH
Sleep Mode, VINH = 0V,
VS = 18V
-5
5
µA
A
170
190
°C
D
10
30
°C
D
Output INH (MLX80031, MLX80051)
11.01
ON Resistance
11.02
Leakage current INH high
11.03
Leakage current INH low
20
Thermal Protection
Thermal shutdown
TJSHD
Thermal hysteresis
TJHYS
155
Notes:
[1]
A = 100% serial test, B = Operating parameter, C = characterization data,
D = Value guaranteed by design
[2]
The nominal VCC voltage is measured at VSUP = 12V. If the VCC voltage is 100mV below its nominal value then the voltage drop is VD =
VSUP – VCC
[3]
Functionality range of current limitation at silent mode is limited by reset threshold VRES. Below them the IC change to normal mode.
Validity for IVCC_MAXsil: VCCn (min) ≤ VCC ≤ VRES
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LIN System Basis ICs
Datasheet
Table 3: LIN DC Characteristics
Parameter
Symbol
Condition
Min
Typ
Max
Unit
T[1]
80
A
A
60
k
A
µA
A
General
12.01
Pull up current LIN (recessive)
IINLINpu
VLIN = 18 V, VS = 6V
12.02
Pull up resistor LIN
RLINpu
VS = 12V, VLIN = 0V
20
12.03
Reverse current LIN
(dominant)
IINLINdom
VS = 12V, VLIN = 0V
-400
12.04
Reverse current LIN
(recessive)
IINLINrec
VLIN  VS, 8V  VLIN 
18V,
8V  VS  18V
0
23
µA
A
12.05
Reverse current LIN
(loss of battery)
IINLIN_lob
VS = 0V, 0V  VLIN 
18V
0
23
µA
A
12.06
Reverse current LIN
(loss of ground)
IINLIN_log
VS= 12V, 0V  VLIN 
18V
-10
50
µA
A
Voltage drop serial Diode
VSerDiode
1.0
V
D
Battery Shift
VShift_BAT
related to VS
0
11.5
%
D
Ground Shift
VShift_GND
related to VS
0
11.5
%
D
Ground-Battery shift difference
VShift_diff
related to VS
0
8
%
D
0.4
30
0.7
Receiver
Receiver dominant voltage
VBUSdom
Receiver recessive voltage
VBUSrec
12.08
Centre point of receiver
threshold Vthr_cnt =
(Vthr_rec+Vthr_dom)/2
Vthr_cnt
12.09
Receiver Hysteresis
Vhys = Vthr_rec-Vthr_dom
12.07
0.4*VS
A
0.6*VS
7.0 V  VS  18 V
0.475*VS
Vhys
A
V
0.5*VS
0.525*VS
A
0.15*VS
0.175*VS
A
D
Transmitter
12.10
Transmitter dominant voltage
12.11
Current limitation LIN
12.12
Transmitter recessive voltage
Rload = 500, VS = 5V
0
1.2
Rload = 500, VS >=
7V
0
0.2*VS
ILIM
VLIN = VS, TxD = 0V
40
VohBUS
No load, VEN = 0/5V,
VTxD = 5V
0.8*VS
rising
VoIbus
120
V
A
200
mA
A
VS
V
A
0.8
V
A
V
A
Input/Output Pin TxD
13.01
Input voltage low TxD
VIL_TxD
13.02
Input voltage high TxD
VIH_TxD
MLX80050/51/30/31 – Datasheet
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LIN System Basis ICs
Datasheet
13.03
Hysteresis
VHYS_TxD
50
13.04
Pull-up resistor to VCC
Rpu_TxD
VTxD = 0V
125
13.06
Low level output current
IOL_TxD
local wake-up request;
standby mode;
VTxD = 0.4V
1.5
250
700
mV
C
375
k
A
mA
A
0.6
V
A
7
k
A
5
µA
A
V
C
Output Pin RxD
14.01
Output voltage low RxD
VOL_RxD
IRxD = 2 mA
14.02
Pull-up resistor to VCC
Rpu_RxD
VRxD = 0V
3
14.03
Leakage current high
Ileak_RxD
VRxD = VCC
-5
Output voltage high RxD
under disturbances to fulfil
functional state A
VOH_RxD
Rload = 2.7k to VCC
5
VCC -1
Notes:
[1]
A = 100% serial test, B = Operating parameter, C = characterization data,
D = Value guaranteed by design
3.2. AC Characteristics
6V  VS  27V, -40°C  TA  125°C, RTG connected to VCC, unless otherwise specified
Table 4: AC Characteristics
Parameter
Symbol
Condition
Min
Typ
Max
Unit
T
[1]
Reset parameter on NRES
16.01
Reset time
16.02
Reset rising time
tRes
VS = 14V
2.5
4
5.5
ms
A
trr
VS = 14V
3.0
6.5
12
s
A
Watchdog parameter on NRES (MLX80031, MLX80051)
17.01
tWDOSC20
RBWD = 20k1%
6.87
8.09
9.30
s
A
17.02
tWDOSC60
RBWD = 51k1%
16.06
18.90
21.73
s
A
tWDOSC100
RBWD =
100k1%
30.58
35.98
41.37
s
A
tWDOSC150
RBWD =
150k1%
45.40
53.41
61.42
s
A
17.03
Watchdog-Oscillator Period
17.04
Watchdog Close Window
Watchdog Open Window
17.05
Watchdog Reset Low Time
Watchdog Lead Window
17.06
Watchdog Safety Oscillator
MLX80050/51/30/31 – Datasheet
3901080050
tCW
tCW = cycles *
tWDOSC
1053
cycles
D
tOW
tOW = cycles *
tWDOSC
1105
cycles
D
ms
A
cycles
D
µs
A
tWDres
tLDT
tWDsafety
3
tOWS = cycles *
tWDOSC
RBWD open /
RBWD gnd
Page 11
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5
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30
50
75
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MLX80050/51/30/31
LIN System Basis ICs
Datasheet
Parameter
Symbol
Condition
[1]
Min
Typ
Max
Unit
30
70
150
s
A
50
s
A
T
Wake-up and Mode Control
18.01
Remote Wake-up filter time
twu_remote
18.02
Wake-up filter time on WAKE
(only MLX80051,MLX80031)
twu_WAKE
Sleep or Silent
Mode,
WAKE falling edge
10
18.03
Wake-up filter time on KL15
(only MLX80051,MLX80031)
twu_KL15
Sleep or Silent
Mode,
KL15 rising edge
80
168
250
s
A
18.04
Propagation delay from Normal
Mode to Sleep Mode via EN
tpd_sleep
VEN = 0V
5
15
20
s
A
18.05
Propagation delay from Standby
Mode to Normal Mode via EN
tpd_norm
VEN = 5V
5
15
20
s
A
18.06
Propagation delay from Silent
Mode to Normal Mode via EN
tpd_sil_n
VEN = 5V
Silicon Revision C
5
15
40
s
A
18.07
Propagation delay: go to
silent mode after EN=H/L
tpd_sil
check falling edge
on RBwd, EN = 0V
Silicon Revision C
20
s
A
Setup time TxD to EN for low
slew mode
tset_TxD_EN
5
s
B
Hold time TxD after EN for low
slew mode
thold_TxD_EN
20
s
B
2
20
s
A
18.08
Debouncing time EN
tdeb_EN
18.09
TxD dominant time out
tTxD_to
Normal Mode,
VTxD = 0V
27
60
ms
A
18.10
Standby time out
tsby_to
Standby Mode,
VEN= 0V
150
500
ms
A
18.11
Wake up time vs. EN
twu_EN
Wake form sleep
via EN=L/H
20
s
A
tdr_RxD
tdf_RxD
CL(RXD) = 50 pF
6
s
A
tdsym_RxD
tdr_RXD - tdf_RXD
2
s
A
4.0
s
D
2
5
5
General LIN Parameter
19.01
Receiver propagation delay
LIN -> RxD
19.02
Symmetry prop. delay LIN->RxD
19.03
Receiver debouncing time
MLX80050/51/30/31 – Datasheet
3901080050
tdeb_LIN
-2
1.5
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LIN System Basis ICs
Datasheet
19.04
slew rate rising edge LIN
dV/dTrise
19.05
slew rate falling edge LIN
dV/dTfall
19.06
slew rate rising edge LIN
dV/dTrise
19.07
slew rate falling edge LIN
dV/dTfall
Internal capacity
CLIN
Normal Mode
LIN-Load: 1kΩ/1nF
Low Slew Mode
LIN-Load: 1kΩ/1nF
1.0
1.5
2.5
V/s
C
-2.5
-1.5
-1.0
V/s
C
0.3
0.8
1.3
V/s
C
-1.3
-0.8
-0.3
V/s
C
25
35
pF
D
Pulse at LIN via
10kOhm with 0/10V;
VS = open
LIN transceiver parameter according to LIN Physical Layer Spec. rev. 2.0, table 3.4 (20kbit/s)
Conditions:
Normal slew mode; VS =7.0V to 18V; LIN loads: 1k/1nF; 660/6.8nF; 500/10nF
TxD signal: tBit = 50µs, twH = TwL = tBit; trise = tfall < 100ns
Minimal recessive bit time
trec(min)
40
50
58
s
Maximum recessive bit time
trec(max)
40
50
58
s
20.01
Duty cycle 1
D1
D1 = trec(min) / (2*tBit)
20.02
Duty cycle 2
D2
D2 = trec(max) / (2*tBit)
0.396
A
0.581
A
Transceiver parameter according to LIN Physical Layer Spec. rev. 2.0, table 3.4 (10.4kbit/s)
Conditions:
Low slew mode; VS =7.0V to 18V; LIN loads: 1k/1nF; 660/6.8nF; 500/10nF
TxD signal: tBit = 96µs, twH = TwL = tBit; trise = tfall < 100ns
Minimal recessive bit time
trec(min)
80
96
113
s
Maximum recessive bit time
trec(max)
80
96
113
s
21.01
Duty cycle 1
D3
D3 = trec(min) / (2*tBit)
21.02
Duty cycle 2
D4
D4 = trec(max) / (2*tBit)
0.417
A
0.590
A
LIN transceiver parameter according to SAE J2602 (10.4kbit/s)
Conditions:
Low slew mode; VS =7.0V to 18V; LIN loads: 1k/1nF;660/6.8nF;500/10nF
TxD signal: tBit = 96µs, twH = TwL = tBit; trise = tfall < 100ns
22.01
Minimal recessive delay
TxD -> LIN
tx_rec_min
48
s
A
22.02
Maximum recessive delay
TxD -> LIN
tx_rec_max
48
s
A
22.03
Minimal dominant delay
TxD -> LIN
tx_dom_min
48
s
A
22.04
Maximum dominant delay
TxD -> LIN
tx_dom_max
48
s
A
22.05
Maximum rec. to dom. delay
Tr_d_max
tx_rec_max - tx_dom_min
15.9
s
A
22.06
Maximum dom. to rec. delay
Td_r_max
tx_dom_max - tx_rec_min
17.2
s
A
Notes:
[1]
A = 100% serial test, B = Operating parameter, C = characterization data,
D = Value guaranteed by design
MLX80050/51/30/31 – Datasheet
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LIN System Basis ICs
Datasheet
3.3. Timing diagrams
50%
TxD
tdf_TXD
tdr_TXD
VBUS
100%
95%
LIN
50%
50%
5%
0%
tdr_RXD
tdf_RXD
RxD
50%
transceiver_delays.vsd
Figure 1: LIN propagation delays
tBit
tBit
TxD
tx_rec_max
tx_dom_max
tx_dom_min
VSUP
trec(min)
tx_rec_min
100%
tdom(max)
74.4%
(77.8%)
tdom(min)
LIN
58.1%
(61.6%)
28.4%
(25.1%)
VSS
58.1%
(61.6%)
42.2%
(38.9%)
Level for LSM in brackets
trec(max)
28.4%
(25.1%)
0%
timing_lin20.vsd
Figure 2: LIN duty cycles
MLX80050/51/30/31 – Datasheet
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LIN System Basis ICs
Datasheet
4. Pin Configuration
4.1. MLX80030 and MLX80050 - SOIC8
VS
1
8
VCC
EN
2
7
NRES
MLX80030/50
GND
3
5
TxD
LIN
4
5
RxD
Table 5: MLX80050/30 pin list in SOIC8
Pin
Name IO-Typ
Description
1
VS
P
Battery supply voltage
2
EN
I
Mode control pin, enables the normal operation mode when HIGH
3
GND
G
Ground
4
LIN
I/O
LIN bus transmitter/receiver pin,
(low = dominant)
5
RxD
I/O
Received data from LIN bus, low in dominant state; internal pull-up resistor
6
TxD
I/O
Transmit data input (low = dominant)
7
NRES
O
Undervoltage reset output (open drain),
low active
8
VCC
P
Voltage regulator output
MLX80050/51/30/31 – Datasheet
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LIN System Basis ICs
Datasheet
4.2. MLX80031 and MLX80051 in QFN20
Table 6: MLX80051/31 pin list in QFN20
Pin
Name
IO-Typ
Description
1
EN
I
2
NC
3
NWDI
I
Watchdog trigger input; negative edge; pull-up
4
WAKE
I
High voltage input for local wake up, negative edge triggered
5
GND
G
Ground
6
NC
7
LIN
8
NC
9
RxD
I/O
Received data from LIN bus, low in dominant state; internal pull-up resistor
10
INH
O
High side switch; High voltage
11
TxD
I/O
Transmit data input (low = dominant)
12
NRES
O
Reset output (open drain), low active
13
RBWD
I/O
Bias resistor for watchdog oscillator
14
NC
15
MODE
I
Input to control window watchdog
16
KL15
I
High voltage input for local wake up, positive edge triggered
17
NC
18
VCC
I
Voltage regulator sense input
19
RTG
P
Voltage regulator output
20
VS
P
Battery supply voltage
EP
G
Exposed pad should be connected to Ground
Mode control pin, enables the normal
operation mode when HIGH
not connected
not connected
I/O
LIN bus transmitter/receiver pin,
(low = dominant)
not connected
not connected
not connected
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LIN System Basis ICs
Datasheet
3. Functional Description
The MLX8003x/5x consists of a low drop 3.3V/5V voltage regulator capable to drive 70mA and a LIN bus transceiver,
which is a bi-directional bus interface for data transfer between LIN bus and the LIN protocol controller. Additionally
integrated is a Window-Watchdog/RESET unit with a fixed power-on-reset delay of 4 ms and an adjustable watchdog
time defined by an external bias resistor.
VS
VCC
control
amplifier
Aux.
Supply
3
5
VBG
POR
4.1 V /
2.9V
Temp.
Protection
Adjust
ment
VS
TSHD
Undervoltage
Reset
UVR
Mode
Control
EN
Reset
Generator
VBG
SBY
6bit Reg Calib
ZZ 16bit
4bit
BG
BG
current
limitation
Standby
timer
350k
Reset
PORTimer
RESETBuffer
NRES
fosc
RC
osc.
VSS
VCC
Wake-Filter
Receiver
VSUP
5k
70s
Vaux
RxDBuffer
RxD
Rec-Filter
30k
VCC
Transmitter
LIN
SBY
Driver
control
250k
TxDTimeout
TxD
POR
Figure 3: MLX80050/30 Block Diagram
MLX80050/51/30/31 – Datasheet
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LIN System Basis ICs
Datasheet
VS
RTG
Vaux
control
amplifier
Aux.
Supply
VBG
VBG
BG
VCC
Reset
Generator
Vaux
Vaux
5
Adjust
ment
POR
4.1 V /
2.9V
Vaux
POR
TSHD
SBY
6bit Reg Calib
ZZ 16bit
4bit
BG
3
current
limitation
5V / 3.3V
VSUP
TSHD
RC
osc.
Undervoltage
Reset
POR
UVR
Standby
timer
Test logic
TxDTimeout
timer
EN
INH
fosc
Reset
PORTimer
RESETBuffer
NRES
Window
watchdog
Mode
Control
350k
VS
91kHz
SBY
ZZ
Control
Vaux
VCC
VS
RxDcontrol
Wake_sig
fwdosc
WD
Osc
VBG
WAKE
RBWD
VCC
250k
KL15_sig
WDI_sig
KL15
VS
Wake-Filter
70s
MODE
TxD_out
Receiver
to_RxD
Vaux
Vaux
250k
VCC
RecFilter
30k
5k
RxD_out
Transmitter
LIN
VSS
NWDI
SBY
Driver
control
RxDBuffer
RxD
VCC
250k
UVR_POR
TxD
VSS
Figure 4: MLX80051/31 Block Diagram
MLX80050/51/30/31 – Datasheet
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LIN System Basis ICs
Datasheet
3.1. Supply Pin VS
VS is the operational voltage pin of MLX8005x/3x. The voltage range is VS = 6 to 18V. After switching on VS, the
MLX8003x/5x starts at Standby Mode and the VCC voltage regulator ramps up. An undervoltage detection unit prevent
an undefined operation for Vs < 4V.
VS- Power-ON
If VS is switched on, the MLX8003x/5x starts in Standby Mode. A combination of dynamic POR and under voltage reset
circuitry generates a POR signal, which switches the MLX8003x/5x on. This power on behaviour is independent from the
status of the EN-pin.
Power-on reset and under-voltage reset operate independent from each other, which secures the independence from
the rise time of VS.
3.2. EN input pin
The ENable input is the mode control pin of MLX8003x/5x in combination with the TxD input.
The MLX8003x/5x is switched into the Sleep Mode with a falling edge and into normal mode with a rising edge at the
EN pin. The state machine goes to Normal Mode after t Res (see also Table 4: AC Characteristics). The Normal Mode will
be kept as long as EN remains high.
The Normal Mode can be entered from Standby Mode, when the pin EN is driven HIGH. To prevent unwanted mode
transitions, the EN input contains a debounce filter as specified (t EN_deb).
The pin EN contains a weak pull down resistor. The input thresholds are compatible to 3.3V and 5V supply systems.
MLX80031/51:
Additionally the positive edge on pin EN results in an immediate reset of the active low interrupt on pin RxD as well as
the wake-up source recognition flag on pin TxD.
3.3. Ground pin GND
This is the reference pin of the IC. The absence of GND connection will not influence or disturb the communication between other LIN bus nodes.
3.4. LIN
This bidirectional pin consists of a low side driver in the output path and a high-voltage comparator in the input
path. Furthermore is integrated a LIN pull-up resistor between LIN and VS pin. Low side driver consist a current limitation.
3.5. Receiver Output RxD
The pin RxD is a buffered open drain output. Output signals can be shifted by the external pull up resistor to 3.3V and
5V supply systems.
3.6. Transmit Input TxD
The transmit data stream of the LIN protocol controller applied to the pin TxD is converted into the LIN bus signal with
slew rate control in order to minimize electromagnetic emissions.
The pin TxD contains a weak pull up resistor. The input thresholds are compatible to 3.3V and 5V supply systems. To
enable the transmit path, the TxD pin has to be driven recessive (HIGH) after or during the normal mode has been entered.
3.6.1. TxD dominant time-out feature
With the first dominant level on pin TxD after the transmit path has been enabled, the dominant time-out counter is
started. In case of a faulty blocked permanent dominant level on pin TxD the transmit path will be disabled after the
specified time tTxD_to. The time-out counter is reset by the first negative edge on pin TxD.
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Datasheet
3.7. Output NRES
The NRES pin outputs the reset state as well as the watchdog condition in MLX80031 and MLX80051.
3.8. Voltage regulator pins VCC and RTG
The MLX80030/50 has an integrated low drop linear regulator with a p-channel-MOSFET as driving transistor. This regulator outputs a voltage of 5V ±2% (MLX80050/51) or 3.3V ±2% (MLX80030/31) with a load current of max. 70mA. The
current limitation unit limits the output current for short circuits or overload to 130mA by decreasing the VCC voltage.
This way the power dissipation is held constant at a maximum value.
The voltage regulator has two pins, output pin RTG and sense input pin VCC. For MLX80030/50 both, RTG and VCC, are
commonly bonded to pin VCC on the package.
Devices MLX80031/51 has both pins bonded and provides the possibility to use an external npn transistor to boost the
maximum load current. In this case the basis of the npn transistor has to be connected to the RTG pin and the emitter
to the VCC pin. In case of using the internal voltage regulator, both pins have to be connected to each other.
3.9. INH Output (only MLX80031/51)
INH switches to high (VS connected to INH) in case of Standby or Normal Mode. INH is switched off at Silent and Sleep
Mode. The pin will be used for switch on an external power supply or for switch off the external 1k master resistor in
master node applications.
3.10. WAKE Input (only MLX80031/51)
High voltage input pin for local wake-up functionality. With a falling edge on WAKE the IC wakes-up from Silent Mode
or Sleep Mode to Standby Mode.
The pin WAKE provides a weak pull up current source towards Vs which provides a HIGH level on the pin in case of open
circuit failures or if no local wake-up feature is required. In such applications it is recommended to connect the pin
WAKE directly to pin Vs in order to prevent influences due to EMI.
3.11. KL15 Input (only MLX80031/51)
High voltage input pin for local wake-up functionality. With a rising edge on KL15 the IC wakes-up from Silent Mode or
Sleep Mode to Standby Mode.
The pin KL15 provides a weak current sink towards GND which provides a LOW level on the pin in case of open circuit
failures or if no local wake-up feature is required. In such applications it is recommended to connect the pin KL15 directly to GND in order to prevent influences due to EMI. KL15 is typically connected to the ignition terminal and generates a local wake-up at start of ignition.
3.12. Watchdog Trigger Input NWDI (only MLX80031/51)
This input is used to trigger the integrated window watchdog in MLX80031/51. Every falling edge on NWDI in watchdog
open window is used to reset the watchdog timer. An internal pull up resistor of 250k secures a stable high condition if
this pin is open. The NWDI input is a low voltage CMOS input. The minimum low time of NWDI is one WD_OSC clock
period to allow falling edge detection.
3.13. Watchdog Oscillator Resistor RBWD (only MLX80031/51)
A resistor between RBWD and GND defines the window watchdog times as trigger time.
3.14. Mode Input MODE (only MLX80031/51)
Special pin for to disable the window watchdog function. For normal watchdog operation connect the MODE pin to
GND directly or via external resistor. With MODE pin on 3.3V/5V the window watchdog is switched off.
MLX80050/51/30/31 – Datasheet
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LIN System Basis ICs
Datasheet
4. Operational Modes
The MLX8003x/5x provides four main operating modes “Standby”, “Normal”, “Silent” and “Sleep”. The main modes are
fixed states defined by basic actions (VS start, EN or wake-up).
Start Vaux;
Regulator OFF
VSUP power on
Init
Regulator on; VCC ramp up
VCC cross reset threshold -> start tres
LIN transmitter off
LIN termination 30k
--------------------------------------------------after power on:
RxD: high
TxD: high
after wake up:
RxD: low
TxD: wake source output
End of Initialization
Standby
Local wake-up or
Remote wake-up
or EN = L/H
Local wake-up or
Remote wake-up or
Vcc < VRES
Vcc < VRES
SleepMode
EN = H[2] or L/H [1]
t > tsby (350ms) &
Vcc > VRES
EN = H/L & TxD =H
Silent
Mode
EN = H/L & TxD=L
EN = L/H
Regulator off
LIN transmitter off
LIN termination 200k
----------------------------------------------RxD: floating (0V)
TxD: floating (0V)
Regulator on
LIN transmitter off
LIN termination 30k
-----------------------------------------RxD = high
TxD = high
Normal
Mode
Regulator on
NRES = H
LIN transmitter on
LIN termination 30k
-----------------------------------------------RxD:= data output
TxD:= data input
[1] Set Slew Mode:
Normal => EN=L/H & TxD=H (default)
Low Slew => EN=L/H & TxD=L
[2] Only after Wake-up from Sleep mode
with EN=L/H
Figure 5: MLX8005x3x state diagram of modes of operation
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4.1. Modes Overview
Table 7: MLX80050/30 Operation Modes
[1]
Mode
VCC
TxD
RxD
LIN
remarks
Standby
3.3V/5V
high
high
recessive
entered after power
on or wake up
Normal
3.3V/5V
input for
transmit data
stream
output for LIN data
stream
follows TxD
[1]
Silent
3.3V/5V
high
high
recessive
high = 3.3V/5V
Sleep
0
floating
floating
recessive
remote wake up to
enter Standby Mode,
EN = H to go to Normal Mode
Normal mode will be entered form Standby Mode by a low -> high transition on pin EN and from Sleep Mode by EN = H after startup of the
regulator. When recessive level (high) on pin TxD is present the transmit path will be enabled
Table 8: MLX80051/31 Operation Modes
[1]
[2]
[3]
[4]
[5]
Mode
VCC
TxD
RxD
LIN
INH
Watchdog
remarks
Standby
3.3V/5V
High/ active
[1]
low
high/
active
[2]
low
recessive
ON
ON
entered after
power on or
wake up
Normal
3.3V/5V
input for
transmit
data stream
output for
LIN data
stream
follows
TxD
ON
ON
[3] [4] [5]
Silent
3.3V/5V
high
high
recessive
OFF
OFF
Sleep
0
floating
floating
recessive
OFF
OFF
Local or remote
wake up to
enter Standby
Mode, EN = H to
go to Normal
Mode
Indicates the wake up flag in case of local wake up
After power on RxD is going high via pull-up to Vcc. If any wake up(local or remote) occurs it will be indicated by active low
Active low interrupt at pin RxD will be removed when entering normal mode
Wake up source flag at pin TxD will be removed when entering normal mode
Normal mode will be entered from Standby Mode by a low -> high transition on pin EN and from Sleep Mode by EN = H after startup of the
regulator. When recessive level (high) on pin TxD is present the transmit path will be enabled
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4.2. Initialisation and Standby mode
When the battery supply voltage VS exceeds the specified threshold V SUVR_OFF, the MLX8003x/5x automatically enters
the Standby Mode. Following internal procedure is running:
First:
 Start of internal supply Vaux and POR of Vaux
 Start of internal RC oscillator
Second and parallel after POR:
 Start of voltage regulator
The output voltage VCC ramps up to nominal value. The pin RxD is floating and the integrated slave pull up resistor with
decoupling diode pulls the pin LIN. The transmitter as well as the receiver is disabled.
If there occurs no mode change to Normal Mode via an EN LOW to HIGH transition within the time stated (typically
350ms), the IC enters the most power saving Sleep Mode.
Furthermore the standby mode will be entered after a valid local or remote wake up event, when the MLX8003x/5x is
in Sleep or Silent mode. The entering of the standby mode after wake up will be indicated by an active LOW interrupt
on pin RxD.
4.3. Normal Mode
This mode is the base mode. The bus transceiver is able to send with a max baud rate of 20kbit/s.
The whole MLX8003x/5x is active. The incoming bus traffic is detected by the receiver and transferred via the RxD output pin to the microcontroller.
Exit the Normal Mode with one of the following conditions:
1. High-to-low edge on EN pin with TxD = H -> switch to Silent Mode
2. High-to-low edge on EN pin with TxD = L -> switch to Sleep Mode
3. Undervoltage monitor on VCC detects a low voltage reset condition (VCC < V RES) -> switch back to
stand-by mode.
Low Slew Mode
The first rising edge on EN after power-on defines the slew rate of the device. With TxD = High at this point works the
MLX8003x/5x with normal slew rate (default state). TxD = Low activates the Low Slew Mode, as long as VS > V SUVR_OFF.
In this mode the slew rate is switched from the normal value of typ. 1.6V/µs to a low value of typ. 0.8V/µs. This mode is
optimized to send with a maximum baud rate of 10.4kbit/s (acc. to SAE J2602). Because of this reduction of the slew
rate the EME behaviour is improved especially in the frequency range of 100 kHz to 10MHz.
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4.4. Silent Mode
The Silent Mode is a special mode for application with active Sleep Mode on LIN, but the connected MCU still needs to
be supplied with VCC.
With a falling edge on EN input in combination with TxD=high switches the MLX8003x/5x from Normal Mode to the
Silent Mode with reduced internal current consumption.
In Silent Mode the voltage regulator is on with a 2% tolerance. The transmitter is disabled and the pin RxD is disconnected from the receive path and is floating. The slave termination resistor (LIN pull up resistor with decoupling diode
between pins LIN and VS) is disconnected; only a weak current source is applied to the LIN bus. Value is typical -75uA,
limits -20…-100uA.
Exit the silent mode with one of the following conditions:
1. Low-to-high edge on the EN pin -> switch back to normal mode
2. Remote wake up (all versions) or local wake up request (MLX80031/51 only) -> switch to standby
mode
3. Undervoltage monitor on VCC detects a low voltage reset condition (VCC < VRES) -> switch back to
stand-by mode.
Normal Mode
Silent Mode
Standby Mode
Normal Mode
EN
tpd_sil
TxD
VCC
Regulator ON
twu_remote
Transmitter ON
LIN
RxD
Transmitter ON
Transmitter OFF
Low
NRES
Watchdog *
Watchdog ON
Watchdog OFF
Start watchdog lead time
* only for MLX80031/51
timing_silent_mode.vsd
Figure 6: LIN wake-up from Silent Mode
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Normal Mode
Silent Mode
Standby Mode
Normal Mode
EN
tpd_sil
TxD
low *
VCC
Regulator ON
twu_WAKE
WAKE *
LIN
Transmitter ON
RxD
low
Undervoltage detection active
NRES
Watchdog *
Transmitter ON
Transmitter OFF
Watchdog ON
Watchdog OFF
Start watchdog lead time
* only for MLX80031/51
timing_sleep_mode_locwu.vsd
Figure 7 Local Wake-up from Silent Mode via WAKE
4.5. Sleep Mode
The most power saving mode of the MLX8003x/5x is the Sleep Mode. The MLX8003x/5x offers two procedures to enter
the sleep mode:
 The mode is selected from normal mode with a falling edge on EN in combination with
TxD = L.
 If the MLX8003x/5x is in Standby Mode after power-on or wake-up, a sleep counter is started and switches the
transceiver into Sleep Mode after the specified time (typ. 350ms) even when the microcontroller of the ECU
will not confirm the normal operation by setting the EN pin to logic HIGH. This new feature allows faulty
blocked LIN nodes to reach always the most power saving mode.
Being in Sleep Mode the voltage regulator switched off in order to minimize the current consumption of the complete
LIN node. The transmitter is disabled and the pin RxD is disconnected from the receive path and is low (follows VCC).
The slave termination resistor (LIN pull up resistor with decoupling diode between pins LIN and VS) is disconnected,
only a weak current source is applied to the LIN bus (see chapter 8 fail-safe features)
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Exit the Sleep Mode with the following condition:
1. Remote (all versions) or local wake up request (MLX80031/51 only) -> Switch to Standby Mode
2. EN = L/H -> Switch to Standby Mode
Figure 8: Remote wake-up from Sleep Mode
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Normal Mode
Sleep Mode
Standby Mode
Normal Mode
EN
TxD
low *
VCC
tpd_sleep
twu_WAKE
WAKE *
LIN
Transmitter ON
RxD
Transmitter ON
Transmitter OFF
floating
low
Reset time
NRES
Watchdog *
Watchdog ON
Watchdog OFF
* only for MLX80031/51
Start watchdog lead time
timing_sleep_mode_locwu.vsd
Figure 9: Local wake-up from Sleep Mode
4.6. Init-State
This is an intermediate state, which will pass through after switch on of VS or after undervoltage detection VS with VS <
VSUVR_ON. The internal supply voltage Vaux ramp up and the initial readout procedure of zenerzap storage are started. At
the end of this phase the VCC voltage definition and the definition of MLX8003x5x version is established. This Init-State
changes to Standby Mode with the start of VCC regulator.
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5. Wake Up Procedures
The MLX80030/50 versions offer only remote wake-up:
After a falling edge on the LIN bus followed by a dominant voltage level for longer than the specified value (twu_remote)
and a rising edge on pin LIN will cause a remote wake up. The device switches to Standby Mode and the wake-up request is indicated by an active LOW on pin RxD.
The MLX80031/51 versions offer three wake-up procedures:

In applications with continuously powered ECU a wake up via mode transition to normal mode is possible (see
chapter 4.3 Normal Mode).

Remote wake-up via LIN bus traffic
After a falling edge on the LIN bus followed by a dominant voltage level for longer than the specified
value(twu_remote) and a rising edge on pin LIN will cause a remote wake up.

Local wake-up via a falling edge on pin WAKE
A falling edge on the pin WAKE and a dominant voltage level for longer than the specified time (twu_WAKE) will
cause a local wake-up. The current for an external switch has to be provided by an external pull up resistor
RWK. For a reverse current limitation in case of a closed external switch and a negative ground shift or an ECU
loss of ground a protection resistor RWK_prot between pin WAKE and the switch is recommended.

Local wake-up via a rising edge on pin KL15
A positive edge on the pin KL15 followed by a high voltage level for a time period t wu_KL15 > 250µs results in a
local wake-up request. The MLX80031/51 switches to the Standby Mode. The long debouncing time on KL15
suppresses unintentional transients. A high level on KL15 has no influence of switching between modes with
EN input. Before a new local wake-up request via KL15 can be started, KL15 have to be switched to low level
for a time > 250µs.
5.1. Wake Up Source Recognition in MLX80031/51
The device can distinguish between a local wake-up event (pin WAKE or pin KL15) and a remote wake-up event. The
wake-up source flag is set after a local wake-up event and is indicated by an active LOW on pin TxD.
The wake-up flag can be read if an external pull up resistor towards the microcontroller supply voltage has been added
and the MLX80031/51 is still in standby mode:
•
•
LOW level indicates a local wake-up event
HIGH level indicates a remote wake up event
The wake-up request is indicated by an active LOW on pin RxD and can be used for an interrupt.
When the microcontroller confirms a normal mode operation by setting the pin EN to HIGH, both the wake-up request
on pin RxD as well as the wake-up source flag on pin TxD are reset immediately.
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6. Functionality
6.1. RESET behaviour of MLX8003x/5x
The MLX8003x/5x contains a reset unit which controls the initialization and generation of the reset signal. The NRES pin
flags the reset state of the MLX8003x/5x. The POR timer will be started if V S is switched on and VCC > VRES threshold.
After the time tRes the NRES output is switched from low to high.
The reset unit combines a VCC low voltage detection unit with fixed reset timer. This output is switched from low to
high if VS is switched on and after the time tRes is VCC > VRES.
A drop of the VCC voltage will be detected by the low voltage reset unit which generates a reset signal. The
MLX8003x/5x will be reinitialized if the VCC voltage rises above the low voltage limit.
If the voltage VCC drops below VRES then the NRES output is switched from high to low after the time trr. This filters short breaks
of the VCC voltage and avoids uncontrolled reset generation.
VSUP spike
VS
VSUP_UVR
T>Tj
T<Tj
t<trr
VCC
VCC spike
Unterspannung an
VSUP
t<trr
VCC overload
VRES
tRes
NRES
power-on
tRes
tRes
trr
tRes
thermal
shutdown
reset_timing_8003x5x.vsd
Figure 10: VCC reset behavior
The MLX80031/51 version combines the reset behaviour described above with a window-watchdog unit.
The NRES pin outputs the reset state as well as the watchdog condition. The POR timer will be started if V SUP is switched
on and VCC > POR threshold. After the time tRes the RESET output is switched from low to high. The watchdog is disabled
during this POR procedure. After the POR delay, the NRES output is switched from low to high and the watchdog starts.
In normal mode the NRES pin flags the status of the window watchdog.
6.2. Thermal Shutdown
If the junction temperature TJ is higher than TJSHD, the MLX8003x/5x switches from any mode into Standby Mode. During TSD all functions are switched-off. The transceiver is completely disabled; no wake-up functionality is available.
If TJ falls below the thermal recovery temperature TJREC, MLX8003x/5x resumes operation starting from Standby Mode.
If EN=H at recovery, chip switches to NORMAL after VCC>VRES and tres. SBY-timeout timer is disabled during TSD.
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6.3. VS under voltage reset
The under voltage detection unit prevents an undefined behaviour of the MLX8003x/5x under low voltage condition (VS
< VSUVR_ON). If VS drops below VSUVR_ON, the under voltage detection becomes active and the IC will be switched from
every state to Init-State followed by Standby Mode with the same behaviour like after VS power-on. With the following
increase of VS above VSUVR_OFF the MLX8003x5x remains in Standby Mode and the voltage regulator starts with the initialization sequence (Vcc available). If EN=H at power-up, the chip switches to NORMAL after VCC>VRES and tres.
Remark: In case Vs drops below 5V but still remains above V SUVR_ON , Vcc follows Vs. Vcc is switched off during Vs Undervoltage reset.
6.4. LIN-Transceiver
The MLX8003x/5x has an integrated bi-directional bus interface device for data transfer between LIN bus and the LIN
protocol controller.
The transceiver consists of a driver with slew rate control, wave shaping and current limitation and a receiver with high
voltage comparator followed by a debouncing unit.
Transmit Mode
During transmission the data at the pin TxD will be transferred to the LIN driver to generate a bus signal. To minimize
the electromagnetic emission of the bus line, the LIN driver has an integrated slew rate control and wave shaping unit.
Transmitting will be interrupted in the following cases:
- Sleep Mode
- Silent Mode
- Thermal Shutdown active
- Power on Reset
The recessive LIN bus level is generated from the integrated 30k pull up resistor in serial with an active diode This diode
prevents the reverse current of VLIN during differential voltage between VS and LIN (VLIN>VS).
No additional termination resistor is necessary to use the MLX8003x/5x in LIN slave nodes. If this ICs are used for LIN
master nodes it is necessary that the LIN pin is terminated via an external 1k resistor in series with a diode to VBAT.
Receive Mode
The data signals from the LIN pin will be transferred continuously to the pin RxD. Short spikes on the bus signal are suppressed by the implemented debouncing circuit.
Slew Modes and Data rates
The MLX8003x/5x consists a constant slew rate transceiver which means that the bus driver works with a mode depended slew rate. In normal mode the slew rate is typical 1.6 V/µs (max. baud rate 20kbit/s) and in low slew mode typical 0.8 V/µs. The lower slew rate in low slew mode associated with a baud rate of 10.4kbit/s improves the EME behaviour.
The LIN transceiver of MLX8003x/5x is compatible to the physical layer specification according to LIN 2.x specification
for data rates up to 20kbit/s and the SAE specification J2602 for data rates up to 10.4kbit/s.
The constant slew rate principle is very robust against voltage drops and can operate with RC- oscillator systems with a
clock tolerance up to ±2% between 2 nodes.
Low Slew Mode
In this mode the slew rate is switched from the normal value of typical 1.6V/µs to a low value of typical 0.8V/µs. This
mode is optimized to send with a maximum baud rate of 10.4kbit/s (acc. to SAE J2602). Because of this reduction of the
slew rate the EME behaviour is improved especially in the frequency range of 100 kHz to 10MHz.
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6.5. Voltage Regulator
The MLX8003x/5x has an integrated low drop linear regulator with a p-channel-MOSFET as driving transistor. This regulator outputs a voltage of 3.3V/5V ±2% and a current of 70mA within an input voltage range of 6V ≤ VSUP ≤ 18V. The
current limitation unit limits the output current for short circuits or overload to 130mA respectively drop-down of the
VCC voltage.
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7. Window-Watchdog (only MLX80031/51)
The integrated window watchdog unit observes the correct function of the connected Microcontroller. The required
timing can be programmed with an external resistor connected to the pin RB WD. This resistor defines together with an
internal capacitor the watchdog oscillator frequency. The watchdog is re-triggered by the Microcontroller via the NWDI
input. The watchdog status is represented by the NRES pin.
Negative edges on NWDI reset the watchdog timer. If no pulse is received at NWDI, the MLX80051/31 generates low
pulses on the NRES output with a pulse width of t WDres and a period of tWDper.
7.1. MLX80031/51 Watchdog Behaviour
After power-on and elapsed reset time tres, the window watchdog starts operation with a rising edge on pin NRES. This
start is independent from Standby or Normal Mode.
VS,
VCC
VRES
tWRes
tOWS
tCW
tOW
trr
tRes
NRES
Start-up
POR delay
Watchdog Lead Window
Watchdog Sequence
Power-off
NWDI
init_mlx8003151-all.vsd
Figure 11: MLX80031/51 Watchdog behavior
In case of leaving Silent or Sleep Mode via remote wake-up (LIN) or local wake-up (WAKE or KL15), the window watchdog starts immediately after entering Standby Mode.
After tres the window watchdog unit starts with the Lead Time State. In this state the watchdog clock periods (1/fwdosc)
are counted 7895(=nlead) times. A falling edge on NWDI pin within this lead time stops the lead counter and activates
the Closed Window State with ncw=1053. Thereafter follows the Open Window State with counter start value of
now=1105. In case the lead counter elapses, the watchdog enters the Reset State and starts the reset timer with time
tres.
Close Window State and Open Window State are the normal states of the window watchdog. At each of these states
runs a counter with the watchdog clock signal. The CWT counter runs always to the end. The watchdog does not trigger
when
the
NWDI
trigger
signal
arrives
within
the
Open
Window
State.
A NWDI trigger pulse outside the Open Window State generates a reset condition and the NRES output switches to low
for the time tWDres (see Figure 12).
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tOW
tCW
tOW
tCW
tOW
tCW
tOW
tCW
tOW
NWDI
tWDres
tCW
tOW
tWDres
tCW
tCW
tCW
NWDI = High or Low
tWD
NRES
watchdog_timing.vsd
3 correct watchdog services
2 Twd > tcw+tow at NWDI= High or Low
Twd < tcw
Figure 12: Watchdog timing
7.2. All watchdog start-up scenarios
7.2.1. After power-on and initialization
Watchdog starts after VCC ramp up and elapsed time of reset timer (typ. 4ms) with Lead Time State. MLX80031/51 is in
Standby or Normal Mode.
7.2.2. Wake up indicated transition to Standby Mode from Sleep or Silent
Mode
Watchdog starts immediately with activation of Standby Mode (SBY_MODE = 1). Waking up from Sleep Mode the VCC
regulator ramps up and the reset timer starts. The reset timer has in this case no influence on the watchdog start.
7.2.3. Undervoltage reset on VCC on Normal Mode or Silent Mode
MLX80031/51 goes to Standby Mode. Running watchdog process is stopped and cleared. With active undervoltage
reset the signal the output pin NRES goes to low. Leaving undervoltage reset starts the reset timer (4ms) and thereafter
starts a new watchdog cycle.
7.2.4. EN indicated transition from Silent Mode to Normal Mode
Mode control changes from Silent Mode to Normal Mode. Watchdog starts immediately with activation of Normal
Mode in Closed Window State.
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7.3. Calculation of Watchdog Period
The RC-oscillator of MLX80031/51 which generates the responsible timing of the watchdog has a tolerance of ±15%.
This has the consequence that also the watchdog window times tCW and tOW variants with this tolerance.
tWD
-ΔtWD
CW
+ΔtWD
OW
t
0
tCWmin tCW
tCWmax
tCW +tOW
(tCW +tOW)min
(tCW +tOW)max
Figure 13: Watchdog open and close window tolerances
The ideal watchdog period can be calculated with:
tWD_id  tCW 
1
 tOW
2
The average value tWD of the real usable watchdog trigger time under consideration of the oscillator tolerance is:
tWD  (tCW min  tOW min  t CW max) 2
[EQ1]
The allowed tolerance tWD is:
tWD  (tCW min  tOW min  t CW max) 2
[EQ2]
With the definition of tCW = ncw * (1± TOL) * tWDOSC and tOW = now * (1± TOL) * tWDOSC from [EQ1] tWD can be calculated
with:
tWD  tWDOSC (2  ncw  now  ( 1  TOL)) 2
[EQ3]
and with [EQ2]:
tWD  tWDOSC (now  ( 1  TOL)  2  TOL  ncw) 2
[EQ4]
The variation ΔtWD will be normalized to the mean value tWD and both counter values set in a relationship of
a=now/ncw, then follows for the relative deviation:
tWDTOL 
a  (1  TOL)  2  TOL
2  a  (1  TOL)
[EQ5]
The watchdog trigger time as well as the tolerance depends only on the oscillator frequency respectively the period
tWDOSC, if there are fixed values for both counters (ncw and now) and oscillator tolerance.
Implemented in MLX80031/51 is a precision RC oscillator with a tolerance of TOL = 15%. Combined with the relation
of counter values a=1.04 reached them a tolerance of trigger time of 20%.
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Table 9: Parameters of Window Watchdog
Symbol
Parameter
Value
TOL
Tolerance WD oscillator
15%
ncw
Close window counter
1053
now
Open window counter
1105
tWDTOL
Tolerance WD-trigger time
20%
With the predefined counter values (ncw and now) and the oscillator tolerance TOL are the trigger time of watchdog
and them tolerance only be calculated by the selection of oscillator frequency, or their period tWDOSC.
Fort the used precision RC-oscillator the oscillator period is shown as a linear function of the external resistor RBWD.
tWDOSC[s]  0.3486  RBWD[k]  1.117
[EQ6]
The trigger period can be calculated with the help of EQ3 together with Table 9 – Parameter of Window Watchdog
tWD[ms]  0.99477  RBWD[k]  5.58462
[EQ7]
Or convert to RBWD:
RBWD[k]  1.00526  tWD[ms]  5.61398
[EQ8]
Some samples of different RDWD values and the corresponding watchdog times:
Table 10: Window Watchdog Timing Selection
RBWD
[k]
tWDOSC
[s]
Lead Time
tLEAD [ms]
Close Window
tCW [ms]
Open Window
tOW [ms]
Trigger Period
tWD [ms]
20
8.09
63.9
8.52
8.94
25.48
30
11.58
91.4
12.19
12.79
35.42
51
18.90
149.2
19.90
20.88
56.31
75
27.26
215.2
28.71
30.12
80.19
100
35.98
284.0
37.88
39.75
105.06
120
42.95
339.1
45.23
47.46
124.95
150
53.41
421.6
56.24
59.01
154.80
Short or open circuit on RBWD
The MLX80031/51 can detect a short circuit against GND on the RBWD pin or an open RBWD pin. If on pin a resistor RBWD
<330 or RBWD >10M detected, then the MLX80031/51 checks during the initialization phase a fail-safe state. The
watchdog oscillator will be set in a fail-safe mode with an oscillator period of about 50s. RBWD values between 150k
and 10M are not allowed.
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8. Fail-safe features
Loss of battery
If the ECU is disconnected from the battery, the LIN bus pin is in high impedance state. There is no impact to the bus
traffic and to the ECU itself. Reverse current is limited to < 20µA
Loss of Ground
In case of an interrupted ECU ground connection there is no influence to the bus line. The current from the ECU to the
LIN bus is limited by the weak pull up resistor of the pin LIN. The slave termination resistor is disconnected in order to
fulfil the SAE J2602 requirements for the loss of ground current (<100µA @12V).
Short circuit to battery
The transmitter output current is limited to the specified value in case of short circuit to battery in order to prevent
high current densities and thermal hot spots in the LIN driver.
Short circuit to ground
If the LIN bus wiring is shorted to negative shifted ground levels, there is no current flow from the ECU ground to the
bus and no distortion of the bus traffic occurs.
If the controller detects a short circuit of the LIN bus to ground the transceiver can be set into sleep mode. Additionally
the internal slave termination resistor is switched off and only a weak pull up termination is applied to the LIN bus (typ.
50µA). If the failure disappears, the bus level will become recessive again and will wake up the system even if no local
wake up occurs or is possible.
Thermal overload
All MLX8003x/5x versions are protected against thermal overloads. If the chip temperature exceeds the specified value,
the transmitter is disabled until thermal recovery and the following recessive to dominant transition on pin TxD. The
receiver is still working while thermal shutdown.
Undervoltage lock out
If the battery supply voltage is missing or decreases below the specified value (VS_UV), the transmitter is disabled to
prevent undefined bus traffic. While in sleep mode, the MLX8003x/5x enters the Standby Mode if Vs drops below the
internal power on reset threshold.
Open Circuit protection
•
•
•
•
•
•
•
The pin TxD provides a pull up resistor to VCC. The transmitter cannot be enabled.
The pin EN provides a pull down resistor to prevent undefined normal mode transitions.
The pin NWDI provides a pull up resistor to VCC. The window watchdog generates NRES pulse.
The pin MODE provides a pull down resistor to GND. No influence on window watchdog.
If the battery supply voltage is disconnected, the pin RxD is floating.
The pin WAKE provides a weak pull up current towards supply voltage Vs to prevent
local wake-up requests.
The pin KL15 provides a weak pull down current towards GND to prevent local wake-up requests.
Short circuit RxD, NRES against GND or VCC
Both outputs are short circuit proof to VCC and ground.
RBWD short circuit against GND or open
The watchdog oscillator runs with an internal controlled frequency and guarantees a reset.
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9. Application Hints
9.1. Safe Operating Area
The linear regulator of the MLX8003x/5x operates with input voltages up to 27 V and can output a current of 70 mA.
The maximum power dissipation limits the maximum output current at high input voltages and high ambient temperatures. The output current of 70 mA at an ambient temperature of T A = 125°C is only possible with small voltage differences between VS and VCC.
80
Safe Operating Area
maximum current
70
60
MLX80030
TA = +105 oC
50
max. supply
Ivcc [mA]
MLX80050
TA = +105 oC
40
30
MLX80030
TA = +125 oC
20
MLX80050
TA = +125 oC
10
0
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VSUP [V]
Figure 14: Safe operating area for MLX80030/50 in SOIC-8 for Vsup up to 18V
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80
maximum current
Safe Operating Area
70
MLX80051
TA = +105 oC
MLX80031
TA = +105 oC
60
MLX80051
TA = +125 oC
Ivcc [mA]
50
max. supply
voltage
MLX80031
TA = +125 oC
40
30
20
10
0
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VSUP [V]
Figure 15: Safe operating area for MLX80031/51 in QFN20 for Vsup up to 18V
9.2. Application Circuitry
2.2u
MLX80050/30
2.2u ..100u
VBAT
100n
100n
LIN
100n
VS
VCC
EN
NRES
GND
TxD
BUS
RxD
10k
MCU
+5V/
3.3V
220p
Figure 16: Application circuit with MLX80050 or MLX80030 (slave node)
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47k
2.2u
CL
2
0
GND
3
4
MODE
10k
RBwd
60k
uC
14
13
QFN 5 mm x 5 mm
0. 65 mm pitch
20 lead
12
NRES
LIN
8
9
RESET
TxD
11
7
VDD
RxD
TxD
5
6
LINBUS
Debug
1
6
WD Trig
EN
1
0
RxD
WAKE
1
7
MLX80031/51
GND
33k
1
8
15
2
NWDI
1
9
1
10k
EN
KL15
100n
VCC
RTG
VS
CIN
2.2u ..100u
100n
100n
2.2u
VBAT
10k
Ignition
INH
220p
Figure 17: Application circuit with MLX80031 or MLX80051 (slave node)
To minimize the influence of EMI on the bus line an 220pF capacitor should be connected directly to the LIN pin (see
Figure 17). This EMI-Filter assures that the RF injection into the IC from the LIN bus line has no effect or will be limited.
It is also possible to use LC- or RC-filters. The dimensions of C-L or R-L depend on the corner frequency, the maximum
LIN bus capacitance (10nF) and the compliance with the DC- and AC LIN bus parameters.
10. ESD and EMC
10.1. Recommendations for Actuator products
In order to minimize EMC influences, the PCB has to be designed according to EMC guidelines. Actuators products are
ESD sensitive devices and have to be handled according to the rules in IEC61340-5-2.
Actuators products will apply the requirements in the application according to the specification, to ISO7637-2, -3 and
ISO16750-2.
Prototype samples of actuators products will be evaluated according AEC-Q100-002. The result will be published after
qualification. After ESD stress single parameters may be shifted out of their limit, but IC function will still be correctly.
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10.1.1. Automotive Qualification Test Pulses
That means that automotive test pulses are applied to the module in the application environment and not to the single
IC. Therefore attention must be taken, that only protected pins (protection by means of the IC itself or by means of
external components) are wired to a module connector. In the recommended application diagrams, the reverse polarity
diode together with the capacitors on supply pins, the protection resistors in several lines and the load dump protected
IC itself will protect the module against the below listed automotive test pulses. The exact value of the capacitors for
the application has to be figured out during design-in of the product according to the automotive requirements.
For the LIN pin the specification “LIN Physical Layer Spec 2.1 (Nov. 24, 2006)” is valid.
Supply Pin VS is protected via the reverse polarity diode and the supply capacitors. No damage will occur for defined
test pulses. A deviation of characteristics is allowed during pulse 1 and 2; but the module will recover to the normal
function after the pulse without any additional action. During test pulse 3a, 3b, 5 the module will work within characteristic limits.
10.1.2. Test Pulses On supply Lines
Table 11: Test pulses Supply Line
Parameter
Symbol
Min
Max
Dim
Coupling
test condition,
functional status
Transient test pulses in accordance to ISO7637-2 (supply lines) & , VS=13.5V, TA=(23 5)°C
& (Document: “Hardware Requirements for LIN, CAN and FlexRay Interfaces in Automotive Applications”; Audi,
BMW, Daimler, Porsche, VW; 2009-12-02)
5000 pulses,
Test pulse #1
vpulse1
-100
V
Direct
functional state C
5000 pulses,
Test pulse #2a
vpulse2a
75
V
Direct
functional state A
Test pulse #3a
vpulse3a
-150
V
Direct
1h,functional state A
Test pulse #3b
vpulse3b
100
V
Direct
1h,functional state A
Load dump test pulse in accordance to ISO16750-2 (supply lines), VS=13.0V, TA=(23 5)°C
1 pulse clamped to
27V (+13V (VS)),
(32V
(+13V (VS))for
65
87
Test pulse #5b
vpulse5b
V
Direct
(+13V (VS))
(+13V (VS))
applications for north
America),
functional state C
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10.1.3. Test pulses on Pin LIN
Table 12: Test pulses LIN
Parameter
Symbol
Min
Max
Dim
Coupling
test condition,
functional status
Transient test pulses in accordance to ISO7637-3, VS=13.5V, TA=(23 5)°C
& (Document: “Hardware Requirements for LIN, CAN and FlexRay Interfaces in Automotive Applications”; Audi,
BMW, Daimler, Porsche, VW; 2009-12-02)
Direct capacitive
Vpulse_
1000 pulses,
coupled:
Test pulse ‘DCC slow –‘
-100
V
slow+
functional state D
1nF
Direct capacitive
Vpulse_
1000 pulses,
Test pulse ‘DCC slow +‘
75
V
coupled:
slowfunctional state D
1nF
Direct capacitive
Vpulse_
10 min,
coupled:
Test pulse ‘DCC fast a’
-150
V
functional state D
fast_a
1nF
Direct capacitive
Vpulse_
10 min,
coupled:
Test pulse ‘DCC fast b’
100
V
functional state D
fast_b
1nF
10.1.4. Test pulses on signal lines
Table 13: Test pulses signal lines
Parameter
Symbol
Min
Max
Dim
Coupling
Transient test pulses in accordance to ISO7637-3 (signal lines). VS=13.5V, TA=(23 5)°C
Direct capacitive
Vpulse_
coupled:
Test pulse ‘DCC slow –‘
-30
-8
V
slow+
100nF
Direct capacitive
Vpulse_
Test pulse ‘DCC slow +‘
+8
+30
V
coupled:
slow100nF
Direct capacitive
Vpulse_
coupled:
Test pulse ‘DCC fast a’
-60
-10
V
fast_a
100pF
Direct capacitive
Vpulse_
coupled:
Test pulse ‘DCC fast b’
10
40
V
fast_b
100pF
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test condition,
functional status
1000 pulses,
functional state C
1000 pulses,
functional state A
10 min,
functional state A
10 min,
functional state A
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Description of functional state
A:
B:
C:
D:
E:
All functions of the device are performed as designed during and after the disturbance occurs.
All functions of the device are performed as designed during the disturbance occurs. One or more functions
can violate the specified tolerances. All functions return automatically within their normal limits after the disturbances is removed..
A function of a device does not perform as designed during the disturbance occurs but returns automatically
to the normal operation after the disturbances is removed.
A function of a device does not perform as designed during the disturbance occurs and does not return automatically to the normal operation after the disturbances is removed. The device needs to be reset by a simple
operation/action to return to the specified limits/function.
One or more functions of a device do not perform as designed during and after the disturbance occurs and
does not return automatically to the normal operation after the disturbances is removed. After a reset of the
device, it does not return to the specified limits/function. The device needs to be repaired or replaced.
10.1.5. EMV Test pulse definition
Table 14: Test pulses shapes ISO7637-2
Test Pulse 1
Ri = 10 Ohm
Test pulse 2a
Ri = 2 Ohm
200 ms
V
0.5...5s
< 100 µs
50 µs
V
12 V
0V
10%
t
1 µs
90%
vpulse1
vpulse2 a
90%
10%
12V
1 µs
2 ms
0V
t
200 ms
0.5...5s
Test Pulse 3a
Ri = 50 Ohm
Test Pulse 3b
Ri = 50 Ohm
100 ns
5 ns
V
90%
V
12V
vpulse3b
10%
0V
t
vpulse3b
vpulse3a
vpulse3a
10%
12V
0V
100 µs
10 ms
90 ms
100 µs
90%
10 ms
t
90 ms
5 ns
100 ns
Test Pulse 5a (Load Dump)
Ri = 0.5Ohm (clamped to 45V during test)
V
Pulse 5
90%
Pulse 5 at
device
vpulse5
40V
10%
12V
t
tr = 0.1...10ms
td = 40...400ms
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Table 15: Test pulses shapes ISO7637-3
EMV Test Pulse shapes (ISO7637-3 (non-supply lines))
Test Pulse ‘DCC slow -’
Ri = 2 Ohm
Test pulse ‘DCC slow +’
Ri = 2 Ohm
Test Pulse ‘Fast a, DCC’
Ri = 50 Ohm
Test Pulse ‘Fast b, DCC’
Ri = 50 Ohm
10.2. Typical Application Circuitry
In order to minimize EMC influences, the external application circuitry shall be designed as followed:
D12)
VS
C22) +
Connector
C11)
C32)
VS
R12)
R22)
LIN
LIN
C41)
C52)
C61)
Actuators
Product
D21)
Signalline
Signal
-line
C71)
D31)
GND
GND
optional implemented
2) mandatory implemented
1)
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10.2.1. External Circuitry on Supply Lines
In order to minimize EMC influences, the external application circuitry shall be designed as followed:
Name
Mounting
Min
Recommended
Max
Dim
C1
recommended
-
100
-
nF
D1
C2
mandatory
mandatory
1
22
100
μF
C3
mandatory
-
100
-
nF
Comment
Ceramic SMD: 10%, 0805, ≥50V;
close to the connector
Inverse-polarity protection diode
Tantal SMD: 10%, 7343, 35V
Ceramic SMD: 10%, 0805, ≥50V;
close to the pin
10.2.2. External Circuitry on LIN Lines
In order to minimize EMC influences, the external application circuitry shall be designed as followed:
Name
Mounting
Min
Recommended
Max
Dim
D2
no
-
PESD1LIN
-
C4
no
-
-
-
pF
R1
mandatory
-
0
-
Ω
C5
mandatory
-
220
-
pF
C6
no
-
-
-
pF
Comment
ESD protection Diode: SOD323
close to the connector;
optional part
Ceramic SMD: 10%, 0805, ≥50V;
CSlave≤ CD2+C4+C5+C6+CIC
CSlave≤250pF;
optional part
Serial resistor: 0805;
or optional Ferrite
Ceramic SMD: 10%, 0805, ≥50V;
CSlave≤ CD2+C4+C5+C6+CIC
CSlave≤250pF
Ceramic SMD: 10%, 0805, ≥50V;
CSlave≤ CD2+C4+C5+C6+CIC
CSlave≤250pF;
optional part
10.2.3. External Circuitry on Signal Lines
In order to minimize EMC influences, the external application circuitry shall be designed as followed:
Name
Mounting
Min
Recommended
Max
Dim
C7
no
0.1
1
100
nF
R2
mandatory
0
560
1000
Ω
D3
no
-
PESD1LIN
-
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Comment
Ceramic SMD: 10%, 0805, ≥50V;
optional part
Serial resistor: 0805;
or optional Ferrite
ESD protection Diode: SOD323
close to the connector;
optional part
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11. Mechanical Specification
11.1. SOIC8 package
Figure 18: SOIC8 Drawing
Table 16: SOIC8 dimensions
Small Outline Integrated Circiut (SOIC), SOIC 8, 150 mil
A1
B
C
D
E
e
H
h
L
A

ZD
A2
3.81
3.99
1.27
5.80
6.20
0.25
0.50
0.41
1.27
1.52
1.72
0°
8°
0.53
1.37
1.57
All Dimension in mm, coplanarity < 0.1 mm
min
max
0.10
0.25
0.36
0.46
0.19
0.25
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11.2. QFN20 5x5 package
1
2
N
E2
L
K
E
Bottom
Exposed Pad
D
A
A3
D2
e
A1
b
Figure 19: QFN20 Drawing
Table 17: QFN20 Package Dimensions
Symbol
min
max
[1]
[2]
[3]
[4]
A
A1
0.80
0
1.00
0.05
A3
0.20
b
0.25
0.35
D
5.00
D2
3.00
3.25
E
5.00
E2
3.00
3.25
e
0.65
K
0.20
L
0.45
0.65
N [3]
ND [4]
NE [4]
[1]
20
5
5
Dimensions and tolerances conform to ASME Y14.5M-1994
All dimensions are in Millimeters. All angels are in degrees
N is the total number of terminals
ND and NE refer to the number of terminals on each D and E side respectively
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12. Revision History
Version
Changes
001
First Release
002




Remark
st
1 Release
Date
April 2012
For TSD added: "If EN=H at recovery, chip switches to NORMAL
after VCC>VRES and tres" and "SBY-timeout timer is disabled during TSD"
For TSD removed explicit values and kept parameter name only.
For Vs_uvr added: "If EN=H at power-up, chip switches to NORMAL
after VCC>VRES and tres"
Changed state diagram: sleep mode can be left with EN = H (was a
L-H transition in A version of the device), refers to Errata 80050AA07.
June 2012
003




ESD robustness level adapted to Conformance Test Report
Static Characteristics adapted to CPK-Values
Block Diagram updated
Corrected short description of product
Dec 2012
004














Removed 06.05, 09.05, 13.05
Changed 05.02 to 200mV (5V) and 100mV (3.3V)
Changed 06.03 and 13.03 to 700mV
Changed 09.03 to 600mV
Added MODE pin to parameter list
Changed 15.05 to LL = 2.7V and UL to 3.3V
Changed 14.01 to 0.6V at 2mA
Changed 08.03 to LL = 30
Changed 02.00 to LL = 400 and UL to 1500
Changed Tjshd to 155/170/190°C
Changed 12.04 and 12.05 UL to 20uA
Changed 03.05 to relevance “C” (only for characterization)
Added 17.06 Watchdog safety oscillator
Changed 3.01 for 80030/31 to UL = 3.201 and UL = 3.399
Mar 2013
005

Corrected value “e” of QFN package data to “0.65”
Apr 2013
006




Changed 15.01
Changed 1.03 LL to 40mV
Changed 3.09 LL to -135mA and UL to -75mA
Changed ESD capability of LIN pin to +/-6kV
July 2013
007







Changed operating voltage to max. 27V
Changed table 2, nominal operating voltage, max to 27V
Update 3.09: split temperature ranges
Changed 12.03 to min: -400µA
Changed 12.06 to min: -10µA, max: 50µA
Changed 6.04 to typ: 125 k, max: 250 k
Changed 12.01 to 80µA
Feb 2014
008


Added condition for thermal resistance
Updated chapter 4.1, tables 7 and 8 for TxD and RxD values de-
April 2014
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


pending on the mode and EN = H transition from Sleep Mode to
Normal Mode
Changed operating voltage to 27V max in application hints 9.1
Re-phrased information to EMC compliance in 9.2.2
LIN: Changed parameter 12.10 and added parameter 12.12 to Lin
spec 2.x and compatible to SAE J2602, split parameter 12.07 into
dominant and recessive
009

Updated product codes to “wettable flanks”
Nov 2014
010


Silent Mode for Silicon Version B not supported
Silicon Version C added, support of silent mode
Feb 2015
011







Silicon Version B removed
Changed 1.01, 1.02 VS under voltage reset
Changed 2.01 supply current sleep mode
Changed 2.02 supply current silent mode
Addition of 18.11 Wake up time vs. EN
Update state diagram (Fig 5)
Update of paragraph ESD and EMC
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13. Standard information regarding manufacturability of
Melexis products with different soldering processes
Our products are classified and qualified regarding soldering technology, solderability and moisture sensitivity level
according to following test methods:
Reflow Soldering SMD’s (Surface Mount Devices)


IPC/JEDEC J-STD-020
Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices
(classification reflow profiles according to table 5-2)
EIA/JEDEC JESD22-A113
Preconditioning of Nonhermetic Surface Mount Devices Prior to Reliability Testing
(reflow profiles according to table 2)
Wave Soldering SMD’s (Surface Mount Devices) and THD’s (Through Hole Devices)


EN60749-20
Resistance of plastic- encapsulated SMD’s to combined effect of moisture and soldering heat
EIA/JEDEC JESD22-B106 and EN60749-15
Resistance to soldering temperature for through-hole mounted devices
Iron Soldering THD’s (Through Hole Devices)

EN60749-15
Resistance to soldering temperature for through-hole mounted devices
Solderability SMD’s (Surface Mount Devices) and THD’s (Through Hole Devices)

EIA/JEDEC JESD22-B102 and EN60749-21
Solderability
For all soldering technologies deviating from above mentioned standard conditions (regarding peak temperature, temperature gradient, temperature profile etc) additional classification and qualification tests have to be agreed upon with
Melexis.
The application of Wave Soldering for SMD’s is allowed only after consulting Melexis regarding assurance of adhesive
strength between device and board.
Melexis recommends reviewing on our web site the General Guidelines soldering recommendation
(http://www.melexis.com/Quality_soldering.aspx) as well as trim&form recommendations
(http://www.melexis.com/Assets/Trim-and-form-recommendations-5565.aspx).
Melexis is contributing to global environmental conservation by promoting lead free solutions. For more information
on qualifications of RoHS compliant products (RoHS = European directive on the Restriction Of the use of certain Hazardous Substances) please visit the quality page on our website: http://www.melexis.com/quality.aspx
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14. Disclaimer
Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its Term
of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the information set
forth herein or regarding the freedom of the described devices from patent infringement. Melexis reserves the
right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with Melexis for current information. This product is intended for use in
normal commercial applications. Applications requiring extended temperature range, unusual environmental
requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment
are specifically not recommended without additional processing by Melexis for each application.
The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not be liable
to recipient or any third party for any damages, including but not limited to personal injury, property damage,
loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential damages, of any
kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of Melexis’ rendering of technical or other
services.
© 2015 Melexis NV. All rights reserved.
For the latest version of this document, go to our website at
www.melexis.com
Or for additional information contact Melexis Direct:
Europe, Africa, Asia:
Phone: +32 1367 0495
E-mail: [email protected]
America:
Phone: +1 248 306 5400
E-mail: [email protected]
ISO/TS 16949 and ISO14001 Certified
MLX80050/51/30/31 – Datasheet
3901080050
Page 50
Jun 2016
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