CET CEU84A4 N-channel enhancement mode field effect transistor Datasheet

CED84A4/CEU84A4
N-Channel Enhancement Mode Field Effect Transistor
FEATURES
40V, 80A, RDS(ON) = 5.1mΩ @VGS = 10V.
RDS(ON) = 7.8mΩ @VGS = 4.5V.
Super high dense cell design for extremely low RDS(ON).
D
High power and current handing capability.
Lead free product is acquired.
TO-251 & TO-252 package.
G
D
G
S
CEU SERIES
TO-252(D-PAK)
ABSOLUTE MAXIMUM RATINGS
Parameter
G
D
S
CED SERIES
TO-251(I-PAK)
S
Tc = 25 C unless otherwise noted
Symbol
Limit
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
Drain Current-Continuous @ TC = 25 C
ID
@ TC = 100 C
Drain Current-Pulsed a
IDM
Maximum Power Dissipation @ TC = 25 C
Operating and Store Temperature Range
Units
V
±20
V
80
A
56
A
320
A
57.7
W
0.38
W/ C
TJ,Tstg
-55 to 175
C
PD
- Derate above 25 C
40
Thermal Characteristics
Symbol
Limit
Units
Thermal Resistance, Junction-to-Case
Parameter
RθJC
2.6
C/W
Thermal Resistance, Junction-to-Ambient
RθJA
50
C/W
Rev 1. 2011.Mar
http://www.cetsemi.com
Details are subject to change without notice .
1
CED84A4/CEU84A4
Electrical Characteristics
Parameter
TA = 25 C unless otherwise noted
Symbol
Test Condition
Min
Drain-Source Breakdown Voltage
BVDSS
VGS = 0V, ID = 250µA
40
Zero Gate Voltage Drain Current
IDSS
Gate Body Leakage Current, Forward
Gate Body Leakage Current, Reverse
Typ
Max
Units
VDS = 40V, VGS = 0V
1
µA
IGSSF
VGS = 20V, VDS = 0V
100
nA
IGSSR
VGS = -20V, VDS = 0V
-100
nA
Off Characteristics
V
On Characteristics c
Gate Threshold Voltage
Static Drain-Source
On-Resistance
VGS(th)
RDS(on)
VGS = VDS, ID = 250µA
3
V
VGS = 10V, ID = 30A
1
4
5.1
mΩ
VGS = 4.5V, ID =20A
5.8
7.8
mΩ
Dynamic Characteristics d
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
VDS = 15V, VGS = 0V,
f = 1.0 MHz
3070
pF
385
pF
285
pF
Switching Characteristics d
Turn-On Delay Time
td(on)
Turn-On Rise Time
tr
Turn-Off Delay Time
td(off)
VDD = 15V, ID = 1A,
VGS = 10V, RGEN = 6Ω
19
38
ns
10
20
ns
ns
84
168
Turn-Off Fall Time
tf
22
44
ns
Total Gate Charge
Qg
67
87
nC
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
VDS = 15V, ID = 16A,
VGS = 4.5V
10
nC
12
nC
Drain-Source Diode Characteristics and Maximun Ratings
Drain-Source Diode Forward Current b
IS
Drain-Source Diode Forward Voltage c
VSD
VGS = 0V, IS = 20A
Notes :
a.Repetitive Rating : Pulse width limited by maximum junction temperature.
b.Surface Mounted on FR4 Board, t < 10 sec.
c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.
d.Guaranteed by design, not subject to production testing.
2
80
A
1.2
V
CED84A4/CEU84A4
100
VGS=10,8,6V
60
ID, Drain Current (A)
ID, Drain Current (A)
75
45
30
VGS=3V
15
0
0
1
2
3
0
-55 C
2
4
6
8
Figure 1. Output Characteristics
Figure 2. Transfer Characteristics
RDS(ON), Normalized
RDS(ON), On-Resistance(Ohms)
1800
1200
600
Coss
Crss
0
5
10
15
20
25
2.2
1.9
ID=20A
VGS=10V
1.6
1.3
1.0
0.7
0.4
-100
-50
0
50
100
150
200
VDS, Drain-to-Source Voltage (V)
TJ, Junction Temperature( C)
Figure 3. Capacitance
Figure 4. On-Resistance Variation
with Temperature
VDS=VGS
ID=250µA
IS, Source-drain current (A)
C, Capacitance (pF)
VTH, Normalized
Gate-Source Threshold Voltage
TJ=125 C
VGS, Gate-to-Source Voltage (V)
Ciss
1.1
1.0
0.9
0.8
0.7
0.6
-50
25 C
20
0
2400
1.2
40
VDS, Drain-to-Source Voltage (V)
3000
1.3
60
4
3600
0
80
-25
0
25
50
75
100
125
150
VGS=0V
10
2
10
1
10
0
0.4
0.6
0.8
1.0
1.2
1.4
TJ, Junction Temperature( C)
VSD, Body Diode Forward Voltage (V)
Figure 5. Gate Threshold Variation
with Temperature
Figure 6. Body Diode Forward Voltage
Variation with Source Current
3
10
10
VDS=15V
ID=16A
8
6
4
2
0
0
3
RDS(ON)Limit
ID, Drain Current (A)
VGS, Gate to Source Voltage (V)
CED84A4/CEU84A4
15
30
45
60
10
100ms
1ms
DC
10
10
75
10ms
2
1
TC=25 C
TJ=175 C
Single Pulse
0
10
-1
10
0
10
1
10
Qg, Total Gate Charge (nC)
VDS, Drain-Source Voltage (V)
Figure 7. Gate Charge
Figure 8. Maximum Safe
Operating Area
VDD
t on
V IN
RL
D
VGS
RGEN
toff
tr
td(on)
td(off)
tf
90%
90%
VOUT
VOUT
10%
INVERTED
10%
G
90%
S
VIN
50%
50%
10%
PULSE WIDTH
Figure 10. Switching Waveforms
r(t),Normalized Effective
Transient Thermal Impedance
Figure 9. Switching Test Circuit
10
0
D=0.5
0.2
10
0.1
-1
PDM
0.05
t1
0.02
0.01
1. RθJC (t)=r (t) * RθJC
2. RθJC=See Datasheet
3. TJM-TC = P* RθJC (t)
4. Duty Cycle, D=t1/t2
Single Pulse
10
-2
10
-4
t2
10
-3
10
-2
10
-1
10
0
Square Wave Pulse Duration (sec)
Figure 11. Normalized Thermal Transient Impedance Curve
4
10
1
10
2
2
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