Microchip HV582GA-G 96-channel serial to parallel converter with push-pull output Datasheet

HV582
96-Channel Serial to Parallel Converter with Push-Pull Outputs
Features
Description
• 96 High-Voltage Channels
- Up to 80V Operating Output Voltage
- 75 mA Peak Output Sink/Source Current
• Six Parallel 16-bit Shift Registers
- Clockwise and Counter-Clockwise Data
Shifting via DIR Pin
• 30 MHz Data Rate
HV582 is a unipolar, 96-channel low-voltage serial to
high-voltage parallel converter with push-pull outputs.
This device has been designed for applications requiring
multiple high-voltage outputs with current sinking and
sourcing capabilities, such as plasma displays and Inkjet
printers.
Applications
• Inkjet Printer Driver
• AC Plasma Data Driver
• 3D Printer Driver
The device consists of six parallel 16-bit shift registers,
a 96-bit latch and 96 high-voltage outputs. The shift
registers operate at 30 MHz, allowing 180 MHz data
rates due to the parallel arrangement.
HV582 is offered in a 169-ball 10 x 10 x 1.1 mm
TFBGA package.
Package Type
Related Devices
HV582
10x10x1.1 mm TFBGA*
Bottom View
• HV583: 128-Channel Serial to Parallel Converter
with Push-Pull Outputs
13
12
11
10
9
8
7
6
5
4
3
2
1
A
B
C
D
E
F
G
H
J
K
L
M
N
* See Section 2.0, Package Pin Configuration and
Function Description.
 2015 Microchip Technology Inc.
DS20005455A-page 1
HV582
Block Diagram
VDD
D1
LD1
D1A
16-Bit
Shift
Register
VPP
D16
Decoder
Level
Translator
HVOUT1
D1B
D17
D2A
16-Bit
Shift
Register
HVGND
D32
D2B
D33
D3A
16-Bit
Shift
Register
D48
D3B
D49
96-Bit
Latch
D4A
16-Bit
Shift
Register
D64
D4B
D65
D5A
16-Bit
Shift
Register
VPP
D80
D5B
D81
D6A
16-Bit
Shift
Register
Decoder
D96
Level
Translator
HVOUT96
LD96
D6B
DIR
HVGND
CLK
RST
LE
POL
OL
OH
OE
GND
DS20005455A-page 2
HVGND
 2015 Microchip Technology Inc.
HV582
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Rating†
Supply Voltage VDD.................................................................................................................................... -0.5V to +6.0V
High-Voltage Supply VPP .............................................................................................................................. VDD to +85V
Logic Input Voltages...........................................................................................................................-0.5V to VDD + 0.5V
Operating Junction Temperature.............................................................................................................-40°C to +125°C
Storage Temperature ..............................................................................................................................-65°C to +150°C
†Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions, above those
indicated in the operational listings of this specification, is not implied. Exposure to maximum rating conditions for
extended periods may affect device reliability. Device is ESD sensitive. Use appropriate ESD precaution.
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min.
Typ.
Max.
Units
Logic Supply Voltage
High-Voltage Supply
VDD
VPP
4.5
10
5.0
—
5.5
80
V
V
High-Level Input Voltage
Low-Level Input Voltage
VIH
VIL
VDD – 0.9
0
—
—
VDD
0.9
V
V
TABLE 1-1:
Conditions
POWER SEQUENCES
Sequence Type
Steps
Power-Up Sequence
1.
2.
3.
4.
Connect Ground.
Apply VDD.
Set All Inputs (Data, CLK, etc.) to a known state.
Apply VPP.
Power-Down Sequence
Repeat the Power-Up sequence in reverse order.
DC ELECTRICAL CHARACTERISTICS
Electrical Specification: Unless otherwise specified, TA = TJ = +25°C, VDD = 5.0V and VPP = 80V.
Parameter
Symbol
Min.
Typ.
Max.
Units
IPPQ
IDDQ
–
–
–
–
100
100
µA
µA
IDD
–
–
25
mA
High-Level Output Voltage
HVOH
70
75
–
V
Output P-Channel Body Diode
HVOHD
–
–
83
V
Low-Level Output Voltage
HVOL
–
5.0
10
V
IOUT = 75 mA,
VPP = 80V
IOUT = -75 mA,
VPP = 80V (Note 1)
IOUT = -75 mA
Output N-Channel Body Diode
Logic Input High Current
HVOLD
IIH
-3.0
–
–
–
–
1.0
V
µA
IOUT = 75 mA (Note 1)
VIH = VDD
10
30
50
VPP Quiescent Supply Current
VDD Quiescent Supply Current
VDD Supply Current
Note 1:
Conditions
fCLK= 30 MHz,
LE = low
VIH = VDD,
RST and POL only
Specification is for design guidance only.
 2015 Microchip Technology Inc.
DS20005455A-page 3
HV582
DC ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specification: Unless otherwise specified, TA = TJ = +25°C, VDD = 5.0V and VPP = 80V.
Parameter
Symbol
Min.
Typ.
Max.
Units
IIL
-1.0
–
–
µA
VIL = -0.3V
VOH
VOL
3.5
–
–
–
–
1.0
V
IOUT = 4 mA
IOUT = -4 mA
Logic Input Low Current
Logic Output High
Logic Output Low
Note 1:
Conditions
Specification is for design guidance only.
AC ELECTRICAL CHARACTERISTICS
Electrical Characteristics: Unless otherwise specified TA = TJ = +25°C, VDD = 5.0V and VPP = 80V.
Parameter
Symbol
Min.
Typ.
Max.
Units
Conditions
Data Clock Frequency
Clock Pulse Width, High and Low
fCLK
twCLK
—
16.6
—
—
30
—
MHz
ns
LE Pulse Width, High and Low
Setup Time, DnA/B to CLK
twLE
tsu1
16.6
5
—
—
—
—
Note 2
Note 1
Setup Time, CLK to LE
tsu2
15
—
—
Note 1
Setup Time, LE to OL,OH
Hold Time, CLK to DnA/B
tsu3
th1
25
15
—
—
—
—
Note 1
Note 1
Hold Time, LE to CLK
CLK to DnA/B (High-to-Low)
th2
tpdHL
15
—
—
—
—
25
Note 1
CL = 170 pF
CLK to DnA/B (Low-to-High)
tpdLH
—
—
25
CL = 170 pF
LE,OL,OH to HVOUTn
(High-to-Low)
tpHL
—
—
300
CL = 170 pF
LE,OL,OH to HVOUTn
(Low-to-High)
OE to HVOUTn (High-to-Low)
tpLH
—
—
300
CL = 170 pF
tpHZL
—
—
150
CL = 170 pF
OE to HVOUTn (Low-to-High)
OE to HVOUTn (High-to-Low)
tpLZH
tpHZ
—
—
—
—
150
300
CL = 170 pF
OE to HVOUTn (Low-to-High)
Rise Time HVOUTn
tpLZ
tr
—
—
—
—
300
200
Note 1
CL = 170 pF
tf
—
—
200
Fall Time HVOUTn
Note 1: Specification is obtained by characterization and is not 100% tested.
2: Specification is for design guidance only.
CL = 170 pF
TEMPERATURE SPECIFICATIONS
Parameters
Sym.
Min.
Typ.
Max.
Units
Operating Junction Temperature
TJ
-40
—
+125
°C
Storage Temperature
TA
-65
—
+150
°C
JA
—
27
—
°C/W
Conditions
Temperature Ranges
Package Thermal Resistance
Thermal Resistance, 169-Ball TFBGA
DS20005455A-page 4
 2015 Microchip Technology Inc.
HV582
1.1
Logic Characteristics
TABLE 1-2:
LOGIC FUNCTION TRUTH TABLE
Inputs
Outputs
RST
Data
CLK
LE
OE
POL
OL
OH
Shift Reg.
1 2...96
HV
Outputs
1 2...96
Data Out
All Low
L
X
X
X
H
X
L
X
* *...*
L L...L
*
All High
L
X
X
X
H
X
H
L
* *...*
H H...H
*
Output High Z
L
X
X
X
L
X
X
X
* *...*
Z Z...Z
*
Invert Mode
L
X
X
L
H
H
H
H
* *...*
* *...*(b)
*
Load S/R
L
H or L
L
H
L
H
H
H or L *...*
* *...*
*
Store Data
in Latches
L
X
X
L
H
L
H
H
* *...*
* *...*
*
L
X
X
L
H
H
H
H
* *...*
* *...* (b)
*
Transparent
Mode
L
L
H
H
L
H
H
L * *...*
L * *...*
*
L
H
H
H
L
H
H
H * *...*
H * *...*
*
H
X
X
H
L
H
H
L * *...*
L * *...*
L
Function
Reset
X
Legend:
D
= Data
H
= Level High
L
= Level Low
X
= Don’t Care
Z
= High Impedance
b
= Inversion
*
= Dependent of previous stage’s state before the last CLK or last LE high
= Low-to-High Transition
TABLE 1-3:
OUTPUT SHIFT OPERATION
Input
Output
DIR
Shift Operation
D1A
D1B
L
D1 to D16
D2A
D2B
L
D17 to D32
D3A
D3B
L
D33 to D48
D4A
D4B
L
D49 to D64
D5A
D5B
L
D65 to D80
D6A
D6B
L
D81 to D96
D1B
D1A
H
D16 to D1
D2B
D2A
H
D32 to D17
D3B
D3A
H
D48 to D33
D4B
D4A
H
D64 to D49
D5B
D5A
H
D80 to D65
D6B
D6A
H
D96 to D81
 2015 Microchip Technology Inc.
DS20005455A-page 5
HV582
1.2
Timing Diagram
twCLK
twCLK
VIH
CLK
50%
50%
50%
VIL
tsu1
th1
tsu1
th1
VIH
50%
50%
DnA/B
(input)
50%
VIL
tpdHL
tpdLH
VOH
DnA/B
(output)
50%
50%
VOL
th2
tsu2
twLE
twLE
VIH
LE
50%
50%
50%
50%
VIL
tsu3
VIH
OL, OH
50%
VIL
VIH
OE
50%
VIL
VIH
50%
50%
OE
VIL
VIH
50%
50%
LE, OH, OL
VIL
tpHZ
tpLZ
tpLZH
tpHZL
tpLH
90%
90%
10%
10%
tpHL
90%
VOH
90%
HVOUTn
10%
10%
1.3
VOL
tf
tr
Input and Output Equivalent Circuits
VDD
VDD
VPP
Data Out
Input
GND
HVGND
GND
Logic Inputs
DS20005455A-page 6
HVOUT
Logic Data Output
High Voltage Outputs
 2015 Microchip Technology Inc.
HV582
2.0
PACKAGE PIN
CONFIGURATION AND
FUNCTION DESCRIPTION
This section details the pin designation for the 169-Ball
TFBGA package (Figure 2-1). The descriptions of the
pins are listed in Table 2-1.
Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
HVOUT66
HVOUT65
HVOUT63
HVOUT60
HVOUT57
HVOUT54
HVOUT51
HVOUT48
HVOUT45
HVOUT42
HVOUT39
HVOUT36
HVOUT34
HVOUT67
HVOUT64
HVOUT62
HVOUT59
HVOUT56
HVOUT53
HVOUT50
HVOUT47
HVOUT44
HVOUT41
HVOUT38
HVOUT35
HVOUT33
HVOUT69
HVOUT68
HVOUT61
HVOUT58
HVOUT55
HVOUT52
HVOUT49
HVOUT46
HVOUT43
HVOUT40
HVOUT37
HVOUT31
HVOUT32
HVOUT72
HVOUT71
HVOUT70
NC
NC
NC
NC
NC
NC
NC
HVOUT28
HVOUT29
HVOUT30
HVOUT75
HVOUT74
HVOUT73
NC
VPP
VPP
NC
VPP
VPP
NC
HVOUT25
HVOUT26
HVOUT27
HVOUT78
HVOUT77
HVOUT76
NC
VPP
VPP
VPP
VPP
VPP
NC
HVOUT22
HVOUT23
HVOUT24
HVOUT81
HVOUT80
HVOUT79
NC
VPP
VPP
VPP
VPP
VPP
NC
HVOUT19
HVOUT20
HVOUT21
HVOUT84
HVOUT83
HVOUT82
NC
HVGND
HVGND
HVGND
HVGND
HVGND
NC
HVOUT16
HVOUT17
HVOUT18
HVOUT87
HVOUT86
HVOUT85
NC
HVGND
HVGND
HVGND
HVGND
HVGND
NC
HVOUT13
HVOUT14
HVOUT15
HVOUT90
HVOUT89
HVOUT88
NC
VDD
GND
VDD
GND
NC
NC
HVOUT10
HVOUT11
HVOUT12
HVOUT92
HVOUT91
NC
D4B
D1B
OL
RST
RESET
D6A
D3A
NC
HVOUT1
HVOUT8
HVOUT9
HVOUT93
HVOUT95
NC
D5B
D2B
OE
DIR
CLK
D4A
D1A
HVOUT2
HVOUT4
HVOUT7
HVOUT94
HVOUT96
NC
D6B
D3B
POL
OH
LE
D5A
D2A
HVOUT3
HVOUT5
HVOUT6
A
B
C
D
E
F
G
H
J
K
L
M
N
FIGURE 2-1:
169-Ball TFBGA Package
 2015 Microchip Technology Inc.
DS20005455A-page 7
HV582
TABLE 2-1:
PIN ASSIGNMENT
Pin #
Symbol
Pin #
Symbol
Pin #
Symbol
A1
A2
HVOUT66
HVOUT65
D3
D4, D5, D6, D7, D8, D9, D10,
E4, E7, E10, F4, F10, G4,
G10, H4, H10, J4, J10, K4,
K9, K10, L3, L10, M3, N3
HVOUT70
NC
K6, K8
K11
GND
HVOUT10
A3
A4
HVOUT63
HVOUT60
D11
D12
HVOUT28
HVOUT29
K12
K13
HVOUT11
HVOUT12
A5
A6
HVOUT57
HVOUT54
D13
E1
HVOUT30
HVOUT75
L1
L2
HVOUT92
HVOUT91
A7
A8
HVOUT51
HVOUT48
E2
E3
HVOUT74
HVOUT73
L4
L5
DB4
DB1
A9
HVOUT45
VPP
L6
OL
A10
HVOUT42
E5, E6, E8, E9, F5, F6, F7,
F8, F9, G5, G6, G7, G8, G9
E11
HVOUT25
L7
RST
A11
A12
HVOUT39
HVOUT36
E12
E13
HVOUT26
HVOUT27
L8
L9
D6A
D3A
A13
B1
HVOUT34
HVOUT67
F1
F2
HVOUT78
HVOUT77
L11
L12
HVOUT1
HVOUT8
B2
B3
HVOUT64
HVOUT62
F3
F11
HVOUT76
HVOUT22
L13
M1
HVOUT9
HVOUT93
B4
B5
HVOUT59
HVOUT56
F12
F13
HVOUT23
HVOUT24
M2
M4
HVOUT95
DB5
B6
B7
HVOUT53
HVOUT50
G1
G2
HVOUT81
HVOUT80
M5
M6
DB2
OE
B8
B9
HVOUT47
HVOUT44
G3
G11
HVOUT79
HVOUT19
M7
M8
DIR
CLK
B10
B11
HVOUT41
HVOUT38
G12
G13
HVOUT20
HVOUT21
M9
M10
D4A
D1A
B12
B13
HVOUT35
HVOUT33
H1
H2
HVOUT84
HVOUT83
M11
M12
HVOUT2
HVOUT4
C1
C2
HVOUT69
HVOUT68
HVOUT82
HVGND
M13
N1
HVOUT7
HVOUT94
C3
HVOUT61
H3
H5, H6, H7, H8, H9,
J5, J6, J7, J8, J9
H11
HVOUT16
N2
HVOUT96
C4
C5
HVOUT58
HVOUT55
H12
H13
HVOUT17
HVOUT18
N4
N5
DB6
D3B
C6
HVOUT52
J1
HVOUT87
N6
POL
C7
HVOUT49
J2
HVOUT86
N7
OH
C8
C9
HVOUT46
HVOUT43
J3
J11
HVOUT85
HVOUT13
N8
N9
LE
D5A
C10
C11
HVOUT40
HVOUT37
J12
J13
HVOUT14
HVOUT15
N10
N11
D2A
HVOUT3
C12
C13
HVOUT31
HVOUT32
K1
K2
HVOUT90
HVOUT89
N12
N13
HVOUT5
HVOUT6
D1
D2
HVOUT72
HVOUT71
K3
K5, K7
HVOUT88
VDD
DS20005455A-page 8
 2015 Microchip Technology Inc.
HV582
2.1
High-Voltage Output Pins
(HVOUT1 to HVOUT96)
These are
(Push-Pull).
2.2
the
high-voltage
output
2.9
channels
High-Voltage Power Supply Pins
(VPP)
Output High Pin (OH)
The Output High pin sets all high-voltage output channels (HVOUT1 to HVOUT96) to a High-level state (VPP).
When OH is Low while OE and OL are High, all the
HVOUTn channels are forced to a High-level state
(VPP), regardless of the data stored in the 96-bit latch.
See Table 1-2 for more information.
High-voltage power supply pins for the output channels
(HVOUTn).
2.10
2.3
The DIR pin controls the direction of the input data flow
for the input registers, whether it is clockwise (DnA to
DnB) or counter-clockwise (DnB to DnA).
High-Voltage Ground Pins (HVGND)
High-voltage ground pins provide the reference ground
level for the high-voltage output channels.
2.4
Logic Power Supply Pins (VDD)
Logic power supply pins for the 16-bit shift registers,
96-bit latch and decoders.
2.5
Data Input/Output Pins
(D1B, D2B, D3B, D4B, D5B, D6B)
Data Input/Output pins are configurable as inputs or
outputs for the shift registers depending on the state of
the Direction pin (DIR).
When DIR is High, pins D1B to D6B are configured as
inputs to the data shift registers. When DIR is Low,
these pins are configured as outputs of the data shift
registers.
2.6
Polarity Pin (POL)
The Polarity pin inverts the current state for all the
HVOUTn channels (from High to Low or Low to High)
when set High.
Direction Pin (DIR)
When DIR is set High, data flows from DnB to DnA.
When DIR is set Low, data flows from DnA to DnB. See
Table 1-3 for more information.
2.11
Logic Ground Pins (GND)
Logic ground pins provide a reference ground level for
the low-voltage section of the IC, shift registers, latches
and decoders.
2.12
Reset Pin (RST)
The RST pin clears shift registers and the 96-bit latch
data content when it is set High. See Table 1-2 for
more information.
2.13
Latch Enable Pin (LE)
The Latch Enable pin controls the data transfer from the
input shift registers to the 96-bit latch and the HVOUTn
channels. See Table 1-2 for more information.
2.14
Clock Input Pin (CLK)
This is the clock input pin for the 16-bit input shift registers.
2.7
Output Enable Pin (OE)
2.15
The Output Enable pin controls the functionality of the
high-voltage output channels.
When OE is High, all HVOUTn channels are enabled and
form a push-pull configuration to operate according to
input data or OL, OH or POL configuration states. When
OE is Low, all HVOUTn channels are forced to a highimpedance state, regardless of the data stored in the 96bit latch or the states of the OL, OH and POL pins.
2.8
Data Input/Output Pins
(D1A, D2A, D3A, D4A, D5A, D6A)
The Data Input/Output pins are configurable as inputs
or outputs for the shift registers depending on the state
of the Direction pin (DIR).
When DIR is Low, pins D1A to D6A are configured as
inputs to the data shift registers. When DIR is High,
pins D1A to D6A are configured as outputs of the data
shift registers.
Output Low Pin (OL)
The Output Low pin sets all high-voltage output channels (HVOUT1 to HVOUT96) to a Low level state
(HVGND).
2.16
No Connection Pins (NC)
NC pins do not have any functionality on the IC. These
pins should not be connected.
When OL is set Low and OE is High, all the HVOUTn
channels are forced to a Low-level state (HVGND),
regardless of the data stored in the 96-bit latch. See
Table 1-2 for more information.
 2015 Microchip Technology Inc.
DS20005455A-page 9
HV582
3.0
FUNCTIONAL DESCRIPTION
3.1
The HV582 is a unipolar, 96-channel low-voltage serial
to high-voltage parallel converter. The device consists
of six parallel 16-bit shift registers, a 96-bit latch and
96 high-voltage outputs.
The six independent shift registers allow data to be
updated into the 96-bit latch at six times the speed of a
single register (30 MHz), providing a fast update rate
for the 96 output channels. The 96-bit latch holds the
data for the high-voltage output channels; whether it is
a High-level or Low-level state. The flow of the input
data can switch direction from clockwise (D1-6A to D16B) to counter-clockwise (D1-6B to D1-6A) by controlling the DIR pin. A reset pin (RST) is provided to
clear the contents of the latches. All channels can be
set at the same time to a high-impedance state
(High Z), Low-level state, High-level state, or to alter
their polarity through the OE, OL, OH and POL pins,
respectively.
Application Information
HV582 is designed for applications requiring multiple
high-voltage outputs with current sinking and sourcing
capabilities in the range of ±75 mA. Typical
applications where the HV582 is utilized are in plasma
displays, Inkjet printer drivers and 3D printer drivers.
The high-output voltages (HVOUTn) can operate from
10V to 80V with a maximum current source and sink
capability of 75 mA.
High-Voltage
Power Supply
Low-Voltage
Power Supply
Piezo Element
HV582
D (1-6) A
Low Voltage
High Voltage
HVOUT1
CLK
POL
LE
Microprocessor
OE
OL
Shift Register
Latches
Output Control
Level Translators
and
Push-Pull Output
Buffers
OH
HVOUT96
DIR
RST
D (1-6) B
DIN(1-6) for Cascading the next HV582
FIGURE 3-1:
DS20005455A-page 10
Typical Application Block Diagram.
 2015 Microchip Technology Inc.
HV582
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
169-Ball TFBGA (10 x10 x1.1 mm)
XXXXXXXXXX
XXXXXXXXXX
XXXXXXXXXX
YYWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Example
e3
HV582GA ^^
1533256
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
 2015 Microchip Technology Inc.
DS20005455A-page 11
HV582
169-Ball Thin Fine Pitch Ball Grid Array (7G) - 10x10x1.10 mm Body [TFBGA]
(Complies with JEDEC Terminal Assignment recommendations)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
NOTE 1
A
D
4
B
E
4
E
(DATUM B)
(DATUM A)
2X
0.15 C
2X
TOP VIEW
0.15 C
A
A2
0.20 C
C
SEATING
PLANE
A1
169X
SIDE VIEW
e
BOTTOM VIEW
0.10 C
169X Øb
0.15
0.08
C A B
C
Microchip Technology Drawing C04-377-J Rev C Sheet 1 of 2
DS20005455A-page 12
 2015 Microchip Technology Inc.
HV582
169-Ball Thin Fine Pitch Ball Grid Array (7G) - 10x10x1.10 mm Body [TFBGA]
(Complies with JEDEC Terminal Assignment recommendations)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
Number of Terminals
N
e
Pitch
A
Overall Height
Standoff
A1
A2
Mold Cap Thickness
Overall Length
D
E
Overall Width
b
Ball Diameter
MIN
0.21
0.50
0.35
MILLIMETERS
NOM
169
0.75 BSC
0.32
0.45
10.00
10.00
0.40
MAX
1.10
0.50
0.45
Notes:
1. Terminal A1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-377-J Rev C Sheet 2 of 2
 2015 Microchip Technology Inc.
DS20005455A-page 13
HV582
169-Ball Thin Fine Pitch Ball Grid Array (7G) - 10x10x1.10 mm Body [TFBGA]
(Complies with JEDEC Terminal Assignment recommendations)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
C1
1
2
3
4
5
6
7
8
9
10
11
12
13
A
B
C
D
E
F
C2
G
H
J
K
L
M
N
Øb
E
SILK SCREEN
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
Contact Pitch
Contact Pad Spacing
C1
Contact Pad Spacing
C2
b
Contact Pad Diameter (X169)
MIN
MILLIMETERS
NOM
0.75 BSC
9.00
9.00
0.35
MAX
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-2377-J Rev C
DS20005455A-page 14
 2015 Microchip Technology Inc.
HV582
APPENDIX A:
REVISION HISTORY
Revision A (December 2015)
• Original release of this document.
 2015 Microchip Technology Inc.
DS200005455A-page 15
HV582
NOTES:
DS200005455A-page 16
 2015 Microchip Technology Inc.
HV582
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
XX-X
Device
Package
Device:
HV582:
Package:
GA-G
Examples:
a)
HV582GA-G: 169-Ball 10x10 TFBGA Package
Low-Voltage Serial to High-Voltage Parallel
Converter with HV Outputs
=
Thin Fine Pitch Ball Grid Array - 10 x 10 x 1.1 mm
Body, 169-lead (TFBGA)
 2015 Microchip Technology Inc.
DS200005455A-page 17
HV582
NOTES:
DS200005455A-page 18
 2015 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer,
LANCheck, MediaLB, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC,
SST, SST Logo, SuperFlash and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
The Embedded Control Solutions Company and mTouch are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo,
CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit
Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet,
KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, RightTouch logo, REAL ICE, SQI, Serial Quad I/O,
Total Endurance, TSHARC, USBCheck, VariSense,
ViewSpan, WiperLock, Wireless DNA, and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2015, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-5224-0105-6
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
 2015 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS200005455A-page 19
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Germany - Dusseldorf
Tel: 49-2129-3766400
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Hong Kong
Tel: 852-2943-5100
Fax: 852-2401-3431
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
Austin, TX
Tel: 512-257-3370
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Novi, MI
Tel: 248-848-4000
Houston, TX
Tel: 281-894-5983
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
New York, NY
Tel: 631-435-6000
San Jose, CA
Tel: 408-735-9110
Canada - Toronto
Tel: 905-673-0699
Fax: 905-673-6509
China - Dongguan
Tel: 86-769-8702-9880
China - Hangzhou
Tel: 86-571-8792-8115
Fax: 86-571-8792-8116
India - Pune
Tel: 91-20-3019-1500
Japan - Osaka
Tel: 81-6-6152-7160
Fax: 81-6-6152-9310
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
China - Hong Kong SAR
Tel: 852-2943-5100
Fax: 852-2401-3431
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Kaohsiung
Tel: 886-7-213-7828
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Germany - Karlsruhe
Tel: 49-721-625370
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Italy - Venice
Tel: 39-049-7625286
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Poland - Warsaw
Tel: 48-22-3325737
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Sweden - Stockholm
Tel: 46-8-5090-4654
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
07/14/15
DS200005455A-page 20
 2015 Microchip Technology Inc.
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