LM9071 www.ti.com SNVS131D – DECEMBER 1999 – REVISED APRIL 2013 LM9071 Low-Dropout System Voltage Regulator with Delayed Reset Check for Samples: LM9071 FEATURES DESCRIPTION • • • • The LM9071 is a 5V, 250 mA low-dropout voltage regulator. The regulator features an active low delayed reset output flag which can be used to reset a microprocessor system on turn-ON and in the event that the regulator output falls out of regulation for any reason. An external capacitor programs a delay time interval before the reset output can return high. 1 2 • • • • • • • Automotive Application Reliability 3% Output Voltage Tolerance Insensitive to Radiated RFI Dropout Voltage Less than 800 mV with 250 mA Output Current Externally Programmed Reset Delay Interval Thermal Shutdown Short Circuit Protection Reverse Battery Protection Wide Operating Temperature Range −40°C to +125°C TO-220 and TO-263 Power Surface Mount Power Packages Pin for Pin Compatible with the LM2927, L4947 and TLE4260 Designed for automotive application the contains a variety of protection features reverse battery, over-voltage shutdown, shutdown, input transient protection and operating temperature range. LM9071 such as thermal a wide Design techniques have been employed to allow the regulator to remain operational and not generate false reset signals when subjected to high levels of RF energy (300V/m from 2 MHz to 400 MHz). Typical Application and Connection Diagrams (Top View) Figure 1. Figure 2. 5-Lead TO-220 Package Package Number KC0005A 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 1999–2013, Texas Instruments Incorporated LM9071 SNVS131D – DECEMBER 1999 – REVISED APRIL 2013 www.ti.com Tab and Backside metal on all packages internally connected to ground. Figure 3. 5-Lead TO-220 Package Package Number NDH0005D Figure 4. 5-Lead TO-263 Surface Mount Package Package Number KTT0005B These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) −26V to +40V DC Input Voltage Positive Input Transient (t<100 ms) 60V −50V Negative Input Transient (t<1 ms) Reset Output Sink Current 5 mA Power Dissipation Internally Limited Junction Temperature ESD Susceptibility 150°C (2) 12 kV, 2 kV Lead Temperature (Soldering, 10 seconds) 260°C −50°C to +150°C Storage Temperature (1) (2) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and conditions, see the Electrical Characteristics. All pins will survive an ESD impulse of ±2000V using the human body model of 100 pF discharged through a 1.5 kΩ resistor. In addition the input voltage pin will withstand ten pulses of ±12 kV from a 150 pF capacitor discharged through a 560Ω resistor when bypassed with a 22 nF, 100V capacitor. Operating Ratings (1) Input Voltage 6V to 26V −40°C to +125°C Ambient Temperature TO-220 Thermal Resistance, θJ-C 3°C/W (2) 73°C/W TO-263 Thermal Resistance, θJ-A (3) 80°C/W TO-220 Thermal Resistance, θJ-A TO-263 Thermal Resistance, θJ-C (1) (2) (3) 2 3°C/W Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and conditions, see the Electrical Characteristics. Exceeding the Maximum Allowable power dissipation will cause excessive die temperature, and the device will go into thermal shutdown. The θJ-A value for the TO-220 package (still air, no additional heat sink) is 73°C/W. The effective θJ-A value of the TO-220 package can be reduced by using conventional heat sink methods. Exceeding the Maximum Allowable power dissipation will cause excessive die temperature, and the device will go into thermal shutdown. The θJ-A value for the TO-263 package (still air, no additional heat sink) is 80°C/W. The effective θJ-A value of the TO-263 package can be reduced by increasing the printed circuit board area that is connected (soldered) to the package tab. Using 1 ounce (1.4 mils thick) copper clad with no solder mask, an area of 0.5 square inches will reduce θJ-A to 50°C/W, an area of 1.0 square inches will reduce θJ-Ato 37°C/W, ad an area of 1.6 square inches will reduce θJ-A to 32°C/W. If the printed circuit board uses a solder mask, the copper clad area should be increased by at least 50% to maintain a similar θJ-A rating. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM9071 LM9071 www.ti.com SNVS131D – DECEMBER 1999 – REVISED APRIL 2013 Electrical Characteristics (1) The following specifications apply for VCC= 6V to 26V, −40°C ≤ TA≤+125°C, unless otherwise specified. COUT= 47µF with an ESR < 3Ω. CIN=1µF. Symbol Parameter Conditions Min Max 4.85 Units REGULATOR OUTPUT VOUT Output Voltage 5 mA ≤ IOUT ≤ 250 mA 5.15 V ΔVOUT Line Line Regulation IOUT = 5 mA, 9V ≤ VIN ≤ 16.5V 25 mV IOUT = 250 mA 50 mV ΔVOUT Load Load Regulation VIN = 14.4V, 5 mA ≤ IOUT ≤ 250 mA 60 mV Iq Quiescent Current IOUT = 5 mA 4 mA IOUT = 250 mA, VIN ≥ 8V 25 mA IOUT = 5 mA, VIN = 5V 10 mA IOUT = 250 mA, VIN = 6V 50 mA IOUT = 5 mA 300 mV IOUT = 250 mA 800 mV 1.5 A Vdo Dropout Voltage Isc Short Circuit Current RL = 1Ω PSRR Ripple Rejection VIN = (14VDC) + (1VRMS @ 120Hz) IOUT = 50 mA 0.35 OVthr Overvoltage Shutdown Threshold VO Transient VOUT during Transients VIN Peak ≤ 60V, RL = 100Ω, τ = 100 ms VO Rev Batt VOUT during Reverse Battery VIN = −15V Vth Threshold Voltage ΔVOUT Required to Generate a Reset Output 4.8V ≤ VOUT ≤ 5.2V Vlow Reset Output Low Voltage 60 dB 27 V 7 −0.8 0.0 V V RESET OUTPUT −300 −500 mV Isink = 1.6 mA, VOUT > 3.2V 0.4 V 1.4V ≤ VOUT ≤ 3.2V 0.8 V 7.6 35 ms Vhigh Reset Output High Voltage tDELAY Delay Time IDELAY Charging Current for CDELAY 10 30 µA Rpu Internal Pull-up Resistance 12 80 kΩ (1) 0.8 VOUT CDELAY = 0.1µF V Datasheet min/max specifications are ensured by design, test, and/or statistical analysis. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM9071 3 LM9071 SNVS131D – DECEMBER 1999 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (TA = 25°C unless indicated otherwise) 4 Turn ON Characteristics Turn OFF Characteristics Figure 5. Figure 6. Normalized Output Voltage vs Temperature Output Voltage at Input Voltage Extremes Figure 7. Figure 8. Quiescent Current vs Input Voltage Short Circuit Current vs Temperature Figure 9. Figure 10. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM9071 LM9071 www.ti.com SNVS131D – DECEMBER 1999 – REVISED APRIL 2013 Typical Performance Characteristics (continued) (TA = 25°C unless indicated otherwise) Dropout Voltage vs Temperature Reset Delay Time vs Temperature Figure 11. Figure 12. Output Capacitor ESR Maximum Power Dissipation (TO-220 Package) Figure 13. Figure 14. Maximum Power Dissipation (TO-263 Package) Figure 15. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM9071 5 LM9071 SNVS131D – DECEMBER 1999 – REVISED APRIL 2013 www.ti.com Reset Operation and Protection Features Block Diagram APPLICATION HINTS The LM9071 voltage regulator has been optimized for use in microprocessor based automotive systems. Several unique design features have been incorporated to address many FMEA (Failure Mode Effects Analysis) concerns for fail-safe system performance. FAULT TOLERANT FEATURES While not specifically ensured due to production testing limitations, the LM9071 has been tested and shown to continue to provide a regulated output and, not generate an erroneous system reset signal while subjected to high levels of RF electric field energy (up to 300 V/m signal strength over a 2 MHz to 400 MHz frequency range). This is very important in vehicle safety related applications where the system must continue to operate normally. To maintain this immunity to RFI the output bypass capacitor is important (47 μF is recommended). 6 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM9071 LM9071 www.ti.com SNVS131D – DECEMBER 1999 – REVISED APRIL 2013 An output bypass capacitor of at least 10 μF is required for stability (47 μF is recommended). The ESR of this capacitor should be less than 3Ω. An input capacitor of 1 μF or larger is recommended to improve line transient and noise performance. Conventional load dump protection is built in to withstand up to +60V and −50V transients. Protection against reverse polarity battery connections is also built in. With a reversed battery connection the output of the LM9071 will not go more negative than one diode drop below ground. This will prevent damage to any of the 5V load circuits. RESET FLAG Excessive loading of the output to the point where the output voltage drops by 300 mV to 500 mV will signal a reset flag to the micro. This will warn of a VCC supply that may produce unpredictable operation of the system. On power-up and recovery from a fault condition the delay capacitor is used to hold the micro in a reset condition for a programmable time interval to allow the system operating voltages and clock to stabilize before executing code. The delay time interval can be estimated by the following equation: (1) INPUT STABILITY Low dropout voltage regulators which utilize a PNP power transistor usually exhibit a large increase in current when in dropout (VIN < 5.5V). This increase is caused by the saturation characteristics (β reduction) of the PNP transistor. To significantly minimize this increase in current the LM9071 detects when the PNP enters saturation and reduces the operating current. This reduction in input current can create a stability problem in applications with higher load current (> 100 mA) where the input voltage is applied through a long length of wire, which in effect adds a significant amount of inductance in series with the input. The drop in input current may create a positive input voltage transient which may take the PNP out of saturation. If the input voltage is held constant at the threshold where the PNP is going in and out of saturation, an oscillation may be created. This is only observed where a large series inductance is present in the input supply line and when the rise and fall time of the input supply is very slow. If the application and removal of the input voltage changes at a rate greater than 500 mV/μs it will move through the dropout region of the regulator (VIN of 3V to 5.5V) too quickly for an oscillation to be established. THERMAL MANAGEMENT The LM9071 is packaged in both a TO-263 surface mount power package and a narrow lead-pitch TO-220 package. To obtain operation over the highest possible load current and input voltage ranges, care must be taken to control the operating temperature of the device. Thermal shutdown protection is built in, with a threshold above 150°C. Conventional heat-sinking techniques can be used with the TO-220 package. When applying the TO-263 package, on board heat-sinking is important to prevent premature thermal shutdown. More copper foil area under the tab of the device will directly improve the operating θJ-A of the TO-263 package, which will reduce the junction temperature of the device. The θJ-A value for the TO-263 package (still air, no additional heat sink) is rated at 80°C/W. The effective θJ-A value of the TO-263 package can be reduced by increasing the printed circuit board area that is connected (soldered) to the package tab. Using 1 ounce (1.4 mils thick) copper clad with no solder mask, an area of 0.5 square inches will reduce θJ-A to 50°C/W, an area of 1.0 square inches will reduce θJ-Ato 37°C/W, and an area of 1.6 square inches will reduce θJ-A to 32°C/W. If the printed circuit board uses a solder mask, the copper clad area under the solder mask should be increased by at least 50% to maintain a similar θJ-A rating. The use of a double sided PC board with soldered filled vias between two planes of copper, as shown in Figure 16, will improve thermal performance while optimizing the PC board surface area required. Using the double sided PC board arrangement shown in Figure 16, with 1 ounce (1.4 mils thick) copper clad with no solder mask and solder filled vias, an area of 0.5 square inches on both sides will reduce θJ-A to 43°C/W. Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM9071 7 LM9071 SNVS131D – DECEMBER 1999 – REVISED APRIL 2013 www.ti.com Figure 16. Typical TO-263 PC Board Heatsinking 8 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM9071 LM9071 www.ti.com SNVS131D – DECEMBER 1999 – REVISED APRIL 2013 REVISION HISTORY Changes from Revision C (April 2013) to Revision D • Page Changed layout of National Data Sheet to TI format ............................................................................................................ 8 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM9071 9 PACKAGE OPTION ADDENDUM www.ti.com 4-Mar-2015 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty LM9071S/NOPB ACTIVE DDPAK/ TO-263 KTT 5 LM9071SX NRND DDPAK/ TO-263 KTT 5 LM9071SX/NOPB ACTIVE DDPAK/ TO-263 KTT 5 45 500 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 TBD Call TI Call TI -40 to 125 Pb-Free (RoHS Exempt) CU SN Level-3-245C-168 HR -40 to 125 Device Marking (4/5) LM9071S LM9071S (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 5-Dec-2014 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM9071SX/NOPB Package Package Pins Type Drawing SPQ DDPAK/ TO-263 500 KTT 5 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 24.4 Pack Materials-Page 1 10.75 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 14.85 5.0 16.0 24.0 Q2 PACKAGE MATERIALS INFORMATION www.ti.com 5-Dec-2014 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM9071SX/NOPB DDPAK/TO-263 KTT 5 500 367.0 367.0 45.0 Pack Materials-Page 2 MECHANICAL DATA KTT0005B TS5B (Rev D) BOTTOM SIDE OF PACKAGE www.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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