TI1 CY74FCT163CTSOCTG4 4-bit binary counter Datasheet

CY54FCT163T, CY74FCT163T
4-BIT BINARY COUNTERS
SCCS015A – MAY 1994 – REVISED OCTOBER 2001
D
D
D
D
D
D
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
TC
Q0
Q1
Q2
Q3
CET
PE
CY54FCT163T . . . L PACKAGE
(TOP VIEW)
P0
P1
NC
P2
P3
SR
NC
VCC
TC
D
SR
CP
P0
P1
P2
P3
CEP
GND
CP
D
CY74FCT163CT . . . Q OR SO PACKAGE
(TOP VIEW)
Function, Pinout, and Drive Compatible
With FCT and F Logic
Reduced VOH (Typically = 3.3 V) Versions of
Equivalent FCT Functions
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
Ioff Supports Partial-Power-Down Mode
Operation
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
Matched Rise and Fall Times
Fully Compatible With TTL Input and
Output Logic Levels
CY54FCT163T
– 32-mA Output Sink Current
– 12-mA Output Source Current
CY74FCT163T
– 64-mA Output Sink Current
– 32-mA Output Source Current
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
Q0
Q1
NC
Q2
Q3
CEP
GND
NC
PE
CET
D
description
NC – No internal connection
The ’FCT163T devices are high-speed
synchronous modulo-16 binary counters. They
are synchronously presettable for application in
programmable dividers. These devices have two
types of count-enable (CEP and CET) inputs, plus a terminal-count (TC) output for versatility in forming
synchronous multistaged counters. The ’FCT163T devices have a synchronous-reset (SR) input that overrides
counting and parallel loading, and allows the outputs to be reset simultaneously on the rising edge of the clock.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
PIN DESCRIPTION
NAME
DESCRIPTION
CEP
Count-enable parallel input
CET
Count-enable trickle input
CP
Clock pulse input (active rising edge)
SR
Synchronous-reset input (active low)
P
Parallel data inputs
PE
Parallel-enable input (active low)
Q
Flip-flop outputs
TC
Terminal-count output
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303
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1
CY54FCT163T, CY74FCT163T
4-BIT BINARY COUNTERS
SCCS015A – MAY 1994 – REVISED OCTOBER 2001
ORDERING INFORMATION
TA
QSOP – Q
–40°C to 85°C
SPEED
(ns)
ORDERABLE
PART NUMBER
Tape and reel
5.8
CY74FCT163CTQCT
Tube
5.8
CY74FCT163CTSOC
Tape and reel
5.8
CY74FCT163CTSOCT
PACKAGE†
SOIC – SO
TOP-SIDE
MARKING
FT163-3
FCT163C
–55°C to 125°C
LCC – L
Tube
11.5
CY54FCT163TLMB
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
SR
PE
CET
CEP
ACTION ON
THE RISING
CLOCK EDGE(S)
L
X
X
X
Reset (clear)
H
L
X
X
Load (Pn → Qn)
H
H
H
H
Count (incremental)
H
H
L
X
No change (hold)
H
H
X
L
No change (hold)
H = High logic level, L = Low logic level, X = Don’t care
2
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• DALLAS, TEXAS 75265
CY54FCT163T, CY74FCT163T
4-BIT BINARY COUNTERS
SCCS015A – MAY 1994 – REVISED OCTOBER 2001
logic diagram (positive logic)
PE
CET
CEP
CP
SR
9
10
15
TC
7
2
1
D
CP
P0
3
Q
14
Q0
D
D
CP
P1
4
Q
13
Q1
D
D
CP
P2
5
Q
12
Q2
D
D
CP
P3
6
Q
11
Q3
D
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
CY54FCT163T, CY74FCT163T
4-BIT BINARY COUNTERS
SCCS015A – MAY 1994 – REVISED OCTOBER 2001
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA
Package thermal impedance, θJA (see Note 1): Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90°C/W
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W
Ambient temperature range with power applied, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
CY54FCT163T
CY74FCT163T
MIN
NOM
MAX
MIN
NOM
MAX
4.5
5
5.5
4.75
5
5.25
VCC
VIH
Supply voltage
VIL
IOH
Low-level input voltage
0.8
0.8
V
High-level output current
–12
–32
mA
IOL
TA
Low-level output current
32
64
mA
85
°C
High-level input voltage
2
Operating free-air temperature
–55
2
125
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.
4
UNIT
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
–40
V
V
CY54FCT163T, CY74FCT163T
4-BIT BINARY COUNTERS
SCCS015A – MAY 1994 – REVISED OCTOBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
CY54FCT163T
TYP†
MAX
TEST CONDITIONS
VCC = 4.5 V,
VCC = 4.75 V,
IIN = –18 mA
IIN = –18 mA
VCC = 4.5 V,
IOH = –12 mA
IOH = –32 mA
VCC = 4
4.75
75 V
MIN
–0.7
–1.2
–0.7
2.4
2.4
Vhys
All inputs
II
VCC = 5.5 V,
VCC = 5.25 V,
VIN = VCC
VIN = VCC
5
IIH
VCC = 5.5 V,
VCC = 5.25 V,
VIN = 2.7 V
VIN = 2.7 V
±1
IIL
VCC = 5.5 V,
VCC = 5.25 V,
VIN = 0.5 V
VIN = 0.5 V
±1
IOS‡
VCC = 5.5 V,
VCC = 5.25 V,
VOUT = 0 V
VOUT = 0 V
Ioff
VCC = 0 V,
VOUT = 4.5 V
ICCD¶
0.3
3.3
0.55
IOL = 64 mA
0.3
0.2
0.55
0.2
±1
±1
–120
–120
±1
VIN ≤ 0.2 V,
VIN ≥ VCC – 0.2 V
VIN ≤ 0.2 V,
VIN ≥ VCC – 0.2 V
§
VCC = 5.5 V, VIN = 3.4 V , f1 = 0, Outputs open
VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open
VCC = 5.5 V,
VCC = 5.25 V,
VCC = 5.5 V, Load mode, Outputs open,
One bit switching at 50% duty cycle,
CEP = CET = PE = GND, SR = VCC,
VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V
–225
–60
0.1
0.2
0.06
V
V
5
–60
V
V
2
IOH = –15 mA
IOL = 32 mA
VCC = 4.5 V,
VCC = 4.75 V,
∆ICC
–1.2
UNIT
3.3
VOL
ICC
CY74FCT163T
TYP†
MAX
MIN
–225
±1
0.2
0.1
0.2
0.2
2
2
µA
µA
µA
mA
µA
mA
mA
0.12
mA/
MHz
VCC = 5.25 V, Load mode, Outputs open,
One bit switching at 50% duty cycle,
CEP = CET = PE = GND, SR = VCC,
VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V
0.06
0.12
† Typical values are at VCC = 5 V, TA = 25°C.
‡ Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus
and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise,
prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In
any sequence of parameter tests, IOS tests should be performed last.
§ Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND
¶ This parameter is derived for use in total power-supply calculations.
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CY54FCT163T, CY74FCT163T
4-BIT BINARY COUNTERS
SCCS015A – MAY 1994 – REVISED OCTOBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
IC#
CY54FCT163T
TYP†
MAX
TEST CONDITIONS
VCC = 5.5 V,
Load mode,
f0 = 10 MHz,
Outputs open,
CEP = CET =
PE = GND,
SR = VCC
One bit switching
at f1 = 5 MHz at
50% duty cycle
VCC = 5.25 V,
f0 = 10 MHz,
Load mode,
Outputs open,
CEP = CET =
PE = GND,
SR = VCC
One bit switching
at f1 = 5 MHz at
50% duty cycle
Four bits
switching at
f1 = 5 MHz at
50% duty cycle
Four bits
switching at
f1 = 5 MHz at
50% duty cycle
MIN
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
0.7
1.4
VIN = 3.4 V or GND
1.2
3.4
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
1.6
3.2||
VIN = 3.4 V or GND
2.9
8.2||
CY74FCT163T
TYP†
MAX
MIN
UNIT
mA
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
0.7
1.4
VIN = 3.4 V or GND
1.2
3.4
VIN ≤ 0.2 V or
VIN ≥ VCC – 0.2 V
1.6
3.2||
VIN = 3.4 V or GND
2.9
8.2||
Ci
5
10
5
10
pF
Co
9
12
9
12
pF
† Typical values are at VCC = 5 V, TA = 25°C.
# IC
= ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1)
Where:
IC
= Total supply current
ICC = Power-supply current with CMOS input levels
∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V)
DH
= Duty cycle for TTL inputs high
NT
= Number of TTL inputs at DH
ICCD = Dynamic current caused by an input transition pair (HLH or LHL)
f0
= Clock frequency for registered devices, otherwise zero
f1
= Input signal frequency
N1
= Number of inputs changing at f1
All currents are in milliamperes and all frequencies are in megahertz.
|| Values for these conditions are examples of the ICC formula.
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
CY54FCT163T
MIN
tw
Pulse duration
duration, high or low
tsu
Setup time, high or low
5
4
8
5
PE or SR before CP↑
P after CP↑
PE or SR after CP↑
CEP or CET after CP↑
6
MIN
Clock (count)
CEP or CET before CP↑
Hold time, high or low
CY74FCT163CT
Clock (load)
P before CP↑
th
MAX
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5.5
3.5
13.5
7.6
13
7.6
2
1.5
1.5
1
0
0
MAX
UNIT
ns
ns
ns
CY54FCT163T, CY74FCT163T
4-BIT BINARY COUNTERS
SCCS015A – MAY 1994 – REVISED OCTOBER 2001
switching characteristics over operating free-air temperature range (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
Propagation
g
delayy
(PE high)
CP
Q
tPLH
tPHL
Propagation
g
delayy
(PE low)
CP
TC
tPLH
tPHL
CP
TC
tPLH
tPHL
CET
TC
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
CY54FCT163T
CY74FCT163CT
MIN
MAX
MIN
MAX
2
11.5
1.5
5.8
2
11.5
1.5
5.8
2
10
1.5
5.2
2
10
1.5
5.2
2
16.5
1.5
7.8
2
16.5
1.5
7.8
1.5
9
1.5
4.4
1.5
9
1.5
4.4
UNIT
ns
ns
ns
ns
7
CY54FCT163T, CY74FCT163T
4-BIT BINARY COUNTERS
SCCS015A – MAY 1994 – REVISED OCTOBER 2001
PARAMETER MEASUREMENT INFORMATION
7V
From Output
Under Test
From Output
Under Test
Test
Point
CL = 50 pF
(see Note A)
Open
GND
CL = 50 pF
(see Note A)
500 Ω
S1
500 Ω
TEST
S1
Open
7V
Open
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
500 Ω
LOAD CIRCUIT FOR
3-STATE OUTPUTS
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3V
Timing Input
tw
tsu
3V
1.5 V
Input
1.5 V
0V
th
3V
Data Input
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
3V
1.5 V
Input
1.5 V
0V
tPLH
tPHL
1.5 V
1.5 V
VOL
tPHL
Out-of-Phase
Output
tPLZ
≈3.5 V
1.5 V
tPZH
VOH
1.5 V
VOL
1.5 V
0V
Output
Waveform 1
(see Note B)
tPLH
1.5 V
1.5 V
tPZL
VOH
In-Phase
Output
3V
Output
Control
Output
Waveform 2
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH – 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
8
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PACKAGE OPTION ADDENDUM
www.ti.com
21-May-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
1
TBD
Lead/Ball Finish
MSL Peak Temp (3)
CY54FCT163TLMB
ACTIVE
LCCC
FK
20
CY74FCT163CTQCT
ACTIVE
SSOP/
QSOP
DBQ
16
2500 Green (RoHS &
no Sb/Br)
POST-PLATE N / A for Pkg Type
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT163CTQCTE4
ACTIVE
SSOP/
QSOP
DBQ
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT163CTQCTG4
ACTIVE
SSOP/
QSOP
DBQ
16
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
CY74FCT163CTSOC
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT163CTSOCE4
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT163CTSOCG4
ACTIVE
SOIC
DW
16
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT163CTSOCT
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT163CTSOCTE4
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
CY74FCT163CTSOCTG4
ACTIVE
SOIC
DW
16
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
CY74FCT163CTSOCT
Package Package Pins
Type Drawing
SOIC
DW
16
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
2000
330.0
16.4
Pack Materials-Page 1
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
10.75
10.7
2.7
12.0
16.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
CY74FCT163CTSOCT
SOIC
DW
16
2000
346.0
346.0
33.0
Pack Materials-Page 2
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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Clocks and Timers
Interface
Logic
Power Mgmt
Microcontrollers
RFID
RF/IF and ZigBee® Solutions
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lprf
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Military
Optical Networking
Security
Telephony
Video & Imaging
Wireless
www.ti.com/audio
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
www.ti.com/wireless
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