Photometric Sensor for Gesture and Proximity ADUX1020 Data Sheet FEATURES GENERAL DESCRIPTION Multifunction photometric sensor and signal conditioning Fully integrated AFE, ADC, LED driver, and timing core Usable for multiple optical measurement applications, including gesture control and proximity sensing Enables an ambient light rejection capability using both optical and analog filtering On-chip programmable flexible current sink for external LED High sensitivity and signal-to-noise ratio (SNR) High resolution position measurement Gesture recognition with 0.5 cm to 15 cm range Proximity sensing to 20 cm 400 kHz I2C interface Gesture/proximity works under infrared (IR) transparent glass or other materials Simple integration with optics; no need for precise alignment and no lens is required Low power operation 1.8 V analog/digital core 8-lead, 2 mm × 3 mm, 0.65 mm height LFCSP The ADUX1020 is a highly efficient photometric sensor with an integrated 14-bit analog-to-digital converter (ADC) and a 20-bit burst accumulator that works in concert with a flexible light emitting diode (LED) driver. It is designed to modulate a LED and measure the corresponding optical return signal. The digital engine includes circuitry and control for data aggregation and proximity detection. The data output and device configuration use a 1.8 V I2C interface. The control circuitry includes flexible LED pulse width and period generation combined with synchronous detection. This circuitry is complemented by a low noise, low power, and wide dynamic range configurable analog front end (AFE), clock generation, LED driver, and digital logic for position and smart sample mode (event driven x, y coordinates, relative z data). This complete AFE features ambient light rejection, avoiding corruption due to external interference. APPLICATIONS One inexpensive standard surface mount, broad angle or narrow angle IR LED (depending upon application) is required. This LED mounts externally to the ADUX1020. Gesture for user interface (UI) control in portable devices Industrial/automation monitoring Presence detection Angle sensing Packaged in a small, clear mold, 2 mm × 3 mm, 8-lead LFCSP, the ADUX1020 is specified over an operating temperature range of −40°C to +85°C. FUNCTIONAL BLOCK DIAGRAM ADUX1020 AFE: SIGNAL CONDITIONING SDA SCL POSITION SENSOR ADC GESTURE ENGINE DIGITAL INTERFACE CONTROL LOGIC INT VREF LED DRIVER 11429-001 LEDX Figure 1. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. 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Technical Support www.analog.com ADUX1020* Product Page Quick Links Last Content Update: 11/01/2016 Comparable Parts Design Resources View a parametric search of comparable parts • ADUX1020 Evaluation Board • • • • Documentation Discussions Application Notes • AN-1419: Using the ADUX1020 for Gesture Recognition Data Sheet • ADUX1020: Photometric Sensor for Gesture and Proximity Data Sheet User Guides • UG-1022: Evaluating the ADUX1020 Photometric Sensor for Gesture and Proximity View all ADUX1020 EngineerZone Discussions Evaluation Kits ADUX1020 Material Declaration PCN-PDN Information Quality And Reliability Symbols and Footprints Sample and Buy Visit the product page to see pricing options Technical Support Submit a technical question or find your regional support number Reference Materials Press • Analog Devices’ Optical Sensor Improves Reliability of Gesture Recognition Applications * This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. 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ADUX1020 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Sample/Gesture Mode ............................................................... 10 Applications ....................................................................................... 1 Use of Multiple Modes ............................................................... 10 General Description ......................................................................... 1 Adjustable Sampling Frequency ............................................... 11 Functional Block Diagram .............................................................. 1 Normal Mode Operation and Data Flow ................................ 11 Revision History ............................................................................... 2 AFE Operation............................................................................ 12 Specifications..................................................................................... 3 I2C Serial Interface ..................................................................... 13 Temperature and Power Specifications ..................................... 3 Typical Connection Diagram ................................................... 14 Performance Specifications ......................................................... 4 LED Driver Pin and LED Supply Voltage ............................... 14 Analog Specifications ................................................................... 5 LED Driver Operation ............................................................... 14 Digital Specifications ................................................................... 6 Determining the Average Current ........................................... 15 Timing Specifications .................................................................. 6 LED Inductance Considerations .............................................. 15 Absolute Maximum Ratings ............................................................ 7 Recommended Start-Up Sequence .......................................... 15 Thermal Resistance ...................................................................... 7 Clocks and Timing Calibration ................................................ 15 ESD Caution .................................................................................. 7 Reading Data ............................................................................... 16 Pin Configuration and Function Descriptions ............................. 8 Calculating Current Consumption .......................................... 17 Typical Performance Characteristics ............................................. 9 Recommended Soldering Profile ................................................. 19 Theory of Operation ...................................................................... 10 Complete Register Listing ............................................................. 20 Idle Mode ..................................................................................... 10 Outline Dimensions ....................................................................... 31 Standby Mode ............................................................................. 10 Ordering Guide .......................................................................... 31 Proximity Mode .......................................................................... 10 REVISION HISTORY 6/2016—Revision A: Initial Version Rev. A | Page 2 of 31 Data Sheet ADUX1020 SPECIFICATIONS TEMPERATURE AND POWER SPECIFICATIONS Table 1. Operating Conditions Parameter TEMPERATURE RANGE Operating Range Storage Range POWER SUPPLY VOLTAGES Input Supply Voltage Supply Voltage for the LEDs Symbol Test Conditions/Comments Min Typ −40 −65 VDD VLED 1.7 1.8 3.3 VLED depend on the LED selected Max Unit +85 +150 °C °C 1.9 V V VDD = 1.8 V, ambient temperature, unless otherwise noted. Table 2. Current Consumption Parameter TOTAL POWER CONSUMPTION VDD STANDBY MODE CURRENT SUPPLY CURRENT 1.8 V VDD Peak 1.8 V VDD Average Example VDD Average Average VLED Example VLED Average 1 Pulse (Proximity) 8 Pulses (Sample/Gesture) Symbol Test Conditions/Comments See the Calculating Current Consumption section Min IVDD_STANDBY IVDD_PEAK IVDD_AVG ILED_AVG Typ Max 3.5 Continuous maximum rate AFE operation See the Calculating Current Consumption section LED_OFFSET = 25 µs, LED_PERIOD = 19 µs, LED_PULSES = 8, LED peak current = 250 mA 1 Hz data rate; proximity mode 50 Hz data rate; proximity mode 820 Hz data rate; sample/gesture mode See the Calculating Current Consumption section Peak LED current = 250 mA, LED_PULSE width = 3 µs 1 Hz data rate 50 Hz data rate 820 Hz data rate 50 Hz data rate 820 Hz data rate Rev. A | Page 3 of 31 <10 30 10,000 mA µA 20,000 µA µA µA µA 6 116 1965 1 1 38 615 300 4920 Unit µW µA µA µA µA µA µA ADUX1020 Data Sheet PERFORMANCE SPECIFICATIONS VDD = 1.8 V, TA = full operating temperature range, unless otherwise noted. Table 3. LED Peak Current Driver Compliance Voltage Min Typ 845 50 Hz update rate, 5 mA total current, hand sized target 5 Hz update rate 0.5 0.5 Single pulse Max Unit 960 120 15 20 nm Degrees cm cm 1400 Bits Hz 13 0.1 TA = 25°C, ILED = 70 mA Slew rate control setting = 0 Slew rate control setting = 7 Slew rate control setting = 0 Slew rate control setting = 7 LED pulse enabled Voltage above ground, LEDX pin required for controlled LED driver operation 100 90 80 70 60 50 40 30 20 10 0 400 450 500 550 600 650 700 750 800 850 900 950 1000 WAVELENGTH (nm) 11429-002 Fall Test Conditions/Comments NORMALIZED QUANTUM EFFICIENCY (%) Parameter OPTICAL SENSOR Wavelength Field of View Gesture Recognition Range Proximity DATA AQUISITION Resolution Output Data Rate LED DRIVER LED Current Slew Rate1 Rise Figure 2. Normalized Quantum Efficiency of Combined Optical Filter and Silicon Detector Rev. A | Page 4 of 31 131 74 490 84 8 0.2 250 mA/μs mA/μs mA/μs mA/μs mA V Data Sheet ADUX1020 ANALOG SPECIFICATIONS VDD = 1.8 V, TA = full operating temperature range, unless otherwise noted. AFE offset is correctly compensated as explained in the AFE Operation section. Table 4. Parameter PULSED SIGNAL CONVERSIONS, 3 µs WIDE LED PULSE1 ADC Resolution2 ADC Saturation Level Ambient Signal Headroom on Pulsed Signal FULL SIGNAL CONVERSIONS3 TIA Saturation Level of Pulsed Signal and Ambient Level Test Conditions/Comments 4 µs wide AFE integration; Register 0x13 = 0xADA5 Transimpedance amplifier (TIA) feedback resistor 50 kΩ 100 kΩ 200 kΩ TIA feedback resistor 50 kΩ 100 kΩ 200 kΩ TIA feedback resistor 50 kΩ 100 kΩ 200 kΩ Typ Max Unit 0.82 0.41 0.2 nA/LSB nA/LSB nA/LSB 6.7 3.35 1.67 µA µA µA 18.5 9.25 4.63 µA µA µA 25.2 12.6 6.3 µA µA µA 2.4 2.0 70.6 3.4 1.4 67.6 5.5 1.1 63.5 −37 LSB rms nA rms dB LSB rms nA rms dB LSB rms nA rms dB dB TIA feedback resistor 50 kΩ 100 kΩ 200 kΩ SYSTEM PERFORMANCE Total Output Noise Floor Min Normal mode, per pulse, per channel, no LED 50 kΩ, referred to ADC input 50 kΩ, referred to peak input signal for 3 µs LED pulse 50 kΩ, saturation SNR per pulse per channel 100 kΩ, referred to ADC input 100 kΩ, referred to peak input signal for 3 µs LED pulse 100 kΩ, saturation SNR per pulse per channel 200 kΩ, referred to ADC input 200 kΩ, referred to peak input signal for 3 µs LED pulse 200 kΩ, saturation SNR per pulse per channel DC Power Supply Rejection Ratio (DC PSRR) 1 This saturation level applies to the ADC only and, therefore, includes only the pulsed signal. Any nonpulsatile signal is removed prior to the ADC stage. ADC resolution is given for a single pulse when the AFE offset is correctly compensated as explained in the AFE Operation section. If using multiple pulses, divide by the number of pulses. 3 This saturation level applies to the full signal path and, therefore, includes both the ambient signal and the pulsed signal. 2 Rev. A | Page 5 of 31 ADUX1020 Data Sheet DIGITAL SPECIFICATIONS VDD = 1.7 V to 1.9 V, unless otherwise noted. Table 5. Parameter LOGIC INPUTS (SCL, SDA) Input Voltage High Level Low Level Input Current High Level Low Level Input Capacitance LOGIC OUTPUTS Output Voltage INT High Level INT Low Level SDA Low Level Current Maximum INT Pin SDA Low Level Output Symbol Test Conditions/Comments Min VIH VIL Proper operation to VDD only IIH IIL CIN Typ Max Unit 0.7 × VDD 3.6 0.3 × VDD V V −10 −10 +10 +10 μA μA pF VDD 0.5 0.2 × VDD V V V 10 2 mA output current VOH VOL VOL1 VDD − 0.5 IINT IOL Source or sink VOL1 = 0.6 V 6 mA mA 6 TIMING SPECIFICATIONS Table 6. I2C Timing Specifications Parameter I2C PORT1 SCL Frequency SCL Minimum Pulse Width High SCL Minimum Pulse Width Low Start Condition Hold Time Start Condition Setup Time SDA Setup Time SCL and SDA Rise Time SCL and SDA Fall Time Stop Condition Setup Time Test Conditions/Comments See Figure 3 Min Typ Max 400 t1 t2 t3 t4 t5 t6 t7 t8 600 1300 600 600 100 1000 300 600 Guaranteed by design. t3 t5 t3 SDA t6 t1 SCL t2 t7 t4 2 Figure 3. I C Timing Rev. A | Page 6 of 31 t8 11429-003 1 Symbol Unit kHz ns ns ns ns ns ns ns ns Data Sheet ADUX1020 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 7. Parameter VDD to AGND/DGND INT to DGND LEDX to AGND SCL to DGND SDA to DGND Junction Temperature ESD Human Body Model (HBM) Charged Device Model (CDM) Machine Model (MM) Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. Rating −0.3 V to +3.9 V −0.3 V to +3.9 V −0.3 V to +3.6 V −0.3 V to +3.9 V −0.3 V to +3.9 V 150°C Table 8. Thermal Resistance Package Type CP-8-171 1 1500 V 1250 V 100 V Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. θJA 59.25 θJC 4.01 Unit °C/W Test Condition: Thermal impedance simulated values are based on JEDEC 2S2P thermal test board with four thermal vias. See JEDEC JESD51. ESD CAUTION Rev. A | Page 7 of 31 ADUX1020 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SCL 1 8 SDA VDD 2 ADUX1020 7 INT VREF 3 TOP VIEW (Not to Scale) 6 LEDX 5 DGND NOTES 1. EXPOSED PAD. CONNECT THE EXPOSED PAD TO DGND OR TO AN ELECTRICALLY ISOLATED PAD. 11429-004 AGND 4 Figure 4. Pin Configuration Table 9. Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic SCL VDD VREF AGND DGND LEDX INT SDA EPAD Type Digital input Supply Input Supply Supply Analog input Digital output Digital bidirectional Not applicable Description Serial Clock for I2C Communication. 1.8 V Supply Input. Reference Voltage. Bypass this pin with a 1 μF to 4 μF capacitor from VREF to AGND. Analog Ground. Digital Ground. LED Current Sink. Interrupt Output. Serial Data. Exposed Pad. Connect the exposed pad to DGND or to an electrically isolated pad. Rev. A | Page 8 of 31 Data Sheet ADUX1020 TYPICAL PERFORMANCE CHARACTERISTICS 20 PERCENT OF POPULATION (%) 25 20 15 10 15 10 5 0 –25 –20 –15 –10 –5 0 5 10 SAMPLE FREQUENCY DEVIATION FROM NOMINAL (%) 15 0 Figure 5. 32 kHz Clock Frequency Distribution (Typical Setting After Calibration: Register 0x18 = 0x2612) 27.5 28.0 28.5 29.0 29.5 30.0 30.5 31.0 31.5 32.0 FREQUENCY (MHz) Figure 6. 32 MHz Clock Frequency Distribution (Default Settings Before User Calibration: Register 0x1A = 0x425E) Rev. A | Page 9 of 31 11429-006 5 11429-005 PERCENT OF POPULATION (%) 30 ADUX1020 Data Sheet THEORY OF OPERATION The ADUX1020 operates as a gesture and proximity optical sensor system, stimulating an LED and measuring the incident angle of returning light. It is a highly integrated system including an optical sensor, analog signal processing block, digital signal processing block, and I2C communication port. The optical sensor employed in this device is a photodiode that measures the angle of incident light and produces a highly linear output for a wide range of input angles. The ADUX1020 can be configured in one of the following four modes by the command from the host processor through I2C port. • • • • Idle mode Standby mode Proximity mode Sample/gesture mode IDLE MODE The ADUX1020 enters idle mode automatically after power-up, and it stays in this low power mode until it receives a command from the host processor to move to any of the three other modes. STANDBY MODE Standby mode is a power saving mode in which no data collection occurs. This mode is the lowest power mode without cutting the external power supply. In this mode, all register values are retained. To place the device in standby mode, write 0x0 to Register 0x45, Bits[3:0]. No I2C acknowledge (ACK) generates for this write. Any write to this address causes the device to leave standby mode. PROXIMITY MODE When the ADUX1020 is configured for proximity mode, it pulses the LED based on the proximity configuration settings including update rate, peak LED current, and number of pulses. Proximity detection is performed by measuring the intensity of the light reflected from objects over the LED and sensor. This intensity is the sum of the four channels of the sensor. The ADUX1020 can generate an interrupt for a specific intensity event. An event is defined as the point when the intensity signal meets certain intensity threshold criteria. Two thresholds in proximity mode allow hysteresis: an on event and an off event threshold. Upon receiving the interrupt, the host processor can read the intensity from the output buffer of the ADUX1020. It can also read the x and y coordinates of the detected object. The data format of the first in, first out (FIFO) output of the ADUX1020, can be specified using Register 0x45. To place the device in proximity mode, write 0x1 to Register 0x45, Bits[3:0]. SAMPLE/GESTURE MODE In sample/gesture mode, the ADUX1020 uses a second set of configuration registers and transmits LED pulses based on the configuration including update rate, peak LED current, and number of pulses, similar to the proximity mode. The LED signaling in the proximity and sample modes are similar except that a higher update rate is typically required for sample mode. The ADUX1020 captures the coordinate samples for gesture interpretation, triggered by the events defined in Register 0x3E and Register 0x40. When the start of a potential gesture is detected, the ADUX1020 can generate an interrupt. This feature allows the host processor to sleep while awaiting gesture activity. The event that triggers an interrupt can be either absolute intensity or derivative of the intensity signal, and the ADUX1020 can generate an interrupt signal so that the host processor can sleep while awaiting gesture activity. To place the device in sample mode, write 0x8 to Register 0x45, Bits[3:0]. USE OF MULTIPLE MODES The ADUX1020 can programmatically enter sample/gesture mode when a certain input threshold in proximity mode is reached. The threshold, specified by a 16-bit number, can be set in Register 0x2C. To enable this behavior, write 1 to Register 0x45, Bit 10 and start the device in proximity mode. The value in Register 0x2A defines the threshold for an on event, and the ADUX1020 generates an interrupt when the intensity of the received light becomes higher than this value. The value in Register 0x2B defines the threshold for an off event, and the ADUX1020 generates an interrupt when the intensity of the received light becomes lower than this value. Rev. A | Page 10 of 31 Data Sheet ADUX1020 ADJUSTABLE SAMPLING FREQUENCY 2. Register 0x40 controls the sampling frequency settings of the ADUX1020 for sample/gesture mode and proximity mode, and Register 0x18, Bits[5:0] further tune this clock for greater accuracy. The sampling frequency is governed by an internal 32 kHz sample rate clock that also drives the transition of the internal state machine. The maximum sampling frequency is 1.4 kHz. Note that the state machine continues until the desired number of LED pulses and periods between pulses has completed during the full sample. In addition, the programmed pulse train may not fit within a full sample period. The maximum sample frequency for sample/gesture mode is determined by fSAMPLE, MAX = 1/(tGEST + tA + tSLEEP) (1) where: tGEST is the time required for a complete sample in sample/gesture mode. tA is the compute time for sample/gesture mode, defined in Table 10. tSLEEP is the minimum sleep time required between samples, defined in Table 10. The maximum sample frequency for proximity mode is similar and determined by the following: fSAMPLE, MAX = 1/(tPROX + tB + tSLEEP) (2) where: tPROX is the time required for a complete sample in proximity mode. tB is the compute time for proximity mode, defined in Table 10. tSLEEP is the minimum sleep time required between samples, defined in Table 10. The timing parameters for sample/gesture and proximity mode are as follows: tPROX = LED_OFFSET_PROX + LED_PULSES_PROX × LED_PERIOD_PROX (3) tGEST = LED_OFFSET_GEST + LED_PULSES_GEST × LED_PERIOD_GEST (4) Calculate the LED period with the following equation: LED_PERIOD, minimum = 2 × AFE_WIDTH + 11 (5) tA and tB are fixed and based on the computation time for each mode. See Table 10 for the definitions of LED_OFFSET_GEST, LED_OFFSET_PROX, LED_PERIOD_GEST, LED_PERIOD_PROX, tA, tB, and tSLEEP. NORMAL MODE OPERATION AND DATA FLOW In the proximity, and sample/gesture modes, the ADUX1020 follows a specific pattern set up by the state machine. This pattern follows: 1. LED pulse and sample. The ADUX1020 pulses external LEDs. The response of the optical sensor to the reflected light is measured by the ADUX1020. Each data sample is constructed from the sum of n individual pulses, where n is user configurable between 1 and 63. 3. 4. Intersample averaging. If desired, the logic can average n samples, from 2 to 32 in powers of 2, to produce output data. New output data is saved to the output registers every N samples. Data read. The host processor reads the converted results from the data register or the FIFO. Repeat. LED Pulse and Sample At each sampling period, the LED driver drives a series of LED pulses, as shown in Figure 7. The magnitude, duration, and number of pulses are programmable over the I2C interface. Each LED pulse coincides with a sensing period so that the sensed value represents the total charge acquired on the photodiode in response to only the corresponding LED pulse. Charge, such as ambient light, that does not correspond to the LED pulse is rejected. After each LED pulse, the sensor output relating the pulsed LED signal is sampled and converted to a digital value by the 14-bit ADC. Each subsequent conversion within a sampling period is summed with the previous result. Up to 63 pulse values from the ADC can be summed in an individual sampling period. There is a 16-bit maximum range for each sampling period. Averaging The ADUX1020 offers sample accumulation and averaging functionality to increase signal resolution. Within a sampling period, the AFE can sum up to 63 sequential pulses. This accumulated data of N pulses is stored as 20-bit values and can be read out directly by using the output registers or indirectly using the FIFO configuration (only as 16-bit values). When using the averaging feature set up by Register 0x46 (decimation), subsequent samples can be averaged in groups of powers of 2. The user can select from 2, 4, 8, 16, or 32 samples to be averaged together. Sample data is still acquired by the AFE at the sampling frequency, fSAMPLE (Register 0x40), but new data is written to the registers at the rate of fSAMPLE/N every Nth sample. This new data consists of the sum of the previous N samples. The full 20-bit sum is stored in the output registers. However, before sending this data to the FIFO, a divide by N operation occurs (bit shift). This divide operation maintains bit depth to prevent clipping of the 16-bit FIFO. Use this between sample averaging to lower the noise while maintaining 16-bit resolution. If the pulse count registers are kept to 8 or less, the 16-bit width is never exceeded. Therefore, when using Register 0x46 to average subsequent pulses, many pulses can be accumulated without exceeding the 16-bit word width, which can reduce the number of FIFO reads required by the host processor. Rev. A | Page 11 of 31 ADUX1020 Data Sheet Data Read AFE OPERATION The host processor reads output data from the ADUX1020, via the I2C protocol, from the data registers or from the FIFO. New output data is made available every N samples, where N is the user configured power of 2 averaging factor. The averaging factors for proximity and sample/gesture are configurable independently of each other. If they are the same, both time slots can be configured to save data to the FIFO. If the two averaging factors are different, only one time slot can save data to the FIFO; data from the other time slot can be read from the output registers. The timing within each pulse burst is important for optimizing the operation of the ADUX1020. Figure 7 shows the timing waveforms for a single time slot as an LED pulse response propagates through the analog block of the AFE. Graph A shows the ideal LED pulsed output, the filtered LED response (Graph B) shows the output of the analog integrator, and Graph C illustrates an optimally placed integration window (see Figure 7). When programmed to the optimized value, the full signal of the filtered LED response can be integrated. The AFE integration window is then applied to the output of the band-pass filter (BPF), and the result is sent to the ADC and summed for N pulses. The data read operations are described in more detail in the Reading Data section. Table 10. LED Timing and Sample Timing Parameters Parameter LED_OFFSET_GEST LED_OFFSET_PROX LED_PERIOD_GEST1 Register 0x20 0x22 0x21 Bits [5:0] [5:0] [7:0] LED_PERIOD_PROX1 tA tB tSLEEP 0x23 [7:0] Min 23 23 19 Typ 19 Max 63 63 63 Unit μs μs μs 63 μs μs μs μs 68 20 200 Setting the LED_PERIOD_x less than the specified minimum value can cause invalid data captures. LED WIDTH REGISTER 0x20, BITS[12:8] REGISTER 0x22, BITS[12:8] N LED PULSES LED PERIOD LED DRIVE STRENGTH REGISTER 0x21, BITS[7:0] REGISTER 0x23, BITS[7:0] REGISTER 0x21, BITS[13:8] REGISTER 0x23, BITS[13:8] REGISTER 0x41, BITS[3:0] REGISTER 0x41, BITS[11:8] LED PULSE FOR N PULSES FILTERED LED RESPONSE FOR N PULSES AFE INTEGRATION WINDOW FOR N PULSES CONTROLLED BY: TIA SETTINGS AFE SETTINGS REGISTER 0x12, BITS[15:0] REGISTER 0x13, BITS[15:0] 9µs + AFE OFFSET REGISTER 0x25, BITS[10:0] REGISTER 0x26, BITS[10:0] AFE WIDTH REGISTER 0x25, BITS[15:11] REGISTER 0x26, BITS[15:11] AFE WIDTH ADC CONVERSION + TIME (µs) Figure 7. AFE Operation Diagram Rev. A | Page 12 of 31 ADC CONVERSION 11429-007 (GRAPH B) (GRAPH A) LED OFFSET REGISTER 0x20, BITS[5:0] REGISTER 0x22, BITS[5:0] (GRAPH C) 1 Test Conditions/Comments Delay from AFE power-up to LED rising edge Delay from AFE power-up to LED rising edge Time between LED pulses in sample/gesture mode, AFE_WIDTH_GEST = 4 μs Time between LED pulses in proximity mode, AFE_WIDTH_PROX = 4 μs Compute time for sample/gesture mode Compute time for proximity mode Sleep time between sample periods Data Sheet ADUX1020 I2C SERIAL INTERFACE The software reset (Register 0x0F, Bit 0) is the only command that does not return an ACK because the command is instantaneous. The ADUX1020 supports an I2C serial interface via the SDA (data) and the SCL (clock) pins. All internal registers are accessed through the I2C interface. Table 11. Definition of I2C Terminology 2 The ADUX1020 conforms to the UM10204 I C-Bus Specification and User Manual, Rev. 05—9 October 2012, available from NXP Semiconductors. It supports a fast mode (400 kbps) data transfer. Register read and write are supported, as shown in Figure 8. Figure 3 shows the timing diagram for the I2C interface. Term SCL SDA Master Slave Address Start (S) The 7-bit I2C slave address for the device is 0x64, followed by the R/W bit; therefore, a write to the default I2C slave address is 0xC8 and a read to the default I2C slave address is 0xC9. The slave address is not configurable. Slave Start (Sr) Stop (P) I2C Write and Read Operations ACK Figure 8 illustrates the ADUX1020 I2C write and read operations. Single-word read operations are supported. For a single register read, the host sends a no acknowledge (NACK) after the second data byte is read, and a new register address is needed for each access. NACK Slave Address When reading from the FIFO (Register 0x60), the data is automatically advanced to the next word in the FIFO and the space is freed. All register writes are single-word only and require 16 bits (one word) of data. Read (R) Write (W) Description Serial clock. Serial address and data. The device that initiates a transfer, generates clock signals, and terminates a transfer. The device addressed by a master. The ADUX1020 operates as a slave device. A high to low transition on the SDA line while SCL is high; all transactions begin with a start condition. Repeated start condition. A low to high transition on the SDA line while SCL is high. A stop condition terminates all transactions. During the ACK or NACK clock pulse, the SDA line is pulled low and remains low. During the ACK or NACK clock pulse, the SDA line remains high. After a start (S), a 7-bit slave address is sent, which is followed by a data direction bit (read or write). A 1 indicates a request for data. A 0 indicates a transmission. REGISTER WRITE MASTER START SLAVE ADDRESS + WRITE SLAVE REGISTER ADDRESS ACK DATA[15:8] ACK DATA[7:0] ACK STOP ACK REGISTER READ SLAVE SLAVE ADDRESS + WRITE REGISTER ADDRESS ACK Sr ACK SLAVE ADDRESS + READ ACK ACK NOTES 1. THE SHADED AREAS REPRESENT WHEN THE DEVICE IS LISTENING. Figure 8. I2C Write and Read Operations Rev. A | Page 13 of 31 DATA[15:8] NACK DATA[7:0] STOP 11429-006 MASTER START ADUX1020 Data Sheet TYPICAL CONNECTION DIAGRAM LED DRIVER PIN AND LED SUPPLY VOLTAGE Figure 10 shows a typical circuit configuration using the ADUX1020. The 1.8 V I2C communication lines, SCL and SDA, along with the INT line, connect to a system microprocessor or sensor hub. The I2C signals can have pull-up resistors connected to a 1.8 V or a 3.3 V power supply. The INT signal is compatible only with a 1.8 V supply and may need a level translator. The LEDX pin has an absolute maximum voltage rating of 3.6 V. Any voltage exposure over this rating affects the reliability of the device operation and, in certain circumstances, causes the device to cease proper operation. Do not confuse the LEDX pin voltage with the supply voltage for the LEDs (VLED). VLED is the voltage applied to the anode of the external LED, whereas the LEDX pin is the input of the internal current driver, which must be connected to the cathode of the external LED. For the best noise performance, connect AGND and DGND together at a large conductive surface such as a ground plane, a ground pour, or a large ground trace. LED DRIVER OPERATION The LED driver for the ADUX1020 is a current sink requiring 0.2 V of compliance above ground to maintain the programmed current level. Figure 9 shows the basic schematic of how the ADUX1020 connects to an LED through the LED driver. The Determining the Average Current section defines the requirements for the bypass capacitor (CVLED) and the supply voltages of the LEDs (VLED). ADUX1020 LGND CVLED LEDX VLED SUPPLY 11429-009 Provide a 1.8 V supply to the VDD pin. Use the supply voltage for the LEDs (VLED) for the LED supply using standard regulator circuits according to the peak current requirements specified in the Determining the Average Current section and calculated in the Calculating Current Consumption section. Figure 9. VLED Supply Schematic ADUX1020 AFE: SIGNAL CONDITIONING VDD 1.8V 2 1µF AGND 4 DGND 5 POSITION SENSOR ADC GESTURE ENGINE DIGITAL INTERFACE CONTROL LOGIC 8 SDA 1 SCL 7 INT VLED 3.3V 1µF LED LEDX 6 LED DRIVER Figure 10. Typical Circuit Configuration Rev. A | Page 14 of 31 1µF 11429-011 VREF 3 Data Sheet ADUX1020 DETERMINING THE AVERAGE CURRENT RECOMMENDED START-UP SEQUENCE The ADUX1020 drives an LED in a series of short pulses. Figure 11 shows the typical ADUX1020 circuit configuration of a pulse burst sequence. In this example, the LED pulse width, tLED_PULSE, is 3 μs, and the LED pulse period, tLED_PERIOD, is 19 μs. The infrared LED may be driven to 250 mA peak current. The goal of CVLED is to buffer the LED between individual pulses. In the worst case scenario, where the pulse train shown in Figure 11 is a continuous sequence of short pulses, the VLEDx supply must supply the average current. Therefore, calculate ILED_AVERAGE as follows: The general power-up configuration sequence follows: ILED_AVERAGE = (tLED_PULSE/tLED_PERIOD) × ILED_MAX (6) where: ILED_AVERAGE is the average current needed from the VLED supply, and it is also the VLED supply current rating. tLED_PULSE is the time the LED is pulsed on, nominally 3 μs. tLED_PERIOD is the period between LED pulses, nominally 19 μs. ILED_MAX is peak current setting of the LED. For the numbers shown in Equation 6, ILED_AVERAGE = 3/19 × ILED_MAX. For typical LED timing, the average VLED supply current is 3/19 × 250 mA = 39.4 mA, indicating that the VLED supply must support a dc current of 40 mA. 19µs 3µs 1. 2. 3. 4. CLOCKS AND TIMING CALIBRATION The ADUX1020 operates using two internal time bases: a 32 kHz clock sets the sample timing and internal power state machine, and a 32 MHz clock controls the timing of the internal functions such as LED pulsing and data capture. Both clocks are internally generated. Because the 32 kHz oscillator on the ADUX1020 may have up to 30% variation in frequency due to the variation of on-chip RC components, calibration is recommended to keep the error less than 2%. Calibrating the 32 kHz Clock The ADUX1020 provides a simple calibration procedure for both clocks. To calibrate the 32 kHz clock, take the following steps: 1. 2. 3. 4. 11429-010 ILED_MAX 5. Figure 11. Typical LED Pulse Burst Sequence Configuration LED INDUCTANCE CONSIDERATIONS 6. The LED driver (LEDX) on the ADUX1020 has a configurable slew rate settings (Register 0x41, Bits[6:4]) This slew rate is defined in Table 3. Even in the lowest setting, careful consideration must be taken in PCB design and layout. If a large series inductor, such as a long PCB trace, is placed between the LED cathode and the LEDX pin, voltage spikes from the switched inductor can cause violations of absolute maximum and minimum voltage on the LEDX pin during the slew portion of the LED pulse. Check the device ID by reading the CHIP_ID value in Register 0x08, Bits[11:0], and the version value in Register 0x08, Bits[15:12]. Reset the device by writing 0x1 to Register 0x0F, Bit 0. Load the default configuration. Calibrate the clocks (see the Clocks and Timing Calibration section). Set the projected output rate to 50 Hz by writing 0x8 to Register 0x40, Bits[3:0] and set the device to sample mode by writing 0x8 to Register 0x45, Bits[3:0]. Flush the I2C FIFO by writing to Register 0x49, Bit 15. Poll data from the I2C FIFO for 3 sec. Calculate the actual output rate equal to the sample set count divided by 3. Adjust the 32 kHz oscillator trim value by writing to Register 0x18, Bits[5:0] with the appropriate value. Repeat Step 1 through Step 5 until the actual measured output data rate is as close to 50 Hz as possible. If the output data rate is below 50 Hz, increment the trim value, and if it is above 50 Hz, decrement the trim value. If a microprocessor is connected to the ADUX1020, the 32 kHz clock can reference to the microprocessor timer. In this case, the output rate can be set to 800 Hz, and the overall time for the clock calibrate is reduced. In general, one to three iterations can have the clock calibrated. It is equivalent to approximately 0.5 sec to 1.5 sec. To verify that there are no voltage spikes on the LEDX pin due to parasitic inductance, use an oscilloscope on the LEDX pin to monitor the voltage during normal operation. Any positive spike >3.6 V may damage the device. In addition, a negative spike ≤ −0.3 V may also damage the device. Rev. A | Page 15 of 31 ADUX1020 Data Sheet Use the following steps to calibrate the 32 kHz clock by referencing the timer of the controlling microprocessor. Do not set the I2C output rate to a speed that overloads the I2C FIFO. If the microprocessor is fully available for handling clock calibration operation at this time, and its I2C speed is set to 400 kHz, the I2C throughput will be more than 2 kHz. 1. 2. 3. 4. 5. 6. 7. Set the projected output rate to 820 Hz by writing 0x1C to Register 0x44. Set up and run the device in sample mode by writing 0x8 to Register 0x45, Bits[3:0]. Flush the I2C FIFO by writing Register 0x49, Bit 15. Poll data from I2C FIFO for 0.5 sec by repeatedly reading Register 0x60. Count the number of sample sets for 1 sec. Calculate the actual output rate equal to the sample set count divided by 0.5. Adjust the 32 kHz oscillator trim value by writing to Register 0x18, Bits[3:0] with the appropriate value. Repeat Step 1 through Step 5 until the actual measured output data rate is as close to 820 Hz as possible. If the output data rate is below 820 Hz, increment the trim value, and if it is above 820 Hz, decrement the trim value. Calibrating the 32 MHz Clock written to the FIFO. Data packets are written to the FIFO at the output data rate. Output Data Rate = fSAMPLE/N where: fSAMPLE is the sampling frequency. N is the averaging factor for sample/gesture mode or proximity mode. A data packet for the FIFO consists of a complete sample for either proximity mode or sample/gesture mode. In proximity mode, the device can store either only intensity i data as 2 bytes or x, y, and i data as 6 bytes. In sample/gesture mode, the device always sends 4 bytes to the FIFO. To ensure that data packets are intact, new data is written only to the FIFO if there is sufficient space for a complete packet. Any new data that arrives when there is not enough space is lost. The FIFO continues to store data when sufficient space exists. Always read FIFO data in complete packets to ensure that data packets remain intact. The number of bytes currently stored in the FIFO is available in Register 0x49, Bits[14:8]. A dedicated FIFO interrupt is also available and automatically generates when a specified amount of data is written to the FIFO. The 32 MHz oscillator on the ADUX1020 may also have up to 30% variation in frequency due to the variation of on-chip RC components. Use the following steps to calibrate the 32 MHz clock by comparing it with the 32 kHz clock. To read data from the FIFO using an interrupt-based method, use the following procedure: 1. 2. 2. 3. 4. 5. 6. 7. Enable the 32 kHz oscillator by writing Register 0x18, Bit 7. Enable the 32 MHz oscillator by writing Register 0x32, Bit 3 and Bit 11. Enable clock calibration by writing Register 0x30, Bit 5. Read the calibration result from Register 0x0A, Bits[11:0]. Compare the calibration result. The calibration is complete when the result read is as close as possible to the optimal value of 2000. If it is not, increment the trim value if the result is below 2000, or decrement if it is above 2000. Write the new trim value and then write 1 to Register 0x30, Bit 5. Note that typically two trim values produce calibration results that straddle the optimal result. Choose the closest. Write the new trim value in Register 0x1A, Bits[7:0]. Disable calibration by writing 0 to Register 0x30, Bit 5. 1. 3. 4. 5. 6. READING DATA The ADUX1020 provides multiple methods for accessing the sample data. Interrupt signaling is available to simplify timely data access. The FIFO is available to loosen the system timing requirements for data accesses. Reading Data Using the FIFO The ADUX1020 includes a 64-byte FIFO memory buffer that can store data from either sample/gesture mode or proximity mode. Register 0x45, Bits[7:4] select the kind of data to be Rev. A | Page 16 of 31 In standby mode, set the configuration of sample/gesture or proximity mode as desired for operation. Write to Register 0x45, Bits[7:4] with the desired data format for each mode. Set FIFO_TH in Register 0x1F, Bits[11:8] to the interrupt threshold. A good value for this is the number of 16-bit words in a data packet minus 1, which causes an interrupt to generate when at least one complete packet is in the FIFO. Enable the FIFO interrupt by writing INT_MASK, Register 0x48, Bits[7:0]. Also, configure the interrupt pin (INT) by writing the appropriate value to Register 0x1C, Bit 2. Enter sample/gesture or proximity mode by setting Register 0x45, Bits[3:0] to the desired value. When an interrupt occurs, the following results: a. Note that there is no requirement to read the FIFO_ STATUS register because the interrupt is generated only if there is one or more full packets. Optionally, the interrupt routine can check for the presence of more than one available packet by reading this register. b. Force the 32 MHz clock on by writing 0x0F4F to Register 0x32. c. Read a complete packet using one or more multiword accesses using Register 0x60. Reading the FIFO automatically frees the space for new samples. d. Set the 32 MHz clock to be controlled by the internal state machine by writing 0x40 to Register 0x32. Data Sheet ADUX1020 4. The interrupt automatically clears when enough data is read from the FIFO to bring the data level below the threshold. To read data from the FIFO in a polling method, use the following procedure: 1. 2. 3. In standby mode, set the configuration of gesture/sample mode or proximity mode as desired for operation. Write Register 0x45, Bits[7:4] with the desired data format. Enter proximity or sample/gesture mode by setting Register 0x45, Bits[3:0] to the desired setting. Next, begin the polling operations, by taking the following steps: 1. 2. 3. 4. Wait for the polling interval to expire. Read the FIFO_STATUS bits (Register 0x49, Bits[15:8]). If FIFO_STATUS is greater than or equal to the packet size, read a packet using the following steps: a. Force the 32 MHz clock on by writing 0x0F4F to Register 0x32. b. Read a complete packet using one or more multiword accesses using Register 0x60. Reading the FIFO automatically frees the space for new samples. c. Set the 32 MHz clock to be controlled by the internal state machine by writing 0x0040 to Register 0x32. When a mode change is required, or any other disruption to normal sampling is necessary, clear the FIFO. Use the following procedure to clear the state and empty the FIFO: a. Enter idle mode by setting Register 0x45, Bits[3:0] to 0xF. b. Force the 32 MHz clock on by writing 0x0F4F to Register 0x32. c. Write 1 to Register 0x49, Bit 15. d. Write 0x40 to Register 0x32 to set the 32 MHz clock to be controlled by the internal state machine. Reading Data from Registers Using Interrupts The latest sample data is always available in the data registers and is updated simultaneously at the end of each time slot. The data value for each photodiode channel is available as a 16-bit value in Register 0x00 through Register 0x03 (READX1, READX2, READY1, and READY2) for sample/gesture mode, and Register 0x04 through Register 0x06 (SAMPLEI, SAMPLEX, and SAMPLEY) for proximity mode. If allowed to reach their maximum value, Register 0x00 through Register 0x06 clip. Sample interrupts are available to indicate when the registers are updated and can be read. To use the interrupt for a given time slot, use the following procedure: 1. 2. 3. The interrupt handler must perform the following: a. Read Register 0x49 and observe Bits[7:0] to confirm which interrupt has occurred. This step is not required if only one interrupt is in use. b. Read the data registers before the next sample can be written. The system must have interrupt latency and service time short enough to respond before the next data update based on the output data rate. c. Write 0x0 to Bits[7:0] in Register 0x49 to clear the interrupt. CALCULATING CURRENT CONSUMPTION The current consumption of the ADUX1020 depends on the user selected operating configuration, as described in the Equation 7, Equation 8, and Equation 9. Total Power Consumption To calculate the total power consumption, use Equation 7. Total Power = IVDD_AVG × VDD + ILED_AVG × VLED (7) where: IVDD_AVG is the VDD average. VDD is the ADUX1020 supply voltage. ILED_AVG is the average LED current. VLED is the LED supply voltage. Average VDD Supply Current To calculate the average VDD supply current, use Equation 8. IVDD_AVG = DR × (IAFE × tMODE + IPROC) + IVDD_STANDBY (8) where: DR is the data rate in Hz. IAFE = 8.9 + (LEDPEAK − 25)/225, where LEDPEAK is the peak LED current expressed in mA. tMODE = LED_OFFSET_x + LED_PERIOD_x × PULSE_COUNT_x. Note that LED_OFFSET_x is the pulse start time offset expressed, LED_PERIOD_x is the pulse period expressed in seconds, PULSE_COUNT_x is the number of pulses, and x is either PROX or GEST depending on the mode of operation. IPROC is an average current associated with the processing time. For sample/gesture mode, IPROC = 0.64 × 10−3, and for proximity mode, IPROC = 0.51 × 10−3. IVDD_STANDBY = 3.5 × 10−3 mA. Enable the sample interrupt by writing a 0 to the appropriate bit in Register 0x48. Configure the interrupt pin by writing the appropriate value to the bits in Register 0x1C. An interrupt generates when the data registers are updated. Rev. A | Page 17 of 31 ADUX1020 Data Sheet Average VLEDA Supply Current To calculate the average VLED supply current, use Equation 9. ILED_AVG = (LED_WIDTH/1 × 106) × LEDPEAK × DR × PULSE_COUNT (9) where: LED_WIDTH is the on time for the LED pulse, in µs. PULSE_COUNT is the number of LED pulses per sample. Tuning the Pulse Count After the LED peak current and TIA gain are optimized, increasing the number of pulses per sample increases the SNR by the square root of the number of pulses. There are two ways to increase the pulse count. The pulse count registers (Register 0x21, Bits[13:8] for sample/gesture mode, and Register 0x23, Bits[13:8] for proximity mode) change the number of pulses per internal sample. Register 0x46, Bits[6:4] for sample/gesture mode and Bits[2:0] for proximity mode controls the number of internal samples that are averaged together before the data is sent to the output. Therefore, the number of pulses per sample is the pulse count register multiplied by the number of subsequent samples being averaged. In general, the internal sampling rate increases as the number of internal sample averages increase to maintain the desired output data rate. The SNR/Watt is most optimal with pulse count values of 16 or less. Above pulse count values of 16, the square root relationship does not hold in the pulse count register. However, this relationship continues to hold when averaged between samples using Register 0x46. Note that increasing LED peak current increases SNR almost directly proportional to LED power, whereas increasing the number of pulses by a factor of n results in only a nominal√(n) increase in SNR. When using the sample sum/average function (Register 0x46), the output data rate decreases by the number of summed samples. To maintain a static output data rate, increase the sample frequency (Register 0x40, Bits[3:0] for sample/gesture mode, Bits[7:4] for proximity mode) by the same factor as that selected in Register 0x46. For example, for a 100 Hz output data rate and a sample sum/average of four samples, set the sample frequency to 400 Hz. Rev. A | Page 18 of 31 Data Sheet ADUX1020 RECOMMENDED SOLDERING PROFILE Figure 12 and Table 12 provide details about the recommended soldering profile. CRITICAL ZONE TL TO TP P P L TSMAX L SMIN 11429-012 S Figure 12. Recommended Soldering Profile Table 12. Recommended Soldering Profile Profile Feature Average Ramp Rate (TL to TP) Preheat Minimum Temperature (TSMIN) Maximum Temperature (TSMAX) Time (TSMIN to TSMAX) (tS) TSMAX to TL Ramp-Up Rate Time Maintained Above Liquidous Temperature Liquidous Temperature (TL) Time (tL) Peak Temperature (TP) Time Within 5°C of Actual Peak Temperature (tP) Ramp-Down Rate Time from 25°C to Peak Temperature (t25°C TO PEAK) Condition (Pb-Free) 3°C/sec maximum 150°C 200°C 60 sec to 180 sec 3°C/sec maximum 217°C 60 sec to 150 sec +260 (+0/−5)°C <30 sec 6°C/sec maximum 8 minutes maximum Rev. A | Page 19 of 31 ADUX1020 Data Sheet COMPLETE REGISTER LISTING Table 13. Data Registers Address 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 Data Bits [15:0] [15:0] [15:0] [15:0] [15:0] [15:0] [15:0] [15:0] Default Value 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x20 Update Type SCK SCK SCK SCK SCK SCK SCK SCK Access Type Read only Read only Read only Read only Read only Read only Read only Read only Name READX1 READX2 READY1 READY2 SAMPLEI SAMPLEX SAMPLEY Reserved Description X1 value X2 value Y1 value Y2 value I value X value Y value Write 0x20 Table 14. System Registers Address 0x08 0x09 Data Bits [11:0] [15:12] [6:0] [15:7] Default Value 0x3FC 0x0 0xC8 0x0 Update Type SCK SCK SCK SCK Access Type Read only Read only Read only Read only Name CHIP_ID Version SLAVE_ADDRESS Reserved Description Reset by none Reset by none I2C slave address; reset by none Write 0x0 Table 15. Timer Test Registers Address 0x0A Data Bits [11:0] Default Value 0x0 Update Type SCK Access Type Read only Name OSC_CAL_OUT 0x0C [15:12] [4:0] [15:5] 0x0 0xF 0x0 SCK SCK SCK Read only Read/write Read/write Reserved Reserved Reserved Description Counter value of 2 cycle, 32 kHz pulses with 32 MHz clock Write 0x0 Write 0xF Write 0x0 Table 16. Reset Registers Address 0x0F Data Bits 0 [15:1] Default Value 0x0 0x0 Update Type SCK SCK Access Type Read/write Read/write Name SW_RESET Reserved Description Software reset Write 0x0 Table 17. ADC Control Registers Address 0x10 0x11 Data Bits [15:0] [15:0] Default Value 0x1010 0x004c Update Type SCK SCK Rev. A | Page 20 of 31 Access Type Read/write Read/write Name Reserved Reserved Description Write 0x1010 Write 0x004C Data Sheet ADUX1020 Table 18. AFE Registers Address 0x12 0x13 Data Bits [1:0] Default Value 0x0 Update Type SCK Access Type Read/write Name AFE_TRIM_TIA [3:2] 0x2 SCK Read/write AFE_TRIM_BPF [5:4] 0x0 SCK Read/write AFE_TRIM_VREF [6:7] [12:8] 0x0 0x1C SCK SCK Read/write Read/write Not applicable AFE_TRIM_INT [14:13] 15 [15:0] 0x0 0x0 0xADA5 SCK SCK SCK Read/write Read/write Read/write Reserved Not applicable AFE_MUX_TEST Description Transimpedance amplifier gain (feedback resistor) select. 0: 200 kΩ. 1: 100 kΩ. 2: 50 kΩ. Sets the pole locations of the band-pass filter. 0: 50 kHz and 100 kHz. 1: 50 kHz and 300 kHz. 2: 100 kHz and 100 kHz. 3: 100 kHz and 300 kHz. Sets the reference voltage (VREF) for the TIA. 0: (13/16) × VDD. 1: (12/16) × VDD. 2: (15/16) × VDD. 3: (14/16) × VDD. Reserved. Integrator register and capacitor select bits. The upper three bits select the integrator capacitor, CFB. CFB = 3.62 pF × Bit 12 + 1.81 pF × Bit 11 + 0.9 pF × Bit 10. The lower two bits select the integrator resistor, RIN. RIN = 200 kΩ (Bits[9:8] = 0x00),100 kΩ (Bits[9:8] = 0x01), and 50 kΩ (Bits[9:8] = 0x10 or 0x11). Write 0x0. Reserved. AFE internal connection bypass selection. 0xADA5: analog full path mode (TIA → BPF → INT → ADC). 0xB065: TIA ADC mode (TIA → ADC). Table 19. Reference/Bias Registers Address 0x14 0x16 Data Bits [15:0] [6:0] [11:7] Default Value 0x80 0x0 0xC Update Type SCK SCK SCK Access Type Read/write Read/write Read/write Name Reserved Reserved LED_TRIM [15:12] 0x0 SCK Read/write Reserved Rev. A | Page 21 of 31 Description Write 0x80 Write 0x0 Used to trim the amount of current being multiplied by the LED driver: ILED = (21.25 + 0.3125 × (Register Value))/25 Write 0x0 ADUX1020 Data Sheet Table 20. Oscillator Registers Data Bits [5:0] Default Value 0x20 Update Type SCK Access Type Read/write Name OS32K_TRIM 6 7 0x0 0x0 SCK SCK Read/write Read/write Reserved OS32K_PDB 8 0x0 SCK Read/write OS32K_BYPASS [13:9] 14 0x1B 0x0 SCK SCK Read/write Read/write Reserved OS32K_TEST4 0x19 15 [1:0] 0x0 0x0 SCK SCK Read/write Read/write Reserved OS32M_BYPASS 0x1A [4:2] [15:5] [7:0] 0x1 0x0 0x5E SCK SCK SCK Read/write Read/write Read/write Reserved Reserved OS32M_VTRIM [14:8] 0x42 SCK Read/write OS32M_RTRIM 15 0x0 SCK Read/write Reserved Address 0x18 Description 32 kHz oscillator trim. 0x00: maximum frequency. 0x20: default frequency. 0x3F: minimum frequency. Write 0x0. 32 kHz oscillator power down (low active). 0: power down. 1: normal operation. Bypass 32 kHz oscillator. 0: normal operation. 1: external clock (TCLI). Write 0x1B. 32 kHz oscillator frequency range. 0: normal. 1: increased frequency range. Write 0x0. Bypass 32 MHz oscillator. 0: normal operation. 1: external clock (TCLI). Write 0x1. Write 0x0. VCO trim. 0000 0000: minimum frequency. 0101 1110: default frequency (32 MHz). 1111 1111: maximum frequency. VREF resistor temperature compensation proportional to absolute temperature (PTAT). 000 0000: minimum PTAT current. 100 0010: default PTAT current. 111 1111: maximum PTAT current. Write 0x0. Table 21. ADC Post Processing Registers Address 0x1B Data Bits [4:0] 5 [11:6] [15:12] Default Value 0x0 0x0 0x0 0x0 Update Type SCK SCK SCK SCK Access Type Read/write Read/write Read/write Read/write Name Reserved ADC_SPACING Reserved Reserved Rev. A | Page 22 of 31 Description Write 0x0 Insert 1 cycle spacing between ADC samples Write 0x0 Write 0x0 Data Sheet ADUX1020 Table 22. Miscellaneous Registers Address 0x1C 0x1D Data Bits 0 1 2 Default Value 0x0 0x0 0x0 Update Type SCK SCK SCK Access Type Read/write Read/write Read/write Name Reserved INT_IE INT_OE 4 0x1 SCK Read/write SDA_SLOPE_EN 5 6 [14:7] 15 0x0 0x0 0x41 0x0 SCK SCK SCK SCK Read/write Read/write Read/write Read/write TCLI_IE TCLI_OE Reserved INT_PMOS_OEN [4:0] 5 0x0 0x0 SCK SCK Read/write Read/write Reserved INT_POL [15:6] 0x0 SCK Read/write Reserved Description Write 0x0. Interrupt (INT) pin input enable. Interrupt (INT) pin output enable. 0: disable INT pin drive. 1: enable drive according to INT_POL polarity and opendrain (OD) value. SDA pad slope control. 0: SDA/SCL pad slew rate limiter disabled. 1: SDA/SCL pad slew rate limiter enabled (default). Test mode only, reserved. Test mode only, reserved. Write 0x41. Interrupt (INT) pin PMOS output enable. 0: output driver enable controlled by INT_OE (default). 1: output driver disabled regardless of INT_OE. Write 0x0. Interrupt (INT) pin polarity. 0: active high. 1: active low. Write 0x0. Table 23. I2C Registers Address 0x1E 0x1F Data Bits [11:0] Default Value 0x1 Update Type SCK Access Type Read/write Name I2C_CTL 12 0x0 SCK Read/write SPEED_MODE [15:13] [7:0] [11:8] 0x0 0x0 0x0 SCK SCK SCK Read/write Read/write Read/write Reserved Reserved FIFO_TH Description Configure I2C to proper operation mode. 0: reserved. 1: start condition followed by a matching address, an interrupt generates if this is asserted. 2: start condition followed by a matching address followed by a repeated start, an interrupt generates if this is asserted. 3: NACK. If set, the next communication is a NACK. 4: stop condition detected interrupt enable. 5: reserved. 6: transmit request interrupt enable. (If asserted and an I2C read transaction is in progress, and the transmit FIFO is not full, an interrupt generates.) 7: When set to 1, FIFO stores the higher byte first, and when set to 0, FIFO stores lower byte first. 8: set 0. 9: set 0. 10: when set to 1, I2C writes to the lower byte first, and when set to 0, I2C writes to higher byte first. 11: set 0. I2C speed mode. 0 = 400 kHz fast mode. 1 = 3.4 MHz high speed. Write 0x0. Write 0x0. Minimum FIFO words to trigger interrupt. Rev. A | Page 23 of 31 ADUX1020 Data Sheet Table 24. LED Control Registers Address 0x20 0x21 0x22 0x23 0x24 Data Bits [5:0] Default Value 0x0 Update Type SCK Access Type Read/write Name LED_OFFSET_GEST [7:6] [12:8] 0x0 0x1 SCK SCK Read/write Read/write Reserved LED_WIDTH_GEST [15:9] [7:0] 0x0 0x8 SCK SCK Read/write Read/write Reserved LED_PERIOD_GEST [13:8] [15:9] [5:0] [15:9] [12:8] [15:9] [7:0] [13:8] [15:9] [7:0] 8 0x1 0x0 0x0 0x0 0x1 0x0 0x8 0x1 0x0 0x0 0x0 SCK SCK SCK SCK SCK SCK SCK SCK SCK SCK SCK Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write LED_PULSES_GEST Reserved LED_OFFSET_PROX Reserved LED_WIDTH_PROX Reserved LED_PERIOD_PROX LED_PULSES_PROX Reserved Reserved LED_MASK 9 [15:10] 0x0 0x0 SCK SCK Read/write Read/write Reserved Reserved Description LED pulse offset (in 1 μs step) for sample/gesture mode. Write 0x0. LED pulse width (in 1 μs step) for sample/gesture mode. Write 0x0. LED pulse period (in 1 μs step) for sample/gesture mode. LED pulse count for sample/gesture mode. Write 0x0. LED pulse offset (in 1 μs step) for proximity mode. Write 0x0. LED pulse width (in 1 μs step) for proximity mode. Write 0x0. LED pulse period (in 1 μs step) for proximity mode. LED pulse count for proximity mode. Write 0x0. Write 0x0. LED masking signal. 0: disable. 1: enable. Write 0x0. Write 0x0. Table 25. AFE Control Registers Address 0x25 0x26 0x27 Data Bits [4:0] Default Value 0x0 Update Type SCK Access Type Read/write Name AFE_FINE_OFFSET_GEST [10:5] 0x0 SCK Read/write AFE_OFFSET_GEST [15:11] 0x1 SCK Read/write AFE_WIDTH_GEST [4:0] 0x0 SCK Read/write AFE_FINE_OFFSET_PROX [10:5] 0x0 SCK Read/write AFE_OFFSET_PROX [15:11] 0x1 SCK Read/write AFE_WIDTH_PROX 0 0x0 SCK Read/write AFE_MASK 1 0x0 SCK Read/write AFE_MULTI_SAMPLE [6:2] [15:7] 0x0 0x0 SCK SCK Read/write Read/write Reserved Reserved Rev. A | Page 24 of 31 Description AFE integration window, fine offset (in 31.25 ns step) for sample/gesture mode. AFE integration window, coarse offset (in 1 μs step) for sample/gesture mode. AFE integration window width (in 1 μs step) for sample/gesture mode. AFE integration window, fine offset (in 31.25 ns step) for proximity mode. AFE integration window, coarse offset (in 1 μs step) for proximity mode. AFE integration window width (in 1 μs step) for proximity mode. Mask bit for AFE clock. 0: disable masking. 1: enable masking. Multisample mode enable bit. 0: single sample mode. 1: multiple sample mode. Write 0x0. Write 0x0. Data Sheet ADUX1020 Table 26. Sample/Gesture and Proximity Registers Address 0x28 0x29 0x2A 0x2B 0x2C 0x2D 0x2E 0x2F Data Bits [15:0] [2:0] Default Value 0x0 0x0 Update Type SCK SCK Access Type Read/write Read/write Name GEST_DI_TH ORIENTATION [7:3] [15:8] [15:0] [15:0] [15:0] [15:0] [5:0] [12:6] [13:8] [15:14] [5:0] [12:6] [13:8] 14 15 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 SCK SCK SCK SCK SCK SCK SCK SCK SCK SCK SCK SCK SCK SCK SCK Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write Reserved GEST_N_PTS PROX_TH_ON1 PROX_TH_OFF1 PROX_TH_ON2 PROX_TH_OFF2 PROX_TH_ON1_HIGH Reserved PROX_TH_OFF1_HIGH Reserved PROX_TH_ON2_HIGH Reserved PROX_TH_OFF2_HIGH Reserved PROX_TYPE Description di/dt threshold. Orientation control. 0: when set to 1, flip sign of x direction. 1: when set to 1, flip sign of y direction. 2: when set to 1, swap X0 and Y0, and X1 and Y1. Write 0x0. Minimum length of valid gesture. Bits[15:0] of proximity ON1 threshold. Bits[15:0] of proximity OFF1 threshold. Bits[15:0] of proximity ON2 threshold. Bits[15:0] of proximity OFF2 threshold. Bits[21:16] of proximity ON1 threshold. Write 0x0. Bits[21:16] of proximity OFF1 threshold. Write 0x0. Bits[21:16] of proximity ON2 threshold. Write 0x0. Bits[21:16] of proximity OFF2 threshold. Write 0x0. Proximity trigger type. 0: trigger when i crosses the threshold. 1: trigger when i is above or below the threshold. Table 27. Test Modes Registers Address 0x30 Data Bits [3:0] Default Value 0x0 Update Type SCK Access Type Read/write Name TEST_MODE 0x32 4 5 [14:6] 15 [6:0] 0x0 0x0 0x0 0x0 0x40 SCK SCK SCK SCK SCK Read/write Read/write Read/write Read/write Read/write Reserved OSC32M_CAL_EN Reserved Reserved R_PD_FORCE Rev. A | Page 25 of 31 Description Test mode setting. 0: normal INT pin function 1: observe 32 kHz oscillator (OS32K) on INT pin. 2: observe 32 MHz oscillator (OS32M) on INT pin. 3: observe OS32M/(216) on INT pin. 4: observe OS32K/(211) on INT pin. Others: normal function. Write 0x0. OS32M calibration enable. Write 0x0. Write 0x0. Power down control force mode. Each bit controls a component. 0: bias. 1: band gap (BG). 2: reference (REF). 3: OS32M oscillator. 4: LED. 5: ADC. 6: AFE. If set to 0, the power control comes from the state machine, and if set to 1, the power control comes from Register 0x32 (except for Bit 6, AFE). When Bit 6 (AFE) is set to 1, the power down control signals come from the internal AFE control logic. ADUX1020 Address Data Sheet Data Bits 7 Default Value 0x0 Update Type SCK Access Type Read only Name R_DEV_CONFIG_ENABLE 8 9 10 11 12 13 [15:14] 0x0 0x0 0x0 0x0 0x0 0x0 0x0 SCK SCK SCK SCK SCK SCK SCK Read/write Read/write Read/write Read/write Read/write Read/write Read/write R_BIAS_PDB R_BG_PDB R_REF_PDB R_OS32M_PDB R_LED_PDB R_ADC_PDB Reserved Description Device slave address configure enable. 0: slave address (I2C) = 0x64, fixed. 1: not available. Power down of bias distribution (0 is power on). Power down of band gap (0 is power on). Power down of REF (0 is power on). Power down of OS32M (0 is power on). Power down of LED driver (0 is power on). Power down of ADC (0 is power on). Write 0x0. Table 28. AFE Channel Compensation Registers Address 0x38 0x39 0x3A 0x3B 0x3C 0x3D Data Bits [7:0] Default Value 0x80 Update Type SCK Access Type Read/write Name GAIN1 [15:8] 0x80 SCK Read/write GAIN2 [7:0] 0x80 SCK Read/write GAIN3 [15:8] 0x80 SCK Read/write GAIN4 [13:0] [15:14] [13:0] [15:14] [13:0] [15:14] [13:0] [15:14] 0x2000 0x0 0x2000 0x0 0x2000 0x0 0x2000 0x0 SCK SCK SCK SCK SCK SCK SCK SCK Read/write Read/write Read/write Read/write Read/write Read/write Read/write Read/write CH1_OFFSET Reserved CH2_OFFSET Reserved CH3_OFFSET Reserved CH4_OFFSET Reserved Description AFE Channel 1 gain. Unsigned gain code x.xxx_xxxx, supports gain from 0/128 to 255/128. AFE Channel 2 gain. Unsigned gain code x.xxx_xxxx, support gain from 0/128 to 255/128. AFE Channel 3 gain. Unsigned gain code x.xxx_xxxx, support gain from 0/128 to 255/128. AFE Channel 4 gain. Unsigned gain code x.xxx_xxxx, support gain from 0/128 to 255/128. Default: 0x2000, which is the offset of ADC output. Write 0x0. Default: 0x2000, which is the offset of ADC output. Write 0x0. Default: 0x2000, which is the offset of ADC output. Write 0x0. Default: 0x2000, which is the offset of ADC output. Write 0x0. Table 29. Sample Rate Registers Address 0x3E Data Bits [15:0] Default Value 0x0 Update Type SCK Access Type Read/write Name SLOPE_TH 0x40 [3:0] 0xA SCK Read/write GEST_FREQ Description Slope threshold used in x/y direction detection. If absolute value (dx) + absolute value (dy) < SLOPE_TH, gesture is z direction movement. Sample rate in sample/gesture mode. 0: 0.1 Hz. 1: 0.2 Hz. 2: 0.5 Hz. 3: 1 Hz. 4: 2 Hz. 5: 5 Hz. 6:10 Hz. 7: 20 Hz. 8: 50 Hz. 9: 100 Hz. 10: 190 Hz. 11: 450 Hz. 12: 820 Hz. 13: 1400 Hz. Rev. A | Page 26 of 31 Data Sheet Address ADUX1020 Data Bits [7:4] Default Value 0x6 Update Type SCK Access Type Read/write Name PROX_FREQ 11 0x0 SCK Read/write IOUT_MODE [15:12] 0x0 SCK Read/write GEST_DIDT_M Description Sample rate in proximity mode. 0: 0.1 Hz. 1: 0.2 Hz. 2: 0.5 Hz. 3: 1 Hz. 4: 2 Hz. 5: 5 Hz. 6: 10 Hz. 7: 20 Hz. 8: 50 Hz. 9: 100 Hz. 10: 190 Hz. 11: 450 Hz. 12: 820 Hz. 13: 1400 Hz. I output mode. 0: output lower 16 bits of internal i. 1: output higher 16 bits of internal i. M used for I(n) − I(n − m). Table 30. LED Driver Registers Address 0x41 Data Bits [3:0] Default Value 0x0 Update Type SCK Access Type Read/write Name LED_IREF [6:4] [7:5] [11:8] 12 0x0 0x0 0x0 0x1 SCK SCK SCK SCK Read/write Read/write Read/write Read/write LED_ITAIL Reserved LED_PIREF LED_PIREF_EN [15:13] 0x0 SCK Read/write Reserved Description LED driver current. 0: 25 mA. 1: 40 mA. 2: 55 mA. 3: 70 mA. 4: 85 mA. 5: 100 mA. 6: 115 mA. 7: 130 mA. 8: 145 mA. 9: 160 mA. 10: 175 mA. 11: 190 mA. 12: 205 mA. 13: 220 mA. 14: 235 mA. 15: 250 mA. Slew rate control. Write 0x0. LED driver current for proximity mode. LED driver current for proximity enable. 0: use LED_IREF, Bits[3:0] for proximity mode. 1: use LED_PIREF, Bits[11:8] for proximity mode (default). Write 0x0. Rev. A | Page 27 of 31 ADUX1020 Data Sheet Table 31. Operation Control Registers 0x44 Data Bits [7:0] [11:8] [15:12] [3:0] [15:4] [15:0] Default Value 0x0 0x0 0x4 0x0 0x0 0x0 Update Type SCK SCK SCK SCK SCK SCK Access Type Read/write Read/write Read/write Read/write Read/write Read/write Name REF_TIME OS32M_TIME DIGITAL_TIME AFE_TIME Reserved DSAMPLE_TIME 0x45 [3:0] 0x0 SCK Read/write OP_MODE [7:4] 0x0 SCK Read/write DATA_OUT_MODE 8 0x0 SCK Read/write FIFO_PREVENT_EN 9 0x0 SCK Read/write PACK_START_EN 10 0x0 SCK Read/write PROX_AUTO_GESTURE 11 12 0x0 0x0 SCK SCK Read/write Read/write Reserved SAMP_OUT_MODE 13 0x0 SCK Read/write RDOUT_MODE [15:14] [2:0] 0x0 0x0 SCK SCK Read/write Read/write Reserved PROX_DEC_MODE Address 0x42 0x43 0x46 Rev. A | Page 28 of 31 Description REF start-up time. Fast oscillator start-up time. Digital operation time. AFE operation time in 32 kHz period. Write 0x0. System data sampling time ((100 + LED_PULSES_GEST × LED_PERIOD_GEST)/31.3 + 1). Operation mode. 0: standby mode (every block is in power saving mode). 1: proximity mode. 2: gesture mode (unused). 3: sample mode. Set to 0xF, which is idle mode (BG/REF/bias are on, see Register 0x32, and other blocks are in power saving mode). FIFO format in proximity mode (OP_MODE = 1). 1: store i in the FIFO, which takes 2 bytes. 3: store x, y, and i in the FIFO, which takes 6 bytes. Others: store none in the FIFO. However, in sample/ gesture mode (OP_MODE = 2), store 4 bytes in the FIFO. Prevent FIFO overrun enable. 0: write data into the FIFO. 1: write data into the FIFO when the FIFO has enough space, and drop the whole package if the FIFO does not have enough space for the whole package. Indicate package start in FIFO data. 0: normal operation. 1: replace the LSB of the first data of the package into the FIFO to 1, and replace the other data of the package into the FIFO with 0. Control of automatic switching from proximity mode to sample/gesture mode. 0: normal operation (no mode switching). 1: when OP_MODE = 1 (proximity mode), the ON2 interrupt triggers an OP_MODE switch from proximity mode to sample/gesture mode after the interrupt is asserted and FIFO storing is done. Write 0x0. Output mode for sample mode. 0: output every sample. 1: output sample between gesture start and gesture end. Readback data mode. 0: with decimation. 1: no decimation. Write 0x0. Decimation rate for proximity mode. 0: 1. 1: 2. 2: 4. 3: 8. 4: 16. 5: 32. Others: 32. Data Sheet ADUX1020 Data Bits [5:3] [6:4] Default Value 0x0 0x0 Update Type SCK SCK Access Type Read/write Read/write Name Reserved GEST_DEC_MODE 0x48 [15:7] [7:0] 0x0 0xFF SCK SCK Read/write Read/write Reserved INT_MASK 0x49 [15:8] [7:0] 0x0 0x0 SCK SCK Read/write RW1C1 Reserved INT_STATUS [15:8] 0x0 SCK RW1C1 FIFO_STATUS [15:0] 0x0 SCK Read only I2C_STATUS Address 0x4A 1 RW1C is a read/write, cleared by writing a 1 to the register. Rev. A | Page 29 of 31 Description Write 0x0. Decimation rate for sample/gesture mode. 0: 1. 1: 2. 2: 4. 3: 8. 4: 16. 5: 32. Others: 32. Write 0x0. Interrupt mask (active high) for the following: 0: proximity ON1 interrupt. 1: proximity OFF1 interrupt. 2: proximity ON2 interrupt. 3: proximity OFF2 interrupt. 4: gesture interrupt. 5: sample interrupt. 6: watchdog interrupt. 7: FIFO valid data more than threshold (FIFO_TH, Register 0x1F, Bits[11:8]). Write 0x0. Status of interrupt. Each bit is cleared when 1 is written to that bit. 0: proximity ON1 interrupt. 1: proximity OFF1 interrupt. 2: proximity ON2 interrupt. 3: proximity OFF2 interrupt. 4: gesture interrupt. 5: sample interrupt. 6: watchdog interrupt. 7: FIFO valid data more than threshold (FIFO_TH, Register 0x1F, Bits[11:8]). This register self resets upon a read. FIFO status. Number of available data (in byte) to be read out. Note that Bits[6:0] are cleared when a write of 1 goes to Bit 15. This register self resets upon a read. 0: slave address match detection (can drive an interrupt). 1: repeated start (can drive an interrupt). 2: transmit request (can drive an interrupt). 3: return 0 when read. 4: transmit FIFO underflow. 5: transmit FIFO overflow. 6: slave responded with a no acknowledge (NACK). 7: slave busy. 8: general call reset interrupt (always drives an interrupt). 9: stop condition detected (can drive an interrupt). 10: high speed code detected. [15:11]: return 0s when read. ADUX1020 Data Sheet Table 32. Data Information Registers Address 0x60 Data Bits [15:0] Default Value 0x0 Update Type SCK Access Type Read only Name DATA_BUFFER_OUT Description Data of next available word (16 bit) in FIFO Table 33. Debug Registers Address 0x68 0x69 0x6A 0x6B 0x6C 0x6D 0x6E 0x6F Data Bits [15:0] [15:0] [15:0] [15:0] [15:0] [15:0] [15:0] [15:0] Default Value 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 Update Type SCK SCK SCK SCK SCK SCK SCK SCK Access Type Read only Read only Read only Read only Read only Read only Read only Read only Name READ_X1L READ_X2L READ_Y1L READ_Y2L READ_X1H READ_X2H READ_Y1H READ_Y2H Rev. A | Page 30 of 31 Description Debug data register Debug data register Debug data register Debug data register Debug data register Debug data register Debug data register Debug data register Data Sheet ADUX1020 OUTLINE DIMENSIONS 1.69 1.59 1.44 3.10 3.00 2.90 PIN 1 INDEX AREA 1.99 1.89 1.74 EXPOSED PAD 0.35 0.30 0.25 4 1 BOTTOM VIEW TOP VIEW 0.70 0.65 0.60 SEATING PLANE 0.45 BSC 8 5 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.15 REF 0.28 0.23 0.18 0.15 MIN PIN 1 INDICATOR (R 0.20) FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. 04-16-2013-B 2.10 2.00 1.90 Figure 13. 8-Lead Lead Frame Chip Scale Package [LFCSP] 2 mm × 3 mm Body and 0.65 mm Package Height (CP-8-17) Dimensions shown in millimeters ORDERING GUIDE Model1, 2 ADUX1020BCPZRL7 ADUX1020-EVAL-SDP ADUX1020-EVALZ-LED 1 2 Temperature Range −40°C to +85°C Package Description 8-Lead Lead Frame Chip Scale Package [LFCSP] ADUX1020 Evaluation Board High Power LED Daughterboard for ADUX1020 Evaluation Board Z = RoHS Compliant Part. The ADUX1020-EVAL-SDP is a kit that includes the ADUX1020-EVAL-SMALL and the ADUX1020-EVAL-MCM. I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D11429-0-6/16(A) Rev. A | Page 31 of 31 Package Option CP-8-17