AN10971 TL applications with NXP ballast controllers Rev. 1 — 15 September 2011 Application note Document information Info Content Keywords Half-bridge, electronic ballast, tube light Abstract This application note describes how to design an application to drive a fluorescent lamp with a half-bridge circuit combined with an NXP Semiconductors ballast controller. AN10971 NXP Semiconductors TL applications with NXP ballast controllers Revision history Rev Date Description v.1 20110915 first draft Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 2 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 1. Introduction This application note describes the use of an NXP Semiconductors half-bridge driver IC for High Frequency (HF) Tube Light (TL) single tube, fixed DC bus voltage applications. 2. Scope This application note is organized as follows: • • • • • • Section 3 describes the basic operation of a half-bridge ballast for fluorescent tubes. Section 4 describes how to select MOSFETs for the half-bridge. Section 5 describes how to select a resonant coil and capacitor. Section 6 describes how to design magnetic components. Section 7 describes the feedback control loop used in the dimmable controllers. Section 8 describes system performance. 3. Lamp characteristics and half-bridge principles 3.1 Introduction Electronic ballasts must preheat, ignite, control and monitor the condition of the TL according to the TL specification. In cases of no ignition or lamp end of life, the ballast must shut down to avoid damage to the following: • the ballast • or the overheating of the lamp electrodes Depending on the lamp type, tube ignition occurs at different voltage levels. For example, a Compact Fluorescent Lamp (CFL) ignition occurs at around 500 V and up to 1200 V for a TL. Following ignition a lamp is in its operating state. During operation lamp voltage is dependent on the shape and content of the tube. For TL lamps, voltages range from 80 V to 220 V (RMS). A fluorescent lamp has a so called "negative incremental impedance". The more current flowing through a fluorescent lamp the lower the voltage (unlike a resistor). Driving a fluorescent lamp with a Constant Voltage (CV) would result in an unstable system. In addition, a breakdown of the supply and/or tube within a few milliseconds also occurs. To stabilize the current through the lamp, a series impedance is needed typically a resistor. However, in practice a coil is used to reduce losses as shown in Figure 1. In magnetic 50 Hz to 60 Hz Low Frequency (LF) systems, see Figure 2 coils are large. However, in HF TL 40 kHz to 80 kHz systems coils are smaller as the impedance of a coil increases linearly with the frequency. In steady state, at frequencies higher than 10 kHz a fluorescent lamp can be considered to be a resistor. At high frequencies Ohms law V = I R is applicable to fluorescent tubes. The resistance (R) varies with the power supplied to the lamp. For example, a 36 W T8 lamp with an operating voltage of 100 V can be considered as a 277 resistor. This condition is true when operated at its nominal power. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 3 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers + lamp ILa + VLa Vm dne >0 dt 120 110 dne <0 dt 100 100 200 VLa 300 + VLa VAB Vi starting voltage Vi VR dne >0 dt dne <0 dt lamp potential (V) lamp potential (V) 200 lamp + VR - - - VAB ILa VLa 400 500 I (mA) iss I (A) (a) (b) a. Discharge potential drop versus current 019aaa652 b. Effect of series resistance in stabilizing lamp current (1) dne = delta in the number of free electrons in th plasma Fig 1. Lamp characteristics + Ib + B - + Vi - La Vm 0 Fig 2. S Il - 019aaa654 Magnetic 50/60 Hz TL ballast 3.2 Lamp filaments Each lamp has two filaments (or electrodes), each consisting of a coated tungsten wire as shown in Figure 3. The resistance of the tungsten wire is directly related to its temperature. Figure 4 identifies the relationship between electrode temperature and the ratio of Resistance hot (Rh) and Resistance cold (Rc) of a typical tungsten wire. filament length D 019aaa657 Fig 3. AN10971 Application note Lamp filament All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 4 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 019aaa658 12 ratio Rh/Rc 8 4 0 0 500 1000 1500 2000 T (°K) Fig 4. Rh/Rc ratio versus temperature for 100 % wolfram filaments Lamp electrodes are preheated before the lamp is ignited or lamp life time is considerably reduced. During preheat, electrode resistance increases typically by a factor of between four to six. To generate sufficient and an even spread of heat before ignition, preheat time must not be lower than 0.5 s. Preheat times longer than 1.5 s to 1.7 s are considered undesirable as heat is lost to the gasses in the lamp tube. Figure 5 identifies the operating area of fixed preheat current for a T8 36 W burner with two current levels. Figure 5 also shows that if the current is too high the optimal ignition temperature is reached before 0.5 s. As a result, either ignition takes place too early or the filament is overheated before ignition. 019aaa661 705.5 mA Rhc 6.25 operating area 4.25 467.0 mA 1.0 0 0 0.5 1.0 1.5 2.0 t (s) Fig 5. AN10971 Application note Fixed preheat current window All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 5 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 3.3 HF TL half-bridge principles High frequency TL applications typically run at 40 kHz to 60 kHz instead of 50 Hz to 60 Hz for magnetic ballast applications. In HF TL applications, the impedance of the coil is linear with its frequency. The size of a coil for an HF TL application is only a fraction of the coil required for 50 Hz to 60 Hz magnetic ballast applications. Figure 6 (left) shows a theoretical 50 kHz ballast circuit with a 50 kHz sine wave generator. Figure 6 (right) shows a real 50 kHz ballast circuit with a DC blocking capacitor and square wave generator. A 50 kHz sine wave is not easy to produce, therefore a 50 kHz square wave generator is used as shown in Figure 6 (right). The higher harmonics of the square wave hardly pass the coil whereas the lower harmonics, specifically the first harmonic does pass the coil. The square wave generator in combination with the coil in practice acts as a stable sine wave source. A square wave of 50 % duty factor and an amplitude between 0 V and Vbridge has a DC component of Vbridge / 2. This condition causes an unlimited DC current passing through the lamp. A DC blocking capacitor is used to filter out the DC voltage component to stop the DC current. The voltage on the DC blocking capacitor is Vbridge / 2. The resonance frequency of the LC combination is used to ignite the lamp. Following ignition, the amplitude and frequency of the square wave together with the L and C values determine the lamp power. The RMS value of the first harmonic of a square wave is: 2 V bridge ------- Therefore, a square wave of 400 V corresponds with a sine wave of approximately 180 V (RMS). The higher harmonics (3,5,7) only contribute < 5 % to lamp current and can be ignored. resonance L 2 mH resonance L 1 2 mH 2 A1 A2 + - 2 A1 A2 resonance capacitor 8.2 nF TL T8 36 W 1 resonance capacitor 8.2 nF TL T8 36 W + 50 kHz 180 V B1 B2 3 − 4 50 kHz 400 V B1 B2 3 4 DC blocking capacitor 68 nF 019aaa662 Fig 6. AN10971 Application note 019aaa663 Half-bridge circuit overview All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 6 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers Ilamp 50 kHz S1 Vi, II + CF = 1.6 II Cd Vi Lr CB lamp S2 - Ilamp 60 Hz PF = 0.4 to 0.6 Cr 10 ms 019aaa664 a. Typical HF TL half-bridge ballast using rectified mains S1 Vi, Il + Il Cd Vi - 60 Hz PF = 1 PFC Ilamp Lr CB S2 lamp Ilamp Cr CF = 1.4 019aaa665 b. Typical HF TL half-bridge ballast using a PFC Fig 7. Typical HF TL half-bridge ballast circuits Figure 7 represents a typical HF TL half-bridge ballast circuit, so called as only two switches (S1 and S2) are used. Full-bridge designs, use four switches. Coil impedance, Lr as shown in Figure 7 limits the current in the circuit and can be calculated using Equation 1: Z = 2 frequency L coil (1) As the impedance is linear to the frequency, a 1000 times higher frequency requires a 1000 times smaller coil value for the same impedance. As a result, a high frequency ballast is much smaller and lighter than a 50 Hz to 60 Hz magnetic ballast. Switches S1 and S2 generate a square wave in the 40 kHz to 100 kHz range. The average voltage of a square wave is equal to half its amplitude. Capacitor (Cd) is a DC blocking capacitor, without it a DC current would flow through the coil and lamp. Cr and Lr together have a resonant frequency where the voltage sweeps up to a point where the lamp can be ignited. Capacitor Cr is placed between the filaments to preheat the filaments before ignition. For more detailed information on how to select suitable resonant tank LC values see Section 5. The supply feeding the half-bridge can be either rectified mains or a DC voltage generated by a pre-conditioner circuit. This type of circuits pulls current from the mains resembling the resistive load (so called Power Factor) of an incandescent bulb. In most countries higher than 25 W, a mains voltage-current source relation is mandatory. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 7 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers Power Factor Correction (PFC) circuits are either active (controller) or passive. The main passive PFC topologies used include, valley fill and charge pump. This application note assumes either rectified mains as shown in Figure 7 [A] or an active PFC as shown in Figure 7 [B]. If the square wave is a fixed frequency, and the voltage on the electrolytic capacitor fluctuates as in Figure 7 [A] the lamp current also fluctuates. The so-called crest factor of the lamp current is the peak/RMS value. To maximize the lifetime of the lamp, the crest factor must remain lower than 1.7. 3.4 Start-up, ignition and operation sequence V fstart (1) (2) fB preheat state ignition state burn state time (s) 019aaa666 (1) Frequency versus time (2) Lamp voltage versus time Fig 8. Start-up sequence Figure 8 shows an example of the start-up sequence for the UBA2021 controller which is similar to the start-up sequence of other NXP Semiconductors controllers. At the start of the sequence, the controller starts at its maximum frequency (fstart) typically 100 kHz. The frequency then drops quickly to the preheat frequency of around 70 kHz to 80 kHz. The controller then waits for the preheat time to pass (typically 0.8 s to 1.5 s) then drops to a frequency of around 40 kHz (fmin). The ignition (LC tank resonance) frequency of between 45 kHz to 55 kHz must occur between the end of preheat period and the minimum frequency of fmin. See Figure 8. Following ignition, that is, during the burn state the frequency of the half-bridge determines the power of the lamp. Figure 8 line (2) shows the voltage over the lamp. 3.5 Zero voltage switching of a half-bridge (capacitive mode) MOSFET switches S1 and S2 need a precisely timed control voltage. The NXP Semiconductors controller generates this control voltage as shown in Figure 9. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 8 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers Vi L1 RRHV 490 kΩ DS1 DS2 G1 S1 C3 lamp RHV CI 13 14 2 CCI 100 nF S1 R1 8 3 CCP CP 100 nF 100 nF L2 mains supply FS CS7 C2 Cboot C5 UBA2021 12 CCF CF 100 pF G2 S2 1 6 10 RREF RRREF 30 kΩ DS7 DS3 DS4 VS C4 CS4 DS6 CS9 5 9 11 7 PGND SGND RS Rshunt mgs994 Fig 9. S1 and S2 driven by UBA2021 When the lamp is ignited, the phase shift of the Inductor Resistor Capacitor (LRC) L2, C5 and lamp combination above its resonance frequency is such that the current lags behind. The voltage current phase shift of an inductor is similar. Figure 10 shows the coil current amplitude of LRC resonant tank versus frequency while Figure 11 shows the phase relationship. Amplitude A 40 kHz 100 kHz 019aaa667 Fig 10. Current amplitude of LRC resonant tank versus frequency Phase +90 −90 40 kHz 100 kHz 019aaa668 Fig 11. Current phase of LRC resonant tank versus frequency AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 9 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers The behavior of the load is called inductive mode when the current lags behind on the voltage. For capacitive mode, the voltage lags behind on the current. These conditions are similar to the behavior of a capacitor and inductor. Figure 12 and Figure 13 show the phase relationship of voltage and current flowing through an inductor and a capacitor. amplitude V I t (s) 019aaa669 +90 ° Fig 12. Current voltage relation of inductor amplitude V I t (s) -90 ° 019aaa670 Fig 13. Current voltage relation of capacitor If the current lags behind the voltage (inductive mode), the current charges and discharges the parasitic capacitance of the half-bridge when both MOSFETs are off. This state is known as the non-overlap time. The inductor current charges the parasitic capacitance for the low to high transition. The current flows through the bulk diodes of the high-side MOSFET until the MOSFET is switched on. For high to low transitions the opposite is true. The result is that there are no switching losses in the MOSFETs since the MOSFETs are opened/closed when there is no voltage over them. This state is known as Zero Voltage Switching (ZVS), it is the way a half-bridge resonant tank normally operate. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 10 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers HS gate LS gate HS/LS fet LS diode Iind inductive HS/LS fet HS diode half bridge voltage normal inductive mode 019aaa671 Fig 14. Switch timing sequence (inductive mode) If the resonant tank is run lower than its resonant frequency, then it is in capacitive mode. In capacitive mode, the MOSFETs remain closed while large voltages exist across them. This results in large current spikes in the order of 10 A to 15 A. These spikes cause lower efficiency and can damage the MOSFETs. This condition is commonly known as "hard switching". If the bulk diode in one MOSFET is conducting, current while the other MOSFET is opened the MOSFETs can be damaged within a single stroke. In capacitive mode, there is always full bus voltage hard switching. However, there can also be an in-between state with limited hard switching (of a voltage less than the bus voltage). All NXP Semiconductors controllers react to capacitive mode, albeit in a different way. HS gate LS gate HS/LS fet LS diode Iind capacitive HS/LS fet HS diode half bridge voltage capacitive mode hard switching 019aaa672 Fig 15. Switch timing sequence (capacitive mode) The UBA2014 reacts to capacitive mode by jumping to its maximum frequency. The UBA2021 reacts by quickly increasing the frequency until there is no more hard switching. The UBA2015(A) and UBA2016A react by shutting down as capacitive mode is detected. 3.5.1 None overlap time, fixed versus adaptive The time period when both MOSFETs are open (conducting) is called the non-overlap time. The non-overlap time is much larger than necessary to avoid cross conduction, when for example both MOSFETs are switched on. The time is set such that the resonant tank coil current has charged/discharged the capacitance on the half-bridge during the none overlap time. All extra current after this none overlap time, flow through the bulk diode of the MOSFET that is switched on after the none overlap time ends. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 11 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers The UBA2014 has an input that senses when the slope of the half-bridge square wave voltage has ended. The UBA2014 is able to adapt its timing such that it switches on the MOSFETs after the slope has ended. This condition minimizes the current through the bulk diodes of the MOSFETs and reduces losses. This principle is called "adaptive none overlap". The UBA2015(A), UBA2016A and UBA2021 all have a fixed none overlap time. For a fixed non-overlap, the charge pump supply capacitor (CS7 in Figure 9) must be fine-tuned to eliminate any hard switching. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 12 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 4. Half-bridge MOSFET selection 4.1 Introduction The half-bridge MOSFETs are both N type switched on/off at precisely the correct time. The current with which the gates are charged and discharged is also important for ElectroMagnetic Compatibility (EMC). The main parameters effecting MOSFET selection for use with half-bridge applications include: • Breakdown voltage • Ron resistance - On Resistance • Low gate charge The breakdown voltage of a MOSFET is a critical parameter, therefore selection must be within precise design limits. The Ron resistance value can be selected within limits depending on the target efficiency of the ballast. The low gate charge keeps the capacitor on the dV/dt supply small. 4.1.1 MOSFET voltage rating Voltage overshoots in a half-bridge resonant tank always exist due to parasitics. Therefore, select a voltage rating of the MOSFETs that is 50 V higher than the bus voltage of the half-bridge. 4.1.2 MOSFET RON The RMS current through the MOSFETs and the desired efficiency of the ballast determines the Ron of the MOSFET. Ron resistance depends on its operating temperature, for TL a typical value is 90 C and 105 C for CFL. The RMS current through the MOSFETs is the vector sum of the burner and resonant capacitor current. As the lamp current is known that is, controlled or determined by a fixed frequency the resonant capacitor current is equal to Equation 2. 2 f run V lamp (2) As the lamp and capacitor current have a 90 phase shift, the coil current is equal to Equation 3. I coil = I lamp 2 + I capacitor 2 (3) Losses in each of the MOSFETs do occur, the losses can be determined using Equation 4. Typical temperature values inside a TL ballast ranges from 80 C to 100 C (100C to 120 C for CFL). Therefore, select the Ron of the MOSFETs so that no overheating occurs. In addition, always consider the MOSFETs packaging during selection. Generally, lower Ron values improve ballast performance at increased cost of the ballast. Always maintain losses in the MOSFETs to less than 1.5 % of the lamp power. ½I 2 coil R on (4) Example: AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 13 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers Ballast for a TLD 36 W lamp running at 40 kHz, where: • • • • LC = 1.9 mH, 8.2 nF Ilamp = 0.32 A (RMS) Icapacitor = 0.20 A (RMS) Icoil = 0.38 A (RMS) A pair of MOSFETs each with a Ron of 3 when at operating temperature have a power loss of approximately 0.5 W (0.25 W per MOSFET). 4.2 Boot strap diode and capacitor As both MOSFETs are N type, a voltage of approximately 12 V higher than bridge voltage (Vbridge) is required to drive the upper MOSFET. In addition, an external bootstrap capacitor is required to store the 12 V buffer charge. Figure 16 shows an example of an NXP Semiconductors half-bridge ballast controller IC with integrated bootstrap diodes that provide such a voltage. External capacitor C5 is used to store the buffer charge. Typically, a 100 nF, 50 V capacitor is sufficient for all similar applications. F1 1A 9 FVDD BOOTSTRAP VDD 7 SUPPLY DRIVER CONTROL 10 GH HIGH SIDE DRIVER LOW SIDE DRIVER C5 100 nF 11 SH 6 GL 019aaa673 Fig 16. Boot strap 4.3 MOSFET gate drive RLC circuit The gate drive circuit consists of a Resistor Inductor Capacitor (RLC) series circuit as shown in Figure 17. Resistance (R) is derived from the built-in resistance of the controller IC which is normally sufficiently high enough in most designs. However, an additional external resistor can be added if necessary. See Section 4.3.1. Inductance (L) consists of parasitic PCB inductance coupled with the internal inductance inside the MOSFET. The capacitance (C) is the gate capacitance added with parasitic PCB. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 14 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers IC C1 L R C2 019aab528 Fig 17. MOSFET gate drive circuit For an RLC series circuit, the mathematical condition where no oscillation/undershoot in step responses exists is as Equation 5. See also Figure 18 line 4. R 2 C 2 – 4LC > = 0 (5) 019aaa674 600 I(t) (mA) (1) (2) (3) (4) (5) (6) (7) 400 200 0 −200 0 4 8 12 16 t (s) (1) The critical damping plot is the bold red curve. The plots are normalized for L = 1 and C = 1 Fig 18. Under/overdamped responses of an RLC circuit 4.3.1 Extra resistance As the L and C are known (given the layout), a minimum value of the series resistance (R) can be calculated. Where extra resistance is needed the extra series resistor (R) must be low enough for the gate drive not to open itself due to Miller capacitance. Hard switching is unavoidable at start-up. As an example, the upper MOSFET is switched on it must not lead to opening of the lower MOSFET due to the Miller capacitance. In such conditions, cross conduction occurs. NXP Semiconductors controllers have internal resistors such that in almost all cases no additional external resistors are needed. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 15 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers Miller capacitance is known from the MOSFET specification, the inductor is the result of layout parasitic inductance of the MOSFET. Spice simulation and circuit measurements are the most effective method to achieve optimal component values. If it is not possible to find a resistor value that suits both conditions, then a resistor diode combination can be used. See Figure 19. 6 8 12 13 5 GL PCS ACM 33 Ω 4.7 Ω LVS GND Lpar T2 Lpar Lpar RS 1Ω 019aaa675 Fig 19. Extra resistance, lower MOSFET of half-bridge for example The most important PCB layout parameters for a half-bridge are the loops of the MOSFET gate drives and the loop through the electrolytic bridge capacitor. The electrolytic bridge capacitor must be close to the half-bridge MOSFETs rather than close to the PFC MOSFET diode. Where this layout arrangement is not possible, add a 100 nF capacitor over the bus PFC voltage close to the half-bridge MOSFETs. For more layout advice, refer to the SMPS layout and EMC guidelines. 5. Resonant tank 5.1 Introduction The controller starts at its maximum frequency then quickly drops to the preheat frequency. The controller then waits for the preheat time to pass and then drops to the ignition frequency. Following ignition, the frequency of the half-bridge controls the power to the lamp. For example, dimmable controllers like the UBA2014, UBA2015(A) and UBA2016A all use a feedback control loop. The UBA2021 operates at a fixed frequency. See Section 3.4. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 16 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 5.2 Frequency versus power 019aaa676 105 Vlamp (V) trace1 104 103 (3b) (3a) (4) 102 trace2 (2) (5) (1) (6) 10 103 104 105 106 f (Hz) (1) Red line trace 1 (2) Blue line trace 2 Fig 20. Resonant tank frequency versus power Key points for Figure 20 • • • • • • • • 1 to 5 = Frequency sweep range 1 = Start 2 = Preheat (yes/no) 3a = Ignition warm 3b = Ignition cold 4 = Burn transition 5 = Burn 6 = Dimming The resonant coil is the main dominating component of lamp power and the resonant capacitor an influential factor. The coil, resonant capacitor and lamp form the resonant tank. The coil and capacitor determine the resonant frequency. In series resonant topology, as in Figure 1 the first selected component is the resonant capacitor. The resonant capacitor determines the current through the filaments during run time. In addition, it also determines the maximum preheat current given a maximum lamp voltage during preheat. The more filament current that is needed the higher the resonant capacitor value must be. As an example, a value of 1.5 nF is practical for a small CFL and up to 10 nF for a TLD/T8 tube. A larger capacitor value also means that enough energy remains in the resonant tank for a single successful ignition attempt. For further details, see Section 5.3. The next selected component is the resonant tank inductor (L) as shown in Figure 21. The lamp power depends on the frequency according to Equation 6. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 17 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers L Vhb = DC block 2 · Vbus Vlamp C 019aaa677 (1) See Equation 6 Fig 21. Resonant tank with a burner driven by a square wave voltage V lamp 2 V bus 2 2 V hb 2 V lamp P out = --------------- ------------- ------- – 1 – 2 LC 2 = ------------- ------------- – 1 – 2 LC 2 L V lamp L V lamp (6) Where: w = 2 f The same equation can be mathematically converted to determine frequency versus lamp power as shown in Equation 7. P% 2 1 1 - + f % = ------ ------- – 2 ------------ 2 LC CV 2 % P% 2 1 ------- – 2 ------------ LC CV 2 % 4V I ---------– 1 2 V % – ------------------------L2C2 (7) Where: • • • • • • L = Output stage inductor (H) C = Output stage capacitor (F) P% = Lamp power at % dimming level (W) V% = Lamp voltage amplitude at % dimming level (V) f% = Frequency corresponding to lamp power at % dimming level (Hz) Vi = Bus voltage (Vbus) The DC blocking value is not accounted for in Equation 7, as a low blocking value has no significant influence over the results. More complex formulas that include the DC blocking capacitor/value (see Figure 21) into account can be found in Ref. 1 Figure 22 shows the power versus frequency graph using a series resonant PFC. In the example, L = 1.9 mH, C = 8.2 nF and Vhb = 400 V T8 36 W. Dimming at 10 % is reached before fmax and operation power is reached a few kHz higher than fmin. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 18 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 019aaa678 60 Plamp (W) 400 llamp (mA) 350 300 (2) (3) 40 250 (1) 200 150 20 100 50 0 40 50 0 70 60 f (Hz) (1) Plamp (2) Ilamp (3) Pfil 1.5 Fig 22. Power versus frequency Table 1. Suggested resonant tank values for different lamp types Lamp Resonant coil Lres (mH) Resonant capacitor Cres (nF) fph (kHz) Rsense () Vbus (V) Iph (mA) (RMS) TLD 36 W 1.9 mH 8.2 nF 70 kHz 1 400 V 600 mA Vlamp during preheat (V) tph (s) 230 V 1.7 s TLD 58 W 1.4 mH 10 nF 60 kHz 0.8 400 V 700 mA 170 V 1.7 s TL5 HE 14 W 3.9 mH 5.6 nF 54 kHz 3.3 400 V 225 mA 180 V 1.5 s TL5 HE 21 W 3.7 mH 5.6 nF 54 kHz 3.3 400 V 225 mA 180 V 1.5 s TL5 HE 21 W 4.0 mH 3.9 nF 58 kHz 3.3 400 V 225 mA 230 V 1.5 s TL5 HE 35 W 4.0 mH 3.9 nF 58 kHz 3.3 400 V 225 mA 230 V 1.5 s TL5 HO 39 W 2.0 mH 10 nF 52 kHz 1 400 V 560 mA 240 V 1.5 s TL5 HO 49 W 2.6 mH 6.8 nF 52 kHz 2.2 400 V 370 mA 240 V 1.5 s TL5 HO 54 ‘W 1.5 mH 10 nF 55 kHz 0.75 400 V 800 mA 330 V 1.5 s 5.3 Ignition and coil saturation The resonant tank coil and capacitor value determine the preheat, ignition and operation conditions. A coils saturation current and losses are important parameters besides its value in Henries. The critical point for saturation is during lamp ignition. The reason is, the voltage over the lamp is at its peak, as is the current through the coil/resonant capacitor. The required ignition voltage together with the chosen resonant capacitor and ignition frequency determine the level of current the coil must handle before saturation occurs. Coil saturation causes high currents that damage the ballast. The UBA2015(A) and UBA2016A have direct coil saturation detection that increase the frequency and starts a fault timer in case of saturation. The UBA2021 increases its frequency and the UBA2014 jumps to its maximum frequency due to the capacitive mode that is a direct consequence AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 19 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers of coil saturation. A ballast based on UBA2014 and UBA2021 can be extended with a small OverPower Protection (OPP) circuit. to bring them to standby in case of coil saturation. The ignition frequency is the frequency where the resonant tank reaches the ignition voltage. Ignition frequency can be calculated using Equation 8. 1 F ign = --------------------------------------------------------------------------------------------------------- L res C res C DCblock 2 ---------------------------------------------------------------------------------------------V bridge 2 C res + C DCblock 1 + ----------------------- V ign (8) Where: • Vbridge is the PFC output voltage • Lres and Cres is the resonance coil/capacitor • CDCblock is the DC blocking capacitor The current through the coil as the resonant tank reaches the ignition voltage can be calculated using Equation 9: I coil max = V ign 2 F ign C res (9) The saturation value of Lres must be higher than the coil current during ignition. In addition, in cases of a restart/power dip the coil is still warm which can reduce its saturation current depending on the magnetic material used. Under test, run a test with an aged burner as aged burners tend to have a higher ignition voltage than new ones. In addition, a cold burn has an increased ignition voltage. Finally, remember that the incoming photons accelerate tube ignition. Therefore the best stress test is an aged burner, shielded from any environment light straight from the freezer (leave 24 hours in between tests). The presence of a grounded metal plate close to the tube lowers the ignition voltage. Therefore, testing must take place under near to final design conditions. No ignition protection To protect the ballast TL controllers, the UBA2014, UBA2015(A) and UBA2016A all have lamp over voltage protection circuits. Lamp over voltage protection circuits limit the frequency ramp down during the ignition stage if the lamp voltage exceeds a level set by the external components. Figure 23 shows an example circuit using the UBA2014. The circuit prevents a high voltage over the lamp avoiding damage to the resonant capacitor, coil or other components. Following a time-out of about 100 ms the controller switches to standby. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 20 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers C24 C8 330 pF LAMP LVS VOLTAGE 13 SENSOR 100 nF R20 220 kΩ C19 56 nF R5 10 kΩ D4 BYG20E C17 6.8 nF C22 8.2 nF lamp C23 100 nF C20 68 nF R18 180 kΩ 019aab527 Fig 23. Lamp over voltage protection circuit 5.4 Preheat and run time filament current The amount of preheat current versus time can be found in the burner specification as shown in Table 2. Table 2. Preheat current versus time values Lamp type PL-C 4-pin 10 W 13 W 18 W 26 W RMS Iph Preheat current (mA) tph Rsub () (0.5 s) (1.0 s) (1.5 s) (2.0 s) min (RMS) 295 230 205 190 30 max (RMS) 390 305 270 250 30 min (RMS) 300 240 215 200 30 max (RMS) 395 315 280 265 30 min (RMS) 375 300 270 255 18 max (RMS) 490 395 355 335 18 min (RMS) 560 450 405 380 9 max (RMS) 735 590 535 500 9 The substitution resistor is 3.1 × cold filament resistance value during lamp operation. In addition, the burner specification gives maximum voltage during preheat without the risk of so called glow or early ignition. Glow is a discharge current without ignition which damages the filaments. When no burner specification exists, then as a guideline the filament resistance at the end of preheat must be 4.75 times the cold (room temperature) resistance. The NXP Semiconductors controllers that have preheat, the UBA2021, UBA2014, UBA2015(A) and UBA2016A all have an input for a current sense resistor. Current sense resistors regulate the frequency so that the desired preheat current is obtained. The level of the lamp voltage under these conditions depends on the resonant tank LC components. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 21 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers During lamp operation, the current through the filament must be within limits as specified in the burner data sheet. There are two kinds of specifications: • The lead wire current versus discharge current. • Sum of Squares (SoS) specification 5.4.1 Lead wire current versus discharge current Figure 24 is an example of a specification of lead wire current versus discharge current. All currents are RMS values. 019aaa679 280 ILH (mA) 240 200 160 TARGET setting 120 80 40 0 0 40 80 120 160 200 240 280 ID (mA) Fig 24. Example ILH versus ID burner specification ILH ID ILL 019aaa680 (1) ILH = lead-high (total) current (2) ID = lamp (discharge) current (3) ILL = lead-low (heating) current Fig 25. Definition of lamp currents 5.4.2 SoS specification The specification can also be in the form of the so-called SoS of the ILH and ILL currents. SoS is the more recent and more accurate way of specifying filament currents. The equation for calculating the SoS value is shown in Equation 10. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 22 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 019aaa910 0.4 SoS (A2) maximum settin 0.3 g 2 × 12 LLmax. target setting 0.2 minim um s etting 0.1 0 0 0.1 0.2 0.3 Ilamp (A) Fig 26. Graphical representation of the SoS lines of TL5 HO 24 W and 39 W 2 2 (10) SoS = I LH + I LL 6. Magnetic component design 6.1 Introduction 6.2 Inductor design parameters An important factor of good ballast design is the quality of the main inductor. To achieve a high efficiency solution the inductance value, saturation current, proximity, core and ohmic losses, parasitic capacitance and stray magnetic fields are all important. Not understanding the functionality and implementing non-optimized components results in either, inferior performance or an impractical design. The following provides detailed guidelines for performance and design optimization. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 23 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 014aaa940 400 3F3 PV (kW/m3) f (kHz) ^ B (mT) 200 100 400 50 25 100 200 100 300 200 100 0 0 40 80 120 T (°C) Fig 27. 3F3 specific power loss for several temperature/flux density combinations For core material, each manufacturer has another code. For applications between 40 kHz and 100 kHz, 3F3 (Ferroxcube), N87 (EPCOS) or TP4 (TDG), are recommended. Select the material that has the lowest loss at working temperature. See Table 3. Table 3. Ferrite core comparative geometry considerations Aspect Pot core/RM core Double slab core E core Ec, ETD cores PQ core EP core Toroid Core costs high high low medium high medium low Bobbin costs low low low medium high high none Winding costs low low low low low low high good excellent excellent good good fair Winding flexibility good Assembly simple simple simple medium simple simple none Mounting flexibility good good good fair fair good poor Heat dissipation poor good excellent good good poor good Shielding excellent good poor poor fair excellent good 6.3 Core type selection Core geometry depends on several factors, for example, cost, flexibility, shielding and utilization factors. A core can have an inner core that results in a round or square winding shape. Stray inductance can vary with core shape. The maximum stored energy in the inductor together with the required air gap determines the core size. A core with a large air gap can store more energy than a core with a small air gap. In practice, for resonant converters, an optimum design is reached when the core losses and the winding losses (proximity and skin losses) are balanced. Therefore it is necessary to compromise between high storable energy levels, low leakage inductance and small tolerances on the inductance. The maximum energy stored in the inductor can be calculated using Equation 11: AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 24 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 2 1 E = --- L I p 2 (11) Example: • L = 357 H • Ip = 1.48 A • E = 3.9 104 J The E series cores are the most commonly used for TL applications. CFL applications sometimes use different shapes for a mechanical fit. Table 4 and Figure 28 lists and shows some of the core types. Table 4. Core selector Core type Typical size T5 HE 35 W E E20 EE EE30 EER EER25.5 EI EI25 EPC EPC27 ETD ETD19 (1) (2) (4) (3) (5) 019aab529 (1) EI core (2) EE core (3) EER core (4) ETD core (5) EPC core Fig 28. Core types AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 25 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 6.4 Calculate windings Al is often specified in the data sheet of the core material. It relates to the inductive value of a single turn on the selected core. Using this figure and knowing the inductance the number of inductor windings can be calculated using Equation 12: NL = L ----AI (12) Example: • AI= 630 nH • L= 357 H • NL = 24 A practical value for NL can be obtained by rounding the calculated value to its nearest integer. As a check, the magnetic material determines the maximum magnetic B-field. The peak value of B-field reached during operation has a substantial impact on core losses. Generally, the max B-field in the magnetic material must remain lower than the specified saturation field Bsat of the material. The B-field can be calculated using Equation 13: N L3 I p B max = U e -------------------Ie (13) Example: refer to Equation 14: • • • • NL3 = 24 Ip = 1.48 ue = 342 le = 35.6 1.48 B max = 342 24 ---------- = 338mT 35.6 (14) 6.5 Auxiliary winding count CAUTION Check that good isolation exists between the primary and secondary windings. As during ignition, a voltage difference of up to 1.5 KV can occur. The auxiliary winding can be used for the following three purposes: • To heat the filaments • To detect lamp failure • Generate the required voltage to power the controller Equation 15 and Equation 16 apply: AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 26 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers L sec V sec = -------------------------------L prim V prim (15) 2 L sec N sec ----------- = --------------2 L prim N prim (16) 6.6 Select wire diameters Wire diameter selection is a trade-off between available winding area, ohmic, proximity and skin losses. The use of wire gauge sizes smaller than 1 mm in diameter at operating frequencies lower than 100 kHz results in negligible skin losses. Wire gauge sizes larger than 1 mm in diameter, it is recommended that litz wire or multiple strands are used. Skin depth can be calculated using Equation 17. = 2 ------------------------------------------------2 f eff u r u o (17) Where: • uo = 4 10 • = resistivity = 1.7 108 (copper) • Ur (copper) = 1 Example: • At 50 kHz sinusoidal current, using copper, the skin depth is 0.3 mm. For the coil in a resonant tank ballast only take the first harmonic into account, as the current is close to a sine wave. For a coil (transformer) with secondary windings (inductive mode filament heating) a square voltage wave form is present on the windings. The secondary current (unlike the one from the main coil) therefore has high frequency components. For the wire type of these secondary windings, consider only the 3rd and 5th harmonic. The peak current value is a dominant parameter when calculating the ohmic losses. Estimate the value by calculating the wire resistance and calculating the average power dissipation in the wire. Generally, the current density must be between 300 circular mills and 500 circular mills per ampere. Table 5 shows wire sizes relative to current. Table 5. Diameter (mm) AN10971 Application note Wire selection table Nearest AWG Area (mm2) Area (circular DC res. (/M) Typical mills) current level (A) 0.1 38 0.008 15 2.195 0.04 0.2 32 0.031 62 0.549 0.15 0.25 30 0.049 97 0.351 0.24 0.315 28 0.078 154 0.221 0.38 0.355 27 0.099 195 0.174 0.49 All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 27 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers Table 5. Wire selection table …continued Diameter (mm) Nearest AWG Area (mm2) Area (circular DC res. (/M) Typical mills) current level (A) 0.4 26 248 0.126 0.137 0.62 0.56 23 0.246 486 0.070 1.22 0.71 21 0.396 781 0.044 1.95 16 0.2 - 0.503 992 0.034 2.48 37 0.2 - 1.162 2294 0.015 5.73 61 0.2 - 1.916 3782 0.009 9.45 During lamp operation, the coil current is at its maximum around the 10 % to 15 % dimming level of the lamp current. This condition applies to a typical ballast operating at 60 kHz to 70 kHz. 6.7 Half-bridge transformer design for deep dimming A low capacitive coupling from the primary to the secondary windings is used to reduce ElectroMagnetic Interference (EMI). In addition, stray current that interfere with the lamp current measurement are reduced. As shown in Figure 32 the coil can also be a transformer with two small secondary windings. Typical values of these secondary windings are 0.5 H for none dimmable (large capacitor in series) and 25 H for dimmable applications (small capacitor in series). See Figure 32 for an example schematic. It is important to maintain low parasitic capacitance for deep dimmable applications as follows: • Cstray primary to secondary < 25 pF • Cstray secondary to secondary < 15 pF The breakdown voltage across the primary, primary to secondary and secondary to secondary windings must be higher than the maximum voltage the ignition protection circuit allows. 6.7.1 Suggested transformer construction Figure 29 shows an example of suggested transformer construction: • Winding 6-5 is secondary winding connected to the hot side of the lamp • Winding 7-8 is secondary winding connected to the cold side of the lamp • Winding 3-2 is the primary winding; pin 3 connects to switching half-bridge MOSFETs AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 28 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 7 8 5 6 2 3 (a) 5 6 7 8 2 3 (b) 5 6 8 7 gnd 2 3 (c) (1) 019aaa682 (1) Indicates mechanical start of the winding and electrical phase Fig 29. Three different half-bridge transformer winding examples AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 29 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 7. Dimmable controller feedback control loops 7.1 Introduction Dimming ballasts need a feedback control loop to maintain the lamp current stable at the desired value. None dimmable ballast in principle can run at a fixed frequency. However, lamp current variations due to lamp temperature and aging can be avoided by using a controlled system. Figure 30 show an example of a feedback control loop. Pi (1) + f f/p p LAMP v I V/I 019aaa683 (1) Desired lamp power Fig 30. Feedback control loop A desired lamp power is derived from the customer, including: • • • • • 0 V to 10 V interface Dali Potentiometer Measurement of environment light Triac position for CFL ballasts The UBA2014, UBA2015(A) and UBA2016A all have an input pin with a voltage range of 0 V to 2.5 V to set the desired lamp current. The topology and component values for a dimmable system can be different than for a non-dimmable. 7.1.1 Resonant tank values for a dimmable system The frequency to lamp power/current takes place via the resonant tank as described in Section 5. It is important that the coil is designed with large losses at the deepest dimming level (highest frequency). A typical dimming curve is from 40 kHz at full power to 75 kHz at deepest dimming level. 7.1.2 Inductive mode heating There are two commonly used filament heating topologies for fluorescent ballast controllers including: • Classic series resonant, see Figure 31 • Inductive mode, see Figure 32 AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 30 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers Lres 1 2 A1 A2 RT1 PTC Cres1 lamp TLD36W B1 B2 3 Cres2 4 CDCblocking 019aaa052 Fig 31. Series resonant heating T1 25 μH 1.9 mH 33 nF 1 2 A1 A2 U11 TL T8 36 W 8.2 nF T2 + - V1 V (DC) B1 B2 3 25 μH over power protection 1.5 nF 4 33 nF 68 nF CS-lamp current sense 0.5 Ω 1.5 nF 10 Ω 019aaa684 Fig 32. Inductive mode heating The advantage of inductive mode heating is the lamp current can be measured separate from the current through the resonant capacitor. This advantage allows deeper dimming than with classic series resonant. The current through the sense resistor in the source of the lower MOSFET is the coil current which is the lamp current plus the capacitor current. The deeper the dimming level the higher the resonant capacitor current becomes compared to the lamp current. For classic series resonant heating, at 15 % of nominal lamp current the feedback control loop regulates on the resonant capacitor current only. As a result it leaves the lamp switch-off. Therefore, dimming is limited to around 15 % see Figure 31. The inductive mode topology allows dimming down to between 1 % to 2 %. To reach these deep dimming values, it is important to maintain low parasitic capacitance from primary to secondary on the coil and on the PCB. Table 6 contains a list of values for different tubes for inductive mode heating topology. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 31 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers Table 6. Suggested resonant tank values for different lamp types Lamp Resonant coil Resonant capacitor Secondary inductance Secondary capacitance Vbus Preheat energy Preheat time TLD 18 W 2.14 mH 4.7 nF 11 H 39 nF 400 V 4J 1.2 s TLD 36 W 1.9 mH 8.2 nF 14 H 33 nF 400 V 4.6 J 1.2 s TLD 58 W 1.38 mH 8.2 nF 14 H 27 nF 400 V 5J 1.2 s TLD 70 W 1.3 mH 8.2 nF 17 H 27 nF 400 V 6.5 J 1.2 s TL5 HO 24 W 2 mH 4.7 nF 10 H 33 nF 400 V 3.2 J 1.2 s TL5 HO 39 W 1.8 mH 4.7 nF 10 H 27 nF 400 V 3J 1.2 s TL5 HO 54 W 1.3 mH 4.7 nF 8 H 33 nF 400 V 3.8 J 1.2 s TL5 HO 49 W 2.7 mH 4.7 nF 20 H 15 nF 450 V 2.8 J 1.2 s TL5 HO 80 W 1.1 mH 8.2 nF 15 H 22 nF 400 V 5.8 J 1.2 s TL5 HE 14 W 3.65 mH 4.7 nF 18 H 22 nF 400 V 2.2 J 1.2 s TL5 HE 21 W 3.56 mH 4.7 nF 18 H 22 nF 400 V 2.2 J 1.2 s TL5 HE 28 W 3.83 mH 4.7 nF 16 H 22 nF 450 V 2.2 J 1.2 s TL5 HE 35 W 3.88 mH 4.7 nF 16 H 22 nF 480 V 2.2 J 1.2 s 7.1.3 Loop control speed Figure 30 shows that the controller is a part of a feedback control loop (for all dimmable systems, and also for high end non-dimmable). For deep dimming a fast feedback control loop is needed due to the physics of the lamp. If the lamp, does not receive power longer than 100 s to 300 s (ionization time constant) the discharge stops. Reignition is now needed. NXP Semiconductors controllers only have on pin to set the feedback control loop speed. For systems with deep dimming two time constants are needed. One for the ignition sweep and average current setting and one to maintain discharge at low currents levels. CT CSW CF IREF VREF C16 220 nF R11 1 kΩ C15 220 nF C14 100 pF R9 33 kΩ 1 2 3 4 14 C19 10 nF C12 10 nF 019aaa685 Fig 33. Fast feedback control loop Figure 33 shows an example circuit using the UBA2014 with pin CSW configured as a fast control loop. Resistor R11 and C12 provides a small (a few kHz) and fast control around a base frequency determined by the voltage on capacitor C15. In Proportional Integral Differential (PID) controller terms, it is considered an extra pole. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 32 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 8. System performance 8.1 Introduction Ballast losses are derived from: • Losses in the PFC stage (typical efficiency for a designed PFC is around 96 % to 98 %). • Losses in the switching MOSFETs (1 % to 2 %) see Section 4 • Losses in the resonant coil (1 % to 5 %) see Section 5 • Losses in the resonant capacitor (negligible if a high performance capacitor is chosen, however between 1 % to 2 % for low-cost capacitors) • Miscellaneous losses in controller, diodes, sense resistor, and so on, 1 % in total In total for a ballast optimized for performance the efficiency is around 93 %. A typical ballast optimized for Bill Of Materials (BOM) cost has an efficiency of approximately 85 %. The losses in the filaments are typically not considered to be ballast losses as heating the filaments is an essential part of the lamp operation. 8.2 Inductor losses The inductor has several loss mechanisms. Calculation of these losses is complex and not clearly defined how these losses contribute to the overall total inductor losses. Equation 18 and Equation 19 simply illustrates a number of loss mechanisms within the inductor. 8.2.1 Ohmic losses The combination of wire length and thickness causes ohmic losses. The calculation of the resistance and losses can be calculated with Equation 18 and Equation 19. 1 R DC = --A (18) 1 T 2 P DC = --- I R DC T o 1 2 dt = --- I p R DC 2 (19) Example, refer to Equation 20 and Equation 21. • • • • AN10971 Application note Wire length 1 m at diameter 0.56 mm (copper) = 1.72 108 A = R2 = 2.46 107 Ip = 1.48 A 1 - = 70m R DC = 1.72 10 – 8 -------------------------2.46 10 –7 (20) 1 P DC = --- 1.48 2 70 = 76.5mW 3 (21) All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 33 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 8.2.2 Proximity losses For proximity losses, the full calculations are outside the scope of this application note. However, it is important to understand that proximity losses are closely related to the skin depth and number of windings as shown in Figure 34. 014aaa943 100 5 100 RAC RDC 40 20 10 4 3 2 10 n = 1 layer 1 0.1 1 10 h /δ Fig 34. Proximity loss graph Avoid too many layers of wires with radius that is close to, or below skin-depth. Normally, the proximity losses are calculated as a factor of the DC wire resistance as shown in the Equation 22. R AC = n R DC (22) By maintaining low resistive losses, proximity losses remain minimal. 8.2.3 Core losses The magnetization curve and frequencies determine the core losses in the magnetic material. At each converter cycle, the magnetic flux density excites the magnetic field in the core material. This result, produces a curve that is highly non-linear with the saturation level and hysteresis. The surface area enclosed by the variation in B-field strength at a certain frequency determines the losses. A bigger core, a higher B-field and a higher frequency increase these losses. The core material data sheet shows the loss per unit of volume at given frequencies. See Figure 35 and Figure 36. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 34 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers B μ H 019aaa862 Fig 35. BH curve magnetic material 014aaa942 1 Power loss density 100 kHz (W/cm3) 1 MHz 500 kHz 200 kHz 50 kHz 0.1 20 kHz 0.01 0.01 0.3 0.1 Tesla (Bmax) Fig 36. Material loss graph A simple empirical formula that calculates core loss is called a Steinmetz equation as shown in Equation 23. P h = K h f B max V core (23) Kh and depend on the core material. Equation 23 can be improved by including the harmonics of a square waveform as shown in Equation 24. P nse = K h 2f B max 1 – + 1 – 1 – V core (24) Where: • d = duty cycle • Bmax = the peak flux density AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 35 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers • f = the frequency of the fundamental • Vcore = the volume of the core We can see that a higher frequency, a higher flux density, a smaller duty-factor and a bigger volume all increase core losses. A bigger core does not always reduce core losses; if the B-field is already low. The increase in volume counter acts the lower losses due to reduce flux density. Example: • • • • • • • d = 50 % Kh = 0.05 f = 80 (kHz) = 1.84 Bmax = 0.1 T =3 Vcore = 2.4 cm3 8.3 Sense resistor losses For the sense resistor losses, the coil current can be calculated in the same way as the MOSFET losses. The lower MOSFET is switched on half the time. Sense resistor losses can be calculated using Equation 25. ½ I coil 2 R sense AN10971 Application note (25) All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 36 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 9. Abbreviations Table 7. Abbreviations Acronym Description BOM Bill of Materials CFL Compact Fluorescent Lamp EMC ElectroMagnetic Compatibility MOSFET Metal-Oxide Semiconductor Field-Effect Transistor HF High Frequency LF Low Frequency LRC Inductor Resistor Capacitor PFC Power Factor Correction PID Proportional Integral and Differential RLC Resistor Inductor Capacitor RMS Root Mean Square RON On Resistance SoS Sum of Squares SMPS Switched Mode Power Supply TL Tube Light ZVS Zero Voltage Switching 10. References [1] AN10971 Application note Lamp Model IEEE Transactions on Power Electronics Volume 20, No 5, Sept 2005. — An Improved Design Procedure for LCC Resonant Filter of Dimmable Electronic Ballasts for Fluorescent Lamps. All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 37 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 11. Legal information 11.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 11.2 NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 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NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 11.3 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 38 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 12. Tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Suggested resonant tank values for different lamp types . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Preheat current versus time values . . . . . . . . .21 Ferrite core comparative geometry considerations . . . . . . . . . . . . . . . . . . . . . . . .24 Core selector . . . . . . . . . . . . . . . . . . . . . . . . . .25 Wire selection table . . . . . . . . . . . . . . . . . . . . .27 Suggested resonant tank values for different lamp types . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . .37 continued >> AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 39 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 13. Figures Fig 1. Fig 2. Fig 3. Fig 4. Fig 5. Fig 6. Fig 7. Fig 8. Fig 9. Fig 10. Fig 11. Fig 12. Fig 13. Fig 14. Fig 15. Fig 16. Fig 17. Fig 18. Fig 19. Fig 20. Fig 21. Fig 22. Fig 23. Fig 24. Fig 25. Fig 26. Fig 27. Fig 28. Fig 29. Fig 30. Fig 31. Fig 32. Fig 33. Fig 34. Fig 35. Fig 36. Lamp characteristics . . . . . . . . . . . . . . . . . . . . . . .4 Magnetic 50/60 Hz TL ballast . . . . . . . . . . . . . . . .4 Lamp filament . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Rh/Rc ratio versus temperature for 100 % wolfram filaments . . . . . . . . . . . . . . . . . . . . . . . . . .5 Fixed preheat current window . . . . . . . . . . . . . . . .5 Half-bridge circuit overview . . . . . . . . . . . . . . . . . .6 Typical HF TL half-bridge ballast circuits . . . . . . . .7 Start-up sequence . . . . . . . . . . . . . . . . . . . . . . . . .8 S1 and S2 driven by UBA2021 . . . . . . . . . . . . . . .9 Current amplitude of LRC resonant tank versus frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Current phase of LRC resonant tank versus frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Current voltage relation of inductor . . . . . . . . . . .10 Current voltage relation of capacitor . . . . . . . . . .10 Switch timing sequence (inductive mode) . . . . . . 11 Switch timing sequence (capacitive mode) . . . . . 11 Boot strap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 MOSFET gate drive circuit. . . . . . . . . . . . . . . . . .15 Under/overdamped responses of an RLC circuit .15 Extra resistance, lower MOSFET of half-bridge for example . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Resonant tank frequency versus power. . . . . . . .17 Resonant tank with a burner driven by a square wave voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Power versus frequency . . . . . . . . . . . . . . . . . . .19 Lamp over voltage protection circuit . . . . . . . . . .21 Example ILH versus ID burner specification . . . . .22 Definition of lamp currents . . . . . . . . . . . . . . . . . .22 Graphical representation of the SoS lines of TL5 HO 24 W and 39 W . . . . . . . . . . . . . . . . . . .23 3F3 specific power loss for several temperature/flux density combinations . . . . . . . .24 Core types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 Three different half-bridge transformer winding examples . . . . . . . . . . . . . . . . . . . . . . . .29 Feedback control loop . . . . . . . . . . . . . . . . . . . . .30 Series resonant heating . . . . . . . . . . . . . . . . . . . .31 Inductive mode heating . . . . . . . . . . . . . . . . . . . .31 Fast feedback control loop. . . . . . . . . . . . . . . . . .32 Proximity loss graph . . . . . . . . . . . . . . . . . . . . . .34 BH curve magnetic material. . . . . . . . . . . . . . . . .35 Material loss graph . . . . . . . . . . . . . . . . . . . . . . .35 continued >> AN10971 Application note All information provided in this document is subject to legal disclaimers. Rev. 1 — 15 September 2011 © NXP B.V. 2011. All rights reserved. 40 of 41 AN10971 NXP Semiconductors TL applications with NXP ballast controllers 14. Contents 1 2 3 3.1 3.2 3.3 3.4 3.5 3.5.1 4 4.1 4.1.1 4.1.2 4.2 4.3 4.3.1 5 5.1 5.2 5.3 9 5.4 5.4.1 5.4.2 6 6.1 6.2 6.3 6.4 6.5 6.6 6.7 6.7.1 7 7.1 7.1.1 7.1.2 7.1.3 8 8.1 8.2 8.2.1 8.2.2 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Lamp characteristics and half-bridge principles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Lamp filaments . . . . . . . . . . . . . . . . . . . . . . . . . 4 HF TL half-bridge principles . . . . . . . . . . . . . . . 6 Start-up, ignition and operation sequence . . . . 8 Zero voltage switching of a half-bridge (capacitive mode) . . . . . . . . . . . . . . . . . . . . . . . 8 None overlap time, fixed versus adaptive. . . . 11 Half-bridge MOSFET selection . . . . . . . . . . . . 13 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . 13 MOSFET voltage rating . . . . . . . . . . . . . . . . . 13 MOSFET RON . . . . . . . . . . . . . . . . . . . . . . . . 13 Boot strap diode and capacitor . . . . . . . . . . . . 14 MOSFET gate drive RLC circuit . . . . . . . . . . . 14 Extra resistance . . . . . . . . . . . . . . . . . . . . . . . 15 Resonant tank . . . . . . . . . . . . . . . . . . . . . . . . . 16 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Frequency versus power . . . . . . . . . . . . . . . . 17 Ignition and coil saturation . . . . . . . . . . . . . . . 19 No ignition protection . . . . . . . . . . . . . . . . . . . 20 Preheat and run time filament current . . . . . . 21 Lead wire current versus discharge current . . 22 SoS specification . . . . . . . . . . . . . . . . . . . . . . 22 Magnetic component design . . . . . . . . . . . . . 23 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Inductor design parameters . . . . . . . . . . . . . . 23 Core type selection . . . . . . . . . . . . . . . . . . . . . 24 Calculate windings . . . . . . . . . . . . . . . . . . . . . 26 Auxiliary winding count . . . . . . . . . . . . . . . . . . 26 Select wire diameters . . . . . . . . . . . . . . . . . . . 27 Half-bridge transformer design for deep dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Suggested transformer construction. . . . . . . . 28 Dimmable controller feedback control loops 30 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Resonant tank values for a dimmable system 30 Inductive mode heating . . . . . . . . . . . . . . . . . 30 Loop control speed . . . . . . . . . . . . . . . . . . . . . 32 System performance . . . . . . . . . . . . . . . . . . . . 33 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Inductor losses . . . . . . . . . . . . . . . . . . . . . . . . 33 Ohmic losses . . . . . . . . . . . . . . . . . . . . . . . . . 33 Proximity losses . . . . . . . . . . . . . . . . . . . . . . . 34 8.2.3 8.3 9 10 11 11.1 11.2 11.3 12 13 14 Core losses . . . . . . . . . . . . . . . . . . . . . . . . . . Sense resistor losses. . . . . . . . . . . . . . . . . . . Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . References. . . . . . . . . . . . . . . . . . . . . . . . . . . . Legal information . . . . . . . . . . . . . . . . . . . . . . Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 36 37 37 38 38 38 38 39 40 41 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 15 September 2011 Document identifier: AN10971