MPS MP174GS 700v non-isolated off-line regulator, up to 400ma output current Datasheet

MP174
700V Non-Isolated Off-Line Regulator,
Up to 400mA Output Current
The Future of Analog IC Technology
DESCRIPTION
FEATURES
MP174 is a primary-side regulator that provides
accurate constant voltage (CV) regulation
without opto-coupler. It supports Buck, BuckBoost, Boost and Flyback topologies. It has an
integrated 700V MOSFET to simplify the
structure and reduce costs. These features
make it an ideal regulator for off-line low power
applications, such as home appliances and
standby power.

MP174 is a green-mode-operation regulator.
Both the peak current and switching frequency
decrease as the load decreases. This feature
provides excellent efficiency at light load, and
improves the overall average efficiency.
MP174 features various protections, including
thermal shutdown (OTP), VCC under-voltage
lockout (UVLO), overload protection (OLP),
short-circuit protection (SCP), and open loop
protection.
MP174 is available in small TSOT23-5 package
and SOIC8 package.











Primary-side CV control, supporting Buck,
Buck-Boost, Boost and Flyback topologies
Integrated 700V/13.5Ω MOSFET and
current source
<30mW no-load power consumption
Up to 5W output power
Maximum DCM output current less than
250mA
Maximum CCM output current less than
400mA
Low VCC Operating Current
Frequency foldback
Limited maximum frequency
Peak-current compression
Internally biased VCC
OTP, UVLO, OLP, SCP, open loop
protection
APPLICATIONS



Home appliances, white goods and
consumer electronics
Industrial controls
Standby power
All MPS parts are lead-free, halogen free, and adhere to the RoHS directive. For
MPS green status, please visit MPS website under Quality Assurance. “MPS”
and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
MP174 Rev. 1.01
8/18/2016
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP174GJ
MP174GS
TSOT23-5
SOIC-8
See Below
See Below
* For Tape & Reel, add suffix –Z (e.g. MP174GJ–Z);
* For Tape & Reel, add suffix –Z (e.g. MP174GS–Z);
TOP MARKING
AKC: product code of MP174GJ;
Y: year code;
TOP MARKING
MP174: part number of MP174GS;
LLLLLLLL: lot number;
MPS: MPS prefix:
Y: year code;
WW: week code:
PACKAGE REFERENCE
TOP VIEW
VCC
1
FB
2
SOURCE
3
5
4
TSOT23-5
MP174 Rev. 1.01
8/18/2016
TOP VIEW
DRAIN
SOURCE
VCC
1
8
N/C
FB
2
7
DRAIN
SOURCE
3
6
N/C
SOURCE
4
5
N/C
SOIC-8
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
Drain to source .............................-0.3V to 700V
All other pins ..................................-0.3V to 6.5V
(2)
Continuous Power Dissipation ....(TA = +25°C)
TSOT23-5 ..................................................... 1W
SOIC8 ........................................................... 1W
Junction Temperature ...............................150°C
Lead Temperature ....................................260°C
Storage Temperature............... -60°C to +150°C
ESD Capability Human Body Mode .......... 2.0kV
ESD Charged Device Model
TSOT23-5 ................................................. 1.5kV
SOIC8 ....................................................... 2.0kV
TSOT23-5.............................. 100 ..... 55... °C/W
SOIC-8.................................... 96 ...... 45... °C/W
Recommended Operating Conditions
(3)
(4)
θJA
θJC
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowance continuous power dissipation at
any
ambient
temperature
is
calculated
by
PD(MAX)=(TJ(MAX)-TA)/θJA. Exceeding the maximum
allowance power dissipation will cause excessive die
temperature, and the regulator will go into thermal shutdown.
Internal thermal shutdown circuit protects the device from
permanent damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
Operating Junction Temp. (TJ). -40°C to +125°C
Operating VCC range .....................5.3V to 5.6V
MP174 Rev. 1.01
8/18/2016
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
ELECTRICAL CHARACTERISTICS
VCC = 5.5V, TJ=-40°C~125°C, Min & Max are guaranteed by characterization, typical is tested
under 25°C, unless otherwise specified.
Parameter
Symbol
Condition
Start-up Current Source and Internal MOSFET (Drain Pin)
Internal regulator supply current
Iregulator
VCC=4V;VDrain=100V
Drain pin leakage current
ILeak
VCC=5.8V;VDrain=400V
Breakdown Voltage
ON resistance
Supply Voltage Management (VCC Pin)
VCC level (increasing) where the internal
regulator stops
VCC level (decreasing) where the
internal regulator turns on
VCC regulator on and off hysteresis
VCC level (decreasing) where the IC
stops
VCC level (decreasing) where the
protection phase ends
V(BR)DSS
TJ=25°C
Ron
TJ=25°C
TJ=125°C
Min
Typ
Max
Units
2.2
4.1
10
6
17
mA
μA
700
6
V
VCCON
5.1
5.3
5.7
V
130
250
3
3.4
3.6
V
2.4
2.8
V
fs=28kHz, D=67.8%
720
μA
VCC=5.3V
16
200
24
uA
μA
660
720
mA
VCCstop
VCCpro
ICC
ICCLATCH
ILimit
TJ=25°C
600
τLEB1
ISCP
Leading-edge blanking for SCP
Ω
Ω
5.6
Internal IC consumption (No switching)
Internal IC consumption, latch-off phase
Internal Current Sense
Peak current limit
(1)
17
25
5.4
ICC
SCP threshold
13.5
21
VCCOFF
Internal IC consumption
Leading-edge blanking
V
TJ=25°C
750
τLEB2
mV
350
ns
900
mA
180
ns
Feedback Input (FB Pin)
Minimum off time
Maximum on time
Primary MOSFET feedback turn-on
threshold
OLP feedback trigger threshold
τminoff
τmanon
9.5
12
15
μs
19
24
31
μs
VFB
2.45
2.55
2.65
V
VFB_OLP
1.6
1.7
1.8
V
OLP delay time
τOLP
Open-loop detection
Thermal Shutdown
VOLD
Thermal shutdown threshold
(1)
Thermal shutdown recovery hysteresis
(1)
fs=28kHz
220
0.4
0.5
ms
0.6
V
150
°C
30
°C
Notes:
1) This parameter is guaranteed by design.
MP174 Rev. 1.01
8/18/2016
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
TYPICAL CHARACTERISTICS
5.73
2.56
5.72
2.55
5.71
2.54
5.70
2.53
710
-40 -25-10 5 20 35 50 65 80 95 110125
5.69
-40 -25-10 5 20 35 50 65 80 95 110125
2.52
-40 -25-10 5 20 35 50 65 80 95 110125
5.50
2.60
810
800
790
780
770
760
750
740
730
720
5.49
2.55
5.48
2.50
5.47
25
20
15
2.45
5.46
5.45
2.40
5.44
2.35
5.43
10
5
0
-40 -25-10 5 20 35 50 65 80 95 110125
5.42
-40 -25-10 5 20 35 50 65 80 95 110125
2.30
-40 -25-10 5 20 35 50 65 80 95 110
680
950
660
900
640
850
620
800
600
750
11.8
580
-40 -25-10 5 20 35 50 65 80 95 110125
700
-40 -25-10 5 20 35 50 65 80 95 110125
11.7
-40 -25-10 5 20 35 50 65 80 95 110125
12.3
12.2
12.1
12.0
MP174 Rev. 1.01
8/18/2016
11.9
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
TYPICAL CHARACTERISTICS (continued)
Maximum On Time vs.
Temperature
24.6
24.4
24.2
24.0
23.8
23.6
23.4
23.2
-40-25-10 5 20 35 50 65 80 95110 125
MP174 Rev. 1.01
8/18/2016
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 265VAC, VOUT = 12V, IOUT = 300mA, L = 1.2mH, COUT = 100μF, TA = +25°C, unless otherwise
noted.
Zoom In
Zoom In
Zoom In
VDS
100V/div.
VDS
100V/div.
VDS
100V/div.
IL
200mA/div.
IL
200mA/div.
IL
500mA/div.
Zoom In
VDS
100V/div.
IL
500mA/div.
MP174 Rev. 1.01
8/18/2016
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 230VAC, VOUT = 12V, IOUT = 300mA, L = 1.2mH, COUT = 100μF, TA = +25°C, unless otherwise
noted.
VDS
100V/div.
VDS
100V/div.
IL
200mA/div.
IL
200mA/div.
VDS
100V/div.
VDS
100V/div.
IL
500mA/div.
IL
500mA/div.
VDS
100V/div.
IL
500mA/div.
VDS
100V/div.
IL
500mA/div.
VRIPPLE
200mV/div.
VDS
100V/div.
IL
500mA/div.
MP174 Rev. 1.01
8/18/2016
VRIPPLE
50mV/div.
IL
200mA/div.
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
PIN FUNCTIONS
Pin #
Pin #
Name
TSOT23-5 SOIC8
1
1
VCC
2
2
FB
3,4
3,4 SOURCE
5
7
DRAIN
5,6,8
N/C
MP174 Rev. 1.01
8/18/2016
Description
Control circuit power supply.
Regulator feedback.
Internal power MOSFET source. Ground reference for VCC and FB pins.
Internal power MOSFET drain. High-voltage current source input.
Not connected.
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
FUNCTIONAL BLOCK DIAGRAM
Vcc
Start up unit
Power
Management
Drain
Driving Signal
Management
Feedback control
Peak current
Limitation
FB
Protection Unit
Source
Figure 1: Functional Block Diagram
MP174 Rev. 1.01
8/18/2016
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
OPERATION
MP174 is a green-mode-operation regulator: the
peak current and the switching frequency both
decrease with a decreasing load. As a result, it
offers excellent light-load efficiency, and
improves average efficiency. The typical
application diagram shows the regulator operates
with a minimum number of external components.
It incorporates multiple features as described in
the following sections.
Start-Up and Under-Voltage Lockout
The internal high-voltage regulator self-supplies
the IC from the Drain pin. When VCC voltage
reaches 5.6V, the IC starts switching and the
internal high voltage regulator turns off. The
internal high-voltage regulator turns on to charge
the external VCC capacitor when the VCC
voltage falls below 5.3V. A small capacitor (in the
low μF range) can maintain the VCC voltage and
thus lower the capacitor cost.
The IC stops switching when the VCC voltage
drops blow 3.4V.
Under fault conditions—such as OLP, SCP, and
OTP—the IC stops switching and an internal
current source (~16μA) discharges the VCC
capacitor. The internal high-voltage regulator will
not charge the VCC capacitor until the VCC
voltage drops below 2.4V. The restart time can
be estimated using the following equation,
restart  C VCC 
VCC  2.4V
5.6V  2.4V
 C VCC 
16A
4.1mA
24us
48us
12us
Driver
128 Switching cycle
128 Switching cycle
Figure 2: min off at Start-Up
Constant Voltage Operation
MP174 acts as a fully-integrated regulator when
used in the Buck topology, as shown in the
typical application on page1.
It regulates the output voltage by monitoring the
sampling capacitor.
At the beginning of each cycle, the integrated
MOSFET turns on while the feedback voltage
drops below the 2.55V reference voltage, which
indicates insufficient output voltage. The peak
current limitation determines the ON period. After
the ON period elapses, the integrated MOSFET
turns off. Sampling capacitor (C3) voltage is
charged to the output voltage, when the
freewheeling diode (D1) turns on. In this way, the
sampling capacitor (C3) samples and holds the
output voltage for output regulation. The
sampling capacitor (C3) voltage decreases when
the L1 inductor current falls below the output
current. When the feedback voltage falls below
the 2.55V reference voltage, a new switching
cycle begins. Figure 3 shows this operation
under CCM in detail.
MOSFET
Soft-Start
The IC stops operation when VCC voltage drops
blow 3.4V and starts operation when VCC
charges to 5.6V. Every time when the chip starts
operation there is a Soft-Start period. The softstart prevents the inductor current from
overshooting by limiting the minimum off time.
MP174 adopts a 2 phase minimum off-time limit
soft-start. Each Soft-Start phase retains 128
switching cycles. During soft-start, off time limit
gradually shortens from 48μs to 24μs, and finally
to the 12μs normal operation off-time limit (see
Figure 2Error! Reference source not found.).
MP174 Rev. 1.01
8/18/2016
Diode
IL
Ipeak
Io
Vo
V FB
2.55V
Figure 3: VFB vs. VO
Use the following equation to determine the
output voltage:
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
Vo  2.55V 
R1  R2
R2
regulates the output based on the 2.55V
reference voltage.
Under light-load or no-load conditions, the output
voltage drops very slowly, which increasing the
MOSFET off time. Thus the frequency decreases
as the load decreases.
Ramp Compensation
An internal ramp compensation circuit improves
the load regulation. As shown in Figure 4, an
exponential voltage signal added to pull down the
reference voltage of the feedback comparator.
The ramp compensation is a function of the load
conditions: the compensation is about the
1mV/µs under full-load conditions compensation
increases exponentially as the peak current
decreases.
Determine the switching frequency as:
Over-Load Protection (OLP)
Frequency Foldback and Peak Current
Compression
The MP174 remains highly efficient under lightload condition by reducing the switching
frequency automatically.
fs 
(Vin  Vo ) Vo

, for CCM
2L(Ipeak  Io ) Vin
fs 
2(Vin  VO ) Io Vo

, for DCM
LI2peak
Vin
Maximum output power of MP174 is limited by
maximum switching frequency and peak current
limit. If the load current is too large, output
voltage drops, so that the FB voltage drops.
At the same time, the peak current limit
decreases from 660mA as the off-time increases.
In standby mode, the frequency and the peak
current are both minimized, allowing for a smaller
dummy load. As a result, peak-current
compression helps further reduce no-load
consumption. Peak current limit can be estimated
from the following equation (τoff is the power
module’s off time):
+
Thermal Shutdown (OTP)
FB
Comparator
EA
+
+
M
Vramp
+
Vramp
+
-
V
ref
2.55V
28kHz
fs
-
EA Compensation
-
Delay  220ms 
Short-Circuit Protection (SCP)
The MP174 monitors the peak current, and shuts
down when the peak current rises above SCP
threshold through short-circuit protection. The
power supply resumes operation with the
removal of the fault.
IPeak  660mA  (2.4mA / s)  ( off  12s)
VFB
When the FB voltage drops below 1.7V it is
considered as an error flag and timer starts. If the
timer reaches 220ms (fS=28kHz), OLP occurs.
This timer duration avoids triggering OLP when
the power supply starts up or load transition. The
power supply should start up in less than 220ms
(fS=28kHz). The OLP delay time is calculated as
per the following equation:
Ipeak
To prevent any thermal induced damage, the
MP174 shuts down switching when the junction
temperature exceeds 150°C. During the thermal
shutdown (OTP), the VCC capacitor is
discharged to 2.4V, and then the internal high
voltage regulator re-charges. MP174 recovers
when junction temperature drops below 120°C.
Figure 4: EA and Ramp Compensation
MP174 has internal error amplifier (EA)
compensation loop. It samples the feedback
voltage 6us after the MOSFET turns off, and
MP174 Rev. 1.01
8/18/2016
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
Open-Loop Detection
If VFB is less than 0.5V, the IC will stop switching
and a re-start cycle will begin. During Soft-Start,
the open loop detection is blanked.
Leading-Edge Blanking
An internal leading-edge blanking (LEB) unit
avoids premature switching pulse termination
due to turn on spike. Turn on spike is caused by
parasitic capacitance and reverse recovery of
freewheeling diode. During the blanking time, the
current comparator is disabled and can not turn
off the external MOSFET. Figure 5shows the
leading-edge blanking.
IDS
350ns
ILIMIT
t
Figure 5: Leading-Edge Blanking
MP174 Rev. 1.01
8/18/2016
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
APPLICATION INFORMATION
Table 1: Common Topologies Using MP174
Topology
Circuit Schematic
DRAIN
1
5
Features
VCC
FB
MP174
High-Side
Buck
SO URCE
2
3
4
SO URCE
1.
2.
3.
4.
No-isolation,
Positive output
Low cost
Direct feedback
1.
2.
3.
4.
No-isolation,
Negative output
Low cost
Direct feedback
1.
2.
3.
4.
No-isolation,
Positive output
Low cost
Direct feedback
1.
2.
3.
4.
Isolation,
Positive output
Low cost
Indirect feedback
Vin
Vo
DRAIN
1
5
MP174
High-Side
Buck-Boost
SOURCE
2
3
4
VCC
FB
SOURCE
Vin
Vo
DRAIN
1
5
Boost
MP174
Vin
2
VCC
FB
Vo
SOURCE
SOURCE
3
4
T
*
+
Vin
Vo
*
Flyback
DRAIN
1
5
MP174
SOURCE
MP174 Rev. 1.01
8/18/2016
4
2
3
VCC
FB
SOURCE
*
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
Topology Options
MP174 can be used in common topologies, such
as Buck, Buck-Boost, Boost and Flyback. As
illustrated in table 1.
Po max  Vo (Ipeak 
Po max 
Component Selection
The input capacitor supplies the DC input voltage
for the converter. Figure 6 shows the typical DC
bus voltage waveform of half-wave rectifier and
full-wave rectifier.
Vin
VDC(max)
DC input voltage
VDC(min)
AC input voltage
t
Vin
VDC(max)
VDC( min)
DC input voltage
AC input voltage
Figure 7 shows a example of a Pmin curve with a
12V output. Ipeak=0.6A and Tminoff=15μs is used as
the worst case for PMIN calculation.
6
5.5
5
4.5
4
3.5
3
2.5
2
0.25 0.35 0.45 0.55 0.65 0.75
INDUCTANCE(mH)
t
Figure 6: Input Voltage Waveform
Typically, the use of a half-wave rectifier requires
an input capacitor rated at 3uF/W for the
universal input condition. When using the fullwave rectifier, input capacitor is chosen as as
1.5~2uF/W for universal input condiont. Avoid a
minimum DC voltage below 70V; a low DC input
voltage can cause thermal issue. Half-wave
rectifier is recommended for <2W output
application and full-wave rectifier is
recommended for >2W output application.
Inductor
The MP174 has a minimum off-time limit that
determines the maximum power output. The
maximum power increases as the inductor
increases. Using a very small inductor may
cause failure at full load, but a larger inductor
means a higher OLP load. It is recommended to
select an inductor with the minimum value that
can supply the rated power. Estimate the
maximum power with:
MP174 Rev. 1.01
8/18/2016
1 2
1 , for DCM
LIpeak 
min off
2
For mass production, tolerance on the
parameters, such as peak current limitation,
minimal off time, should be taken into
consideration.
PMIN(W)
Input Capacitor
Vo min off
) , for CCM
2L
Figure 7: Pmin vs. L at 12V
For a 3.6W output converter (12V, 0.3A), the
minimum inductor value is about 0.36mH. But the
switching frequency is too high using a 0.36mH
inductor, which causes poor efficiency. Usually, it
is recommended to use an inductor that make
the switching frequency is higher than 20 kHz but
not too high in large output current applications.
To reduce costs, use a standard off-the-shelf
inductor no less than the calculated value.
Freewheeling Diode
The diode should be selected based
maximum input voltage and peak current.
on
The freewheeling diode’s reverse recovery can
affect efficiency and circuit operation for CCM
condiotn, so use an ultra fast diode such as the
EGC10JH.
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
Auxiliary VCC Supply
Output Capacitor
The output capacitor is required to maintain the
DC output voltage. Estimate the output voltage
ripple as:
VCCM _ ripple
VDCM _ ripple 
i

 i  RESR , for CCM
8fsCo
Io
fsCo
R3
D3
D2
VCC
C3
FB
MP174
R1
C4
R2
L1
SOURCE
SOURCE
VOUT
2
I I 
  pk o   Ipk  RESR , for DCM
 I

 pk 
It is recommended to use ceramic, tantalum or
low ESR electrolytic capacitors to reduce the
output voltage ripple.
Feedback Resistors
The resistor divider determines the output
voltage. Appropriate R1 and R2 values should be
chosen to maintain VFB at 2.55V. R2 is typically
5kΩ to 10kΩ, avoid large R2 value.
Figure 8: Auxiliary VCC Supply Circuit
For VO above 7V applications, MP174 can
achieve the 30mW no-load power requirement. In
order to do this, chip requires an external VCC
supply to reduce overall power consumption.
This auxiliary VCC supply is derived from the
resistor connected between C3 and C4. C4
should be set larger than recommendation above.
D3 is used in case that VCC interfere with FB, R3
is determined per the formula below.
Feedback Capacitor
The feedback capacitor provides a sample and
hold function. Small capacitors result in poor
regulation at light loads, and large capacitors
affect the circuit operation. Roughly estimate an
optimal capacitor value using the following
equation:
C
Vo
C
1 Vo
 o  CFB 
 o
2 R1  R 2 Io
R1  R 2 Io
Dummy Load
A dummy load is required to maintain the load
regulation. This ensures sufficient inductor
energy to charge the sample and hold capacitor
to detect the output voltage. Normally a 3mA
dummy load is needed and can be adjusted
according to the regulated voltage. It is a
compromise between small no load consumption
and good no load regulation, especially for
applications require 30mW no load consumption.
Use a zener to reduce no-load consumption if noload regulation is not a concern.
R
Vo  5.8V
IS
Where IS is the VCC consumption under no load
condition. R should be adjusted to meet the
actual IS, because it varies in different application.
In a particular configuration, IS is measured as
about 250uA.
Surge Performance
Appropriate input capacitor value should be
chosen to obtain a good surge performance.
Figure 9 shows the half-wave rectifier. Table 2
shows the capacitance required under normal
condition for different surge voltages. FR1 is
20Ω/2W fused resistor and L1 is 1mH for this
recommendation.
L
FR1
L1
C1
C2
N
Figure 9: Half-Wave Rectifier
MP174 Rev. 1.01
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
Design Example
Table 2: Recommended Capacitance
Surge
500V
1000V
2000V
voltage
1μF
2.2μF
3.3μF
C1
1μF
2.2μF
3.3μF
C2
Layout Guide
PCB layout is very important for reliable
operation, and good EMI and thermal
performance. Please follow these guidelines to
optimize performance.
1) Minimize the loop area formed by the input
capacitor, IC, freewheeling diode, inductor
and output capacitor.
Below is a design example following the
application guidelines for the specifications:
Table 3: Design Example
85VAC to 265VAC
VIN
12V
VOUT
300mA
IOUT
The detailed application schematic is shown in
Figure.10. The typical performance and circuit
waveforms have been shown in the Typical
Performance Characteristics section. For more
device application, please refer to the related
Evaluation Board Datasheets.
2) Place the power inductor far away from the
input filter while keeping the loop area to the
inductor to a minimum, see example below.
3) Place a capacitor valued at several hundred
pF between the FB pin and source as close
the IC as possible.
4) Connect the exposed pads or large copper
area with the DRAIN pin to improve thermal
performance.
Top
Bottom Layer
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
TYPICAL APPLICATION CIRCUITS
Figure 10 shows a typical application example of a 12V, 300mA non-isolated power supply using
MP174.
D1
D2
1N4007
1N4148WS
F1
L1
10/1W
1mH
8
R5
L
D3
D4
1N4007
1N4007
RV1
7
NC
CX1
C4
10uF/400V
NC
NC
C5
10uF/400V
5
Drain
NC
NC
MP174
D6
D7
1N4007
1N4007
Vcc
FB
Source
Source
R1
24K
19.1K
1
2
C3
3
C1
220nF
NC
6
85~265VAC
U1
R2
C2
R3
R4
2.2uF
NC
4.99K
470pF
L2 1.2mH
12V/300mA
VOUT
4
D5
STTH1R06
C6
C7
R6
100uF/35V
1uF
3K
GND
N
GND
Figure 10: Typical Application at 12V, 300mA
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
FLOW CHART
Power On
Vcc Decrease
to 2.4V
Internal High Voltage
Regulator ON
Shut Down
Internal High Voltage
Regulator
Y
Y
N
Vcc>5.6V
N
Soft Start
Stop operation
Y
Vcc<3.4V
Y
Protection
Logic High
?
Monitor Vcc
Shut Down
Internal High Voltage
Regulator
Y
N
Vcc > 5.6V
Vcc < 5.3V
N
OTP, SCP
and open loop
Monitor
Y
Internal High Voltage
Regulator ON
Monitor VFB
Y
N
VFB<2.55V
VFB <1.7V
N
VFB < 0.5V
6144
switching
Y
counter
finished? N
N
Y
Turn ON the
MOSFET
N
Y
Y
Open loop
Logic High
Continuous
Fault Monitor
OLP= Logic High
UVLO, SCP, OLP, OTP and Open loop protections are auto restart
Figure 11: Control Flow Chart
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
Figure 12: Signal Evolution in the Presence of a Fault
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MP174 – NON-ISOLATED OFF-LINE REGULATOR
PACKAGE INFORMATION
TSOT23-5
0.95
BSC
0.60
TYP
2.80
3.00
5
4
1.20
TYP
1.50
1.70
1
2.60
TYP
2.60
3.00
3
TOP VIEW
RECOMMENDED LAND PATTERN
0.70
0.90
1.00 MAX
0.09
0.20
SEATING PLANE
0.30
0.50
0.95 BSC
0.00
0.10
SEE DETAIL "A"
FRONT VIEW
SIDE VIEW
NOTE:
GAUGE PLANE
0.25 BSC
0.30
0.50
0o-8o
DETAIL
MP174 Rev. 1.01
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A
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.10 MILLIMETERS MAX.
5) DRAWING CONFORMS TO JEDEC MO-193, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
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MP174 –NON-ISOLATED OFF-LINE REGULATOR
PACKAGE INFORMATION
SOIC8
0.189(4.80)
0.197(5.00)
8
0.050(1.27)
0.024(0.61)
5
0.063(1.60)
0.150(3.80)
0.157(4.00)
PIN 1 ID
1
0.228(5.80)
0.244(6.20)
0.213(5.40)
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
SEATING PLANE
0.004(0.10)
0.010(0.25)
0.013(0.33)
0.020(0.51)
0.0075(0.19)
0.0098(0.25)
SEE DETAIL "A"
0.050(1.27)
BSC
SIDE VIEW
FRONT VIEW
0.010(0.25)
x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0o-8o
0.016(0.41)
0.050(1.27)
DETAIL "A"
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH
,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP174 Rev. 1.01
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