MPS MP2235SGJ High-efficiency, 3 a, 16 v, 800 khz synchronous step-down converter Datasheet

MP2235S
High-Efficiency, 3 A, 16 V, 800 kHz
Synchronous Step-Down Converter
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The
MP2235S
is
a
high-frequency,
synchronous, rectified, step-down, switch-mode
converter with built-in power MOSFETs. It
offers a compact solution to achieve a 3 A
continuous output current with excellent load
and line regulation over a wide input supply
range. The MP2235S has synchronous mode
operation for higher efficiency over the output
current load range.
•
•
Current mode operation provides fast transient
response and eases loop stabilization.
Full protection features include over-current
protection (OCP) and thermal shutdown (TSD).
The MP2235S requires a minimal number of
readily
available,
standard,
external
components and is available in a space-saving
8-pin TSOT23 package.
•
•
•
•
•
•
•
•
•
Wide 4.5 V to 16 V Operating Input Range
120 mΩ/50 mΩ Low RDS(ON) Internal Power
MOSFETs
High-Efficiency Synchronous Mode
Operation
Fixed 800 kHz Switching Frequency
Synchronizes from a 300 kHz to a 2 MHz
External Clock
Power-Save Mode at Light Load
External Soft-Start
Over-Current Protection and Hiccup
Thermal Shutdown
Output Adjustable from 0.804 V
Available in a 8-pin TSOT-23 Package
APPLICATIONS
•
•
•
•
Notebook Systems and I/O Power
Digital Set-Top Boxes
Flat-Panel Televisions and Monitors
Distributed Power Systems
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under Quality
Assurance.
“MPS” and “The Future of Analog IC Technology” are registered
trademarks of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
100
95
90
85
80
75
VIN=16V
VIN=12V
VIN=5V
70
65
60
55
50
0.0
MP2235S Rev.1.0
4/15/2015
0.5 1.0 1.5 2.0 2.5
LOAD CURRENT(A)
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3.0
1
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
MP2235SGJ
Package
TSOT23-8
Top Marking
See Below
* For Tape & Reel, add suffix –Z (e.g. MP2235SGJ–Z)
TOP MARKING
AQA: Product code of MP2235SGJ
Y: Year code
PACKAGE REFERENCE
MP2235S Rev.1.0
4/15/2015
1
8
2
7
3
6
4
5
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2
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
VIN ................................................-0.3 V to 17 V
VSW.........-0.3 V (-5 V for <10 ns) to 17 V (19 V for < 10 ns)
VBST ..................................................... VSW + 6 V
All other pins ............................... -0.3 V to 6 V (2)
(3)
Continuous power dissipation (TA = +25°C)
.......................................................... 1.25 W
Junction temperature ................................150°C
Lead temperature .....................................260°C
Storage temperature .................. -65°C to 150°C
TSOT23-8.............................. 100 ..... 55... °C/W
Recommended Operating Conditions
(4)
Supply voltage (VIN) .......................4.5 V to 16 V
Output voltage (VOUT).........0.804 V to VIN x DMAX
Operating junction temp. (TJ). .. -40°C to +125°C
MP2235S Rev.1.0
4/15/2015
(5)
θJA
θJC
NOTES:
1) Exceeding these ratings may damage the device.
2) For additional details on the absolute maximum rating of EN,
please refer to the “Enable/SYNC Control” section on page
12.
3) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation produces an excessive die temperature, causing
the regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
4) The device is not guaranteed to function outside of its
operating conditions.
5) Measured on JESD51-7, 4-layer PCB.
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3
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12 V, TJ = -40°C to + 125°C(6), typical value is tested at TJ = +25°C, unless otherwise noted.
Parameter
Symbol
Condition
Min
Typ
Max
Units
VEN = 0 V, TJ= + 25°C
1
μA
Supply current (shutdown)
IIN
VEN = 0 V,
TJ = -40°C to + 125°C
5
μA
Supply current (quiescent)
Iq
VEN = 2 V, VFB = 1 V
0.5
1
mA
HS switch on resistance
HSRDS-ON
VBST-SW = 5 V
120
mΩ
LS switch on resistance
LSRDS-ON
VCC = 5 V
50
mΩ
Switch leakage
SWLKG
Current limit
ILIMIT
VEN = 0 V, VSW = 12 V or 0 V
Under 40% duty cycle
VFB = 0.75 V,TJ = + 25°C
Oscillator frequency
fSW
Foldback frequency
fFB
Maximum duty cycle
DMAX
Minimum on time
(7)
VFB = 0.75 V,
TJ = -40°C to +125°C
VFB < 400 mV
1
4
5
620
800
900
kHz
550
800
900
kHz
VFB = 700 mV
τON_MIN
Sync frequency range
fSYNC
Feedback voltage
VFB
Feedback current
IFB
EN rising threshold
IEN
EN turn-off delay
ENtd-off
VIN under-voltage lockout
threshold—rising
INUVVth
VIN under-voltage lockout
threshold—hysteresis
INUVHYS
VCC regulator
Soft-start current
Thermal shutdown
92
%
40
ns
2
MHz
788
804
820
mV
TJ = -40°C to +125°C
784
804
824
mV
10
50
nA
1.4
1.8
V
VFB = 830 mV
1
150
mV
VEN = 2 V
2
μA
VEN = 0 V
0
μA
10
μs
3.5
3.9
4.3
700
VCC
VCC load regulation
fSW
TJ = 25°C
VEN_Hysteresis
EN input current
A
0.5
0.3
VEN_RISING
EN hysteresis
μA
4.6
ICC = 5 mA
ISS
(7)
Thermal hysteresis (7)
5
mV
5.4
2
8
11
V
V
%
14
μA
150
°C
20
°C
NOTES:
6) Not tested in production. Guaranteed by over-temperature correlation.
7) Guaranteed by design.
MP2235S Rev.1.0
4/15/2015
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4
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS
Performance waveforms are tested on the evaluation board of the design example section.
VIN = 12 V, VOUT = 3.3 V, L = 3.3 μH, TA = 25°C, unless otherwise noted.
0.8
LOAD REGULATION(%)
0.6
6.0
0.6
0.4
5.5
0.4
0.2
0.2
5.0
0
0
4.5
-0.2
-0.2
4.0
-0.4
-0.4
-0.6
0
3.5
-0.6
0.5
1
1.5
2
2.5
3
-0.8
6
7
8
9 10 11 12 13 14 15 16
3.0
0 10 20 30 40 50 60 70 80
530
30
900
510
25
850
20
800
15
750
10
700
5
650
490
470
450
430
4
6
8
10
12
14
16
18
0
4
6
8
10
12
14
16
18
600
-40 -20 0 20 40 60 80 100 120 140
FB Voltage vs. Temperature
820
815
810
805
800
795
790
785
780
-40 -20 0 20 40 60 80 100 120 140
MP2235S Rev.1.0
4/15/2015
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5
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
Performance waveforms are tested on the evaluation board of the design example section.
VIN = 12 V, VOUT = 3.3 V, L = 3.3 μH, TA = 25°C, unless otherwise noted.
100
95
90
85
80
75
70
65
60
55
50
45
0.0
100
100
VIN=5V
95
VIN=5V
90
90
85
85
80
VIN=12V
VIN=16V
VIN=12V
75
0.5 1.0 1.5 2.0 2.5
LOAD CURRENT(A)
3.0
VIN=12V
75
70
65
65
60
60
55
55
0.5 1.0 1.5 2.0 2.5
LOAD CURRENT(A)
VIN=16V
80
VIN=16V
70
50
0.0
VIN=5V
95
3.0
50
0.0
0.5 1.0 1.5 2.0 2.5
LOAD CURRENT(A)
3.0
Case Temperature Rise
vs. Load Current
100
100
45
95
95
40
90
90
VIN=16V
85
80
75
35
85
VIN=12V
80
VIN=5V
VIN=12V
30
VIN=7V
25
75
VIN=16V
70
65
65
60
60
10
55
55
5
60
0.5 1.0 1.5 2.0 2.5
LOAD CURRENT(A)
3.0
50
0.0
0.5 1.0 1.5 2.0 2.5
LOAD CURRENT(A)
3.0
Case Temperature Rise
vs. Load Current
VIN=12V, 2 Layers PCB,
Size: 6.35cm x 4.83cm
VIN=16V, 2 Layers PCB,
Size: 6.35cm x 4.83cm
1.0
1.5
2.0
2.5
LOAD CURRENT (A)
3.0
60
VOUT=5V
40
50
40
VOUT=3.3V
VOUT=5V
VOUT=3.3V
30
20
20
10
0.5
0
0.5
70
50
0
15
Case Temperature Rise
vs. Load Current
30
VOUT=1.2V
20
70
50
0.0
VIN=5V, 2 Layers PCB,
Size: 6.35cm x 4.83cm
VOUT=1.2V
1.0
1.5
2.0
2.5
LOAD CURRENT (A)
MP2235S Rev.1.0
4/15/2015
10
3.0
0
0.5
VOUT=1.2V
1.0
1.5
2.0
2.5
LOAD CURRENT (A)
3.0
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6
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are tested on the evaluation board of the design example section.
VIN = 12 V, VOUT = 3.3 V, L = 3.3 μH, TA = 25°C, unless otherwise noted.
VOUT
2V/div.
VOUT
2V/div.
VOUT
2V/div.
VIN
10V/div.
VSW
10V/div.
VIN
10V/div.
VSW
10V/div.
VEN
5V/div.
VSW
10V/div.
IINDUCTOR
5A/div.
IINDUCTOR
5A/div.
IINDUCTOR
2A/div.
VOUT
2V/div.
VOUT
2V/div.
VOUT
2V/div.
VEN
5V/div.
VSW
10V/div.
VEN
5V/div.
VSW
10V/div.
VEN
5V/div.
VSW
10V/div.
IINDUCTOR
2A/div.
IINDUCTOR
2A/div.
IINDUCTOR
2A/div.
VOUT
2V/div.
VOUT
2V/div.
VOUT
2V/div.
VIN
5V/div.
VSW
5V/div.
VIN
5V/div.
VSW
5V/div.
VIN
5V/div.
VSW
5V/div.
IINDUCTOR
2A/div.
IINDUCTOR
2A/div.
IINDUCTOR
2A/div.
MP2235S Rev.1.0
4/15/2015
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7
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are tested on the evaluation board of the design example section.
VIN = 12 V, VOUT = 3.3 V, L = 3.3 μH, TA = 25°C, unless otherwise noted.
VOUT
2V/div.
VIN
5V/div.
VSW
5V/div.
IINDUCTOR
2A/div.
MP2235S Rev.1.0
4/15/2015
VOUT/AC
10mV/div.
VOUT/AC
50mV/div.
VIN/AC
200mV/div.
VSW
10V/div.
IINDUCTOR
2A/div.
IOUT
1A/div.
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8
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
PIN FUNCTIONS
Package
Pin #
1
2
3
4
5
6
7
8
Name
Description
Soft start. Connect an external capacitor to program the soft-start time for the switch
mode regulator.
Supply voltage. IN supplies power for the internal MOSFET and regulator. The MP2235S
operates from a +4.5 V to +16 V input rail. IN requires a low ESR and low-inductance
IN
capacitor (C1) to decouple the input rail. Place the input capacitor very close to IN and
connect it with wide PCB traces and multiple vias.
Switch output. Connect SW to the inductor and bootstrap capacitor. SW is driven up to
VIN by the high-side switch during the PWM duty cycle on time. The inductor current drives
SW
SW negative during the off time. The on resistance of the low-side switch and the internal
body diode fixes the negative voltage. Connect SW using wide PCB traces and multiple
vias.
System ground. GND is the reference ground of the regulated output voltage. PCB layout
GND
requires extra care. For best results, connect to GND with copper and vias.
Bootstrap. Requires a capacitor connected between SW and BST to form a floating
BST
supply across the high-side switch driver.
Enable. EN=high to enable the MP2235S. Apply an external clock to change the switching
EN/SYNC
frequency. For automatic start-up, connect EN to VIN with a 100 kΩ resistor.
Internal 5 V LDO output. VCC powers the driver and control circuits. Decouple with a
VCC
0.1 μF to 0.22 μF capacitor. Do NOT use a capacitor ≥0.22 μF.
Feedback. Connect FB to the tap of an external resistor divider from the output to GND to
set the output voltage. The frequency foldback comparator lowers the oscillator frequency
FB
when the FB voltage is below 400 mV to prevent current limit runaway during a shortcircuit fault. Place the resistor divider as close to FB as possible. Avoid placing vias on the
FB traces.
MP2235S Rev.1.0
4/15/2015
SS
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9
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
FUNCTIONAL BLOCK DIAGRAM
-
Figure 1—Functional block diagram
MP2235S Rev.1.0
4/15/2015
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10
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
OPERATION
The
MP2235S
is
a
high-frequency,
synchronous, rectified, step-down, switch-mode
converter with built-in power MOSFETs. It
offers a compact solution that achieves a 3 A
continuous output current with excellent load
and line regulation over a 4.5 V to 16 V input
supply range.
The MP2235S has three working modes:
advanced asynchronous modulation (AAM)
mode, discontinuous conduction mode (DCM),
and continuous conduction mode (CCM). The
load current increases as the device transitions
from AAM mode to DCM to CCM.
AAM Control Operation
In a light-load condition, the MP2235S works in
advanced asynchronous modulation (AAM)
mode (see Figure 2). The VAAM is an internal
fixed voltage when the input and output
voltages are fixed. VCOMP is the error-amplifier
output (which represents the peak inductorcurrent information). When VCOMP is lower than
VAAM, the internal clock is blocked. This causes
the MP2235S to skip pulses, achieving the
light-load power save. Refer to AN032 for
additional details.
The internal clock re-sets every time VCOMP is
higher than VAAM. Simultaneously, the high-side
MOSFET (HS-FET) turns on and remains on
until VILsense reaches the value set by VCOMP.
The light-load feature in this device is optimized
for 12 V input applications.
Figure 2—Simplified AAM control logic
DCM Control Operation
The VCOMP ramps up as the output current
increases. When its minimum value exceeds
VAAM, the device enters discontinuous
conduction mode (DCM). In DCM, the internal
MP2235S Rev.1.0
4/15/2015
clock initiates the PWM cycle, the HS-FET turns
on and remains on until VILsense reaches the
value set by VCOMP (after a period of dead time),
and the low-side MOSFET (LS-FET) turns on
and remains on until the inductor-current value
decreases to zero. The device repeats the
same operation in every clock cycle to regulate
the output voltage (see Figure 3).
IL
Figure 3—DCM control operation
CCM Control Operation
The device enters continuous conduction mode
(CCM) from DCM once the inductor current no
longer drops to zero in a clock cycle. In CCM,
the internal clock initiates the PWM cycle, the
HS-FET turns on and remains on until VILsense
reaches the value set by VCOMP (after a period
of dead time), and the LS-FET turns on and
remains on until the next clock cycle begins.
The device repeats the same operation in every
clock cycle to regulate the output voltage.
If VILsense does not reach the value set by VCOMP
within 92 percent of one PWM period, the HSFET is forced off.
Internal Regulator
A 5 V internal regulator powers most of the
internal circuitries. This regulator takes VIN and
operates in the full VIN range. When VIN
exceeds 5 V, the output of the regulator is in full
regulation. When VIN is less than 5 V, the output
decreases, and the part requires a 0.1 µF
ceramic decoupling capacitor.
Error Amplifier (EA)
The error amplifier compares the FB voltage to
the internal 0.804 V reference (VREF) and
outputs a current proportional to the difference
between the two. This output current then
charges
or
discharges
the
internal
compensation network to form the COMP
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11
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
voltage, which controls the power MOSFET
current. The optimized internal compensation
network minimizes the external component
count and simplifies the control loop design.
Enable/SYNC Control
EN/SYNC is a digital control pin that turns the
regulator on and off. Drive EN high to turn on
the regulator, drive EN low to turn off the
regulator. An internal 1 MΩ resistor from
EN/SYNC to GND allows EN/SYNC to be
floated to shut down the chip. EN/SYNC is
clamped internally using a 6.5 V Zener diode
(see Figure 4). Connecting the EN input pin
through a pull-up resistor to the voltage on IN
limits the EN input current to less than 100 µA.
For example, with 12 V connected to IN,
RPULLUP ≥ (12 V – 6.5 V) ÷ 100 µA = 55 kΩ.
Connecting EN directly to a voltage source
without a pull-up resistor requires limiting the
amplitude of the voltage source to ≤6 V to
prevent damage to the Zener diode (see Figure
4).
1M
Figure 4—6.5 V Zener diode connection
For external clock synchronization, connect a
clock with a frequency range between 300 kHz
and 2 MHz 2 ms after the output voltage is set:
The internal clock rising edge synchronizes with
the external clock rising edge. Select an
external clock signal with a pulse width less
than 1 μs.
Under-Voltage Lockout (UVLO)
The MP2235S has under-voltage lockout
protection (UVLO). When the VCC voltage
exceeds the UVLO rising threshold voltage, the
device begins to power-up. It shuts off when
the VCC voltage drops below the UVLO falling
threshold voltage. This is non-latch protection.
The MP2235S is disabled when the input
voltage falls below 3.2 V, typically. If an
application requires a higher under-voltage
lockout (UVLO) threshold, use EN to adjust the
MP2235S Rev.1.0
4/15/2015
input voltage UVLO by using two external
resistors (see Figure 5). For best results, set
the UVLO falling threshold (VSTOP) above
4.5 V using the enable resistors. Set the rising
threshold (VSTART) to provide enough
hysteresis to allow for input-supply variations.
RENUP
RENDOWN
Figure 5—Adjustable UVLO
Soft-Start (SS)
Adjust the soft-start time by connecting a
capacitor from SS to ground. When the softstart begins, an internal 11 µA current source
charges the external capacitor. The soft-start
capacitor connects to the non-inverting input of
the error amplifier. The soft-start period
continues until the voltage on the soft-start
capacitor exceeds the 0.804 V reference. Then
the non-inverting amplifier takes the reference
voltage as the input. Use Equation (1) to
calculate the soft-start time:
t SS (ms) =
0.804V × Css(nF)
11μA
(1)
Over-Current-Protection (OCP) and Hiccup
The MP2235S has a cycle-by-cycle overcurrent limit when the inductor current peak
value exceeds the set current limit threshold.
Meanwhile, the output voltage drops until VFB is
below the under-voltage (UV) threshold (50
percent below the reference, typically). Once
UV is triggered, the MP2235S enters hiccup
mode to re-start the part periodically. This
protection mode is useful when the output is
dead shorted to ground, greatly reducing the
average short-circuit current to alleviate thermal
issues and protect the regulator. The MP2235S
exits hiccup mode once the over-current
condition is removed.
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12
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
Thermal Shutdown
Thermal shutdown prevents the chip from
operating at exceedingly high temperatures.
When the die temperature exceeds 150°C, the
entire chip shuts down. When the temperature
drops below its lower threshold (130°C,
typically), the chip is enabled again.
Floating Driver and Bootstrap Charging
An external bootstrap capacitor powers the
floating power MOSFET driver. This floating
driver has its own UVLO protection. This
UVLO’s rising threshold is 2.2 V with a
hysteresis of 150 mV. The bootstrap capacitor
voltage is regulated internally by VIN through D1,
M1, R3, C4, L1, and C2 (see Figure 6). If VINVSW exceeds 5 V, U1 regulates M1 to maintain
a 5 V BST voltage across C4. A 20 Ω resistor
placed between the SW and BST capacitors is
strongly recommended to reduce SW spike
voltage.
Start-Up and Shutdown
If both VIN and VEN exceed their respective
thresholds, the chip starts up. The reference
block starts first, generating stable reference
voltage and currents, and then the internal
regulator is enabled. The regulator provides a
stable supply for the remaining circuitries.
Three events can shut down the chip: VEN low,
VIN low, and thermal shutdown. During the
shutdown procedure, the signal path is blocked
first to avoid any fault triggering. The COMP
voltage and the internal supply rail are then
pulled down. The floating driver is not subject to
this shutdown command.
D1
VIN
M1
5V
U1
BST
R3
C4
VOUT
SW
L1
C2
Figure 6—Internal bootstrap charging circuit
MP2235S Rev.1.0
4/15/2015
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13
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider sets the output
voltage (see Typical Application on page 1).
Choose R1 around 40 kΩ for VOUT > 1.2 V, R2 is
then given using Equation (2):
R1
R2 =
(2)
VOUT
−1
0.804V
The T-type network is highly recommended
(see Figure 7).
Figure 7—T-type network
Table 1 lists the recommended resistor and
compensation values for common output
voltages.
Table 1—Resistor selection for common output
voltages(8)
VOUT
R1 (kΩ) R2 (kΩ) Rt (kΩ)
(V)
1
20.5
84.5
34
1.2
30.1
61.9
24
1.8
40.2
32.4
15
2.5
40.2
19.1
6.8
3.3
40.2
13
5.6
5
40.2
7.68
2
NOTES:
8) The recommended parameters are based on an 800 kHz
switching frequency; a different input voltage, output inductor
value, and output capacitor value may affect the selection of
R1, R2, and Rt. For additional component parameters, please
refer to the “Typical Application Circuits” section on page 17
and page 18.
Selecting the Inductor
Use an inductor (1 µH to 22 µH) with a DC
current rating at least 25 percent higher than
the maximum load current for most applications.
For highest efficiency, use an inductor with a
DC resistance less than 15 mΩ. For most
designs, the inductance value can be derived
from Equation (3):
MP2235S Rev.1.0
4/15/2015
L1 =
VOUT × (VIN − VOUT )
VIN × ΔIL × fOSC
(3)
Where ΔIL is the inductor ripple current.
Choose the inductor ripple current to be
approximately 30 percent of the maximum load
current. The maximum inductor peak current is
calculated using Equation (4):
IL(MAX) = ILOAD +
ΔIL
2
(4)
Use a larger inductor for improved efficiency
under light-load conditions—below 100 mA.
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous, therefore it requires a capacitor
to supply the AC current to the step-down
converter while maintaining the DC input
voltage. Use low ESR capacitors for the best
performance. Use ceramic capacitors with X5R
or X7R dielectrics for best results because of
their low ESR and small temperature
coefficients. For most applications, use a 22 µF
capacitor.
Since C1 absorbs the input switching current, it
requires an adequate ripple current rating. The
RMS current in the input capacitor can be
estimated using Equation (5) and Equation (6):
I C1 = ILOAD ×
VOUT ⎛⎜ VOUT
× 1−
VIN ⎜⎝
VIN
⎞
⎟
⎟
⎠
(5)
The worst case condition occurs at VIN = 2VOUT,
where:
IC1 =
ILOAD
2
(6)
For simplification, choose an input capacitor
with an RMS current rating greater than half of
the maximum load current.
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, add a small, high-quality ceramic
capacitor (e.g. 0.1 μF) placed as close to the IC
as possible. When using ceramic capacitors,
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MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
make sure that they have enough capacitance
to provide sufficient charge in order to prevent
excessive voltage ripple at the input. The input
voltage ripple caused by capacitance can be
estimated using Equation (7):
ΔVIN =
⎛
⎞
ILOAD
V
V
× OUT × ⎜ 1 − OUT ⎟
fS × C1 VIN ⎝
VIN ⎠
(7)
Selecting the Output Capacitor
The output capacitor (C2) maintains the DC
output voltage. Use ceramic, tantalum, or low
ESR electrolytic capacitors. For best results,
use low ESR capacitors to keep the output
voltage ripple low. The output voltage ripple can
be estimated with Equation (8):
ΔVOUT =
⎞
VOUT ⎛ VOUT ⎞ ⎛
1
× ⎜1 −
⎟
⎟ × ⎜ RESR +
fS × L1 ⎝
VIN ⎠ ⎝
8 × fS × C2 ⎠
(8)
Where L1 is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency, and the capacitance causes the
majority of the output voltage ripple. For
simplification, the output voltage ripple can be
estimated with Equation (9):
ΔVOUT =
⎛ V ⎞
VOUT
× ⎜ 1 − OUT ⎟
VIN ⎠
8 × fS × L1 × C2 ⎝
2
(9)
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple
can be approximated with Equation (10):
ΔVOUT
V
V
⎛
= OUT × ⎜ 1 − OUT
fS × L1 ⎝
VIN
⎞
⎟ × RESR
⎠
External Bootstrap Diode
In particular conditions, the BST voltage may
become insufficient. During these conditions, an
external bootstrap diode can enhance the
efficiency of the regulator and avoid insufficient
BST voltage at light-load PFM operation.
Insufficient BST voltage is more likely to occur
during either of the following conditions:
MP2235S Rev.1.0
4/15/2015
VOUT is 5 V or 3.3 V; or
z
the duty cycle is high: D=
VOUT
>65%
VIN
If the BST voltage is insufficient, the output
ripple voltage may become extremely large
during a light-load condition. If this occurs, add
an external BST diode from VCC to BST (see
Figure 8).
MP2235S
Figure 8—Optional external bootstrap diode to
enhance efficiency
The recommended external BST diode is
IN4148, and the BST capacitor value is 0.1 µF
to 1 μF.
PCB Layout Guidelines (9)
Efficient PCB layout is critical to achieve stable
operation, especially for VCC capacitor and
input capacitor placement. For best results,
refer to Figure 9 and follow the guidelines below:
1.
Use a large ground plane directly
connected to GND. Add vias near GND if
the bottom layer is ground plane.
2.
Place the VCC capacitor as close as
possible to the chip VCC and GND. Make
the trace length of VCC pin to the VCC
capacitor anode to the VCC capacitor
cathode to the chip GND as short as
possible.
3.
Place the ceramic input capacitor close to
IN and GND. Keep the connection of the
input capacitor and IN as short and wide as
possible.
4.
Route SW and BST away from sensitive
analog areas such as FB.
5.
Place the T-type feedback resistor (R5)
close to the chip to ensure the trace (which
connects to FB) is as short as possible.
(10)
The characteristics of the output capacitor
affect the stability of the regulation system. The
MP2235S can be optimized for a wide range of
capacitance and ESR values.
z
NOTES:
9) The recommended layout is based on Figure 10 on page 17.
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5
6
7
R3
R5
8
R2
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
Design Example
Table 2 is a design example following the
application guidelines for the following
specifications:
4
3
2
1
C5
Table 2—Design example
VIN
VOUT
IOUT
Top Layer
12 V
3.3 V
3A
The detailed application schematic is shown in
Figure 11. The typical performance and circuit
waveforms have been shown in the “Typical
Performance Characteristics” section. For more
device applications, please refer to the related
evaluation board datasheets.
GND
EN/SYNC
BST
SW
Vout SenseGND
Bottom Layer
Figure 9—Recommended PCB layout
MP2235S Rev.1.0
4/15/2015
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16
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
Figure 10—12VIN, 5 V/3 A output
Figure 11—12VIN, 3.3 V/3 A output
Figure 12—12VIN, 2.5 V/3 A output
MP2235S Rev.1.0
4/15/2015
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MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
Figure 13—12VIN, 1.8 V/3 A output
Figure 14—12VIN, 1.2 V/3 A output
Figure 15—12VIN, 1 V/3 A output
MP2235S Rev.1.0
4/15/2015
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18
MP2235S –3 A, 16 V, 800 kHz SYNCHRONOUS STEP-DOWN CONVERTER
PACKAGE INFORMATION
TSOT23-8
See note 7
EXAMPLE
TOP MARK
PIN 1 ID
IAAAA
RECOMMENDED LAND PATTERN
TOP VIEW
SEATING PLANE
SEE DETAIL ''A''
FRONT VIEW
SIDE VIEW
NOTE:
DETAIL ''A''
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS
AFTER FORMING) SHALL BE 0.10 MILLIMETERS
MAX.
5) JEDEC REFERENCE IS MO-193, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP
MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP
MARK)
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP2235S Rev.1.0
4/15/2015
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19