Spec. No. : C584J3 Issued Date : 2014.07.20 Revised Date : Page No. : 1/9 CYStech Electronics Corp. P-Channel Logic Level Enhancement Mode Power MOSFET MTB12P06J3 BVDSS ID RDS(ON)@VGS=-10V, ID=-20A RDS(ON)@VGS=-4.5V, ID=-20A -60V -70A 10.2mΩ(typ) 11.9mΩ(typ) Features • Low Gate Charge • Simple Drive Requirement • Pb-free lead plating & Halogen-free package Equivalent Circuit Outline MTB12P06J3 TO-252(DPAK) G G：Gate D：Drain S：Source D S Ordering Information Device MTB12P06J3-0-T3-G Package TO-252 (Pb-free lead plating & halogen-free package) Shipping 2500 pcs / Tape & Reel Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T3 : 2500 pcs / tape & reel, 13” reel Product rank, zero for no rank products Product name MTB12P06J3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C584J3 Issued Date : 2014.07.20 Revised Date : Page No. : 2/9 Absolute Maximum Ratings (TC=25°C, unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current @TC=25°C, VGS=10V Continuous Drain Current @TC=100°C, VGS=10V Continuous Drain Current @TA=25°C, VGS=10V Continuous Drain Current @TA=70°C, VGS=10V Pulsed Drain Current Avalanche Current Avalanche Energy @ L=0.1mH, ID=-50A, RG=25Ω Repetitive Avalanche Energy @ L=0.05mH TC=25°C TC=100°C Total Power Dissipation TA=25°C TA=70°C Operating Junction and Storage Temperature Range (Note 1) (Note 1) (Note 2) (Note 2) (Note 3) (Note 3) (Note 2) (Note 3) (Note 1) (Note 1) (Note 2) (Note 2) Symbol Limits VDS VGS -60 ±20 -70 -49 -10.8 -8.6 -280 -50 125 12.5 125 62.5 2.5 1.6 -55~+175 ID IDSM IDM IAS EAS EAR PD PDSM Tj, Tstg Unit V A mJ W °C Thermal Data Parameter Thermal Resistance, Junction-to-case, max Thermal Resistance, Junction-to-ambient, max Thermal Resistance, Junction-to-ambient, max Symbol RθJC (Note 2) (Note 4) RθJA Value 1.2 50 110 Unit °C/W Note : 1.The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. 2. The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment with TA=25°C. The power dissipation PDSM is based on RθJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user’s specific board design. 3. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. Ratings are based on low frequency and low duty cycles to keep initial TJ=25°C. 4. When mounted on the minimum pad size recommended (PCB mount), t≤10s. MTB12P06J3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C584J3 Issued Date : 2014.07.20 Revised Date : Page No. : 3/9 Characteristics (Tc=25°C, unless otherwise specified) Symbol Static BVDSS VGS(th) IGSS IDSS RDS(ON) *1 Min. Typ. Max. -60 -0.8 - 10.2 11.9 54 -2.5 ±100 -1 -25 13.5 16 - GFS *1 Dynamic Qg *1, 2 126 Qgs *1, 2 18 Qgd *1, 2 22.6 td(ON) *1, 2 20 tr 30 *1, 2 td(OFF) *1, 2 159 tf *1, 2 50 Ciss 6896 Coss 361 Crss 263 Rg 4.4 Source-Drain Diode Ratings and Characteristics VSD *1 -0.64 -1 trr 15.5 Qrr 8.1 - Unit Test Conditions S VGS=0V, ID=-250μA VDS =VGS, ID=-250μA VGS=±20V, VDS=0V VDS =-48V, VGS =0V VDS =-48V, VGS =0V, TJ=125°C VGS =-10V, ID=-20A VGS =-4.5V, ID=-20A VDS =-5V, ID=-20A nC ID=-50A, VDS=-30V, VGS=-10V ns VDS=-30V, ID=-50A, VGS=-10V, RG=6Ω pF VGS=0V, VDS=-30V, f=1MHz Ω VDS=0V, f=1MHz V ns nC IS=-1A, VGS=0V V nA μA mΩ IF=-50A, dIF/dt=100A/μs Note : *1.Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2% *2.Independent of operating temperature *3.Pulse width limited by maximum junction temperature. Recommended soldering footprint MTB12P06J3 CYStek Product Specification Spec. No. : C584J3 Issued Date : 2014.07.20 Revised Date : Page No. : 4/9 CYStech Electronics Corp. Typical Characteristics Brekdown Voltage vs Ambient Temperature Typical Output Characteristics 1.4 200 4V 3.5V -BVDSS, Normalized Drain-Source Breakdown Voltage 180 -I D, Drain Current(A) 160 10V,9V,8V,7V,6V,5V 140 120 -VGS=3V 100 80 60 -VGS=2.5V 40 1.2 1 0.8 0.6 ID=-250μA, VGS=0V 20 0.4 0 0 2 4 6 8 -VDS, Drain-Source Voltage(V) -75 -50 -25 10 Reverse Drain Current vs Source-Drain Voltage Static Drain-Source On-State resistance vs Drain Current 1.2 In descending order VGS=-2V -2.5V -3V -4.5V -10V 90 80 70 60 50 -VSD, Source-Drain Voltage(V) RDS(ON), Static Drain-Source On-State Resistance(mΩ) 100 40 30 20 VGS=0V 1 Tj=25°C 0.8 0.6 Tj=150°C 0.4 10 0.2 0 0.01 0.1 1 10 -ID, Drain Current(A) 0 100 2 4 6 8 -IDR , Reverse Drain Current(A) 10 Drain-Source On-State Resistance vs Junction Tempearture Static Drain-Source On-State Resistance vs Gate-Source Voltage 2.4 90 R DS(ON) , Normalized Static DrainSource On-State Resistance 100 R DS(ON), Static Drain-Source OnState Resistance(mΩ) 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) ID=-20A 80 70 60 50 40 30 20 10 VGS=-10V, ID=-20A 2 1.6 1.2 0.8 RDS(ON) @Tj=25°C : 10.2mΩ typ 0.4 0 0 MTB12P06J3 2 4 6 8 -VGS, Gate-Source Voltage(V) 10 -75 -50 -25 0 25 50 75 100 125 150 175 200 Tj, Junction Temperature(°C) CYStek Product Specification CYStech Electronics Corp. Spec. No. : C584J3 Issued Date : 2014.07.20 Revised Date : Page No. : 5/9 Typical Characteristics (Cont.) Threshold Voltage vs Junction Tempearture Capacitance vs Drain-to-Source Voltage -VGS(th), Normalized Threshold Voltage 10000 Capacitance---(pF) Ciss 1000 C oss Crss f=1MHz 1.4 1.2 ID=-1mA 1 0.8 0.6 ID=-250μA 0.4 0.2 100 0 -75 -50 -25 30 10 20 -VDS, Drain-Source Voltage(V) 75 100 125 150 175 200 Gate Charge Characteristics 10 1000 100μ s RDS(ON) Limited 100 -VGS, Gate-Source Voltage(V) -I D, Drain Current (A) 25 50 Tj, Junction Temperature(°C) Maximum Safe Operating Area 1ms 10ms 100ms 1s 10 DC 1 TC=25°C, Tj=175°C, VGS=-10V, RθJC=1.2°C/W, single pulse 0.1 8 6 4 VDS=-30V ID=-50A 2 0 0.01 0.1 1 10 100 -VDS, Drain-Source Voltage(V) 0 1000 20 40 60 80 100 Qg, Total Gate Charge(nC) 120 140 Forward Transfer Admittance vs Drain Current Maximum Drain Current vs Case Temperature 100 GFS , Forward Transfer Admittance(S) 80 -I D, Maximum Drain Current(A) 0 70 60 50 40 30 20 VGS=-10V, Tj(max)=175°C, RθJC=1.2°C/W, single pulse 10 0 25 MTB12P06J3 50 75 100 125 150 TC , Case Temperature(°C) 175 200 10 1 VDS=-5V Pulsed Ta=25°C 0.1 0.01 0.001 0.01 0.1 1 -ID, Drain Current(A) 10 100 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C584J3 Issued Date : 2014.07.20 Revised Date : Page No. : 6/9 Typical Characteristics (Cont.) Power Derating Curve Typical Transfer Characteristics 140 200 VDS=-10V PD, Power Dissipation(W) 120 -ID, Drain Current(A) 160 120 80 40 100 80 60 40 20 0 0 0 1 2 3 4 -VGS, Gate-Source Voltage(V) 5 0 25 50 75 100 125 150 TC, Case Temperature(℃) 175 200 Transient Thermal Response Curves 1 r(t), Normalized Effective Transient Thermal Resistance D=0.5 0.1 0.2 1.RθJC(t)=r(t)*RθJC 2.Duty Factor, D=t1/t2 3.TJM-TC=PDM*Rθ JC(t) 4.RθJC=1.2°C/W 0.1 0.05 0.02 0.01 0.01 Single Pulse 0.001 1.E-04 MTB12P06J3 1.E-03 1.E-02 1.E-01 1.E+00 t1, Square Wave Pulse Duration(s) 1.E+01 1.E+02 1.E+03 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C584J3 Issued Date : 2014.07.20 Revised Date : Page No. : 7/9 Reel Dimension Carrier Tape Dimension MTB12P06J3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C584J3 Issued Date : 2014.07.20 Revised Date : Page No. : 8/9 Recommended wave soldering condition Product Peak Temperature Soldering Time Pb-free devices 260 +0/-5 °C 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Sn-Pb eutectic Assembly Average ramp-up rate 3°C/second max. (Tsmax to Tp) Preheat 100°C −Temperature Min(TS min) −Temperature Max(TS max) 150°C −Time(ts min to ts max) 60-120 seconds Time maintained above: −Temperature (TL) 183°C − Time (tL) 60-150 seconds Peak Temperature(TP) 240 +0/-5 °C Time within 5°C of actual peak 10-30 seconds temperature(tp) Ramp down rate 6°C/second max. 6 minutes max. Time 25 °C to peak temperature Pb-free Assembly 3°C/second max. 150°C 200°C 60-180 seconds 217°C 60-150 seconds 260 +0/-5 °C 20-40 seconds 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. MTB12P06J3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C584J3 Issued Date : 2014.07.20 Revised Date : Page No. : 9/9 TO-252 Dimension Marking: 4 Device Name B12 P06 Date Code □□□□ 1 3-Lead TO-252 Plastic Surface Mount Package CYStek Package Code: J3 Inches Min. Max. 0.087 0.094 0.000 0.005 0.039 0.048 0.026 0.034 0.026 0.034 0.018 0.023 0.018 0.023 0.256 0.264 0.201 0.215 0.236 0.244 DIM A A1 B b b1 C C1 D D1 E Millimeters Min. Max. 2.200 2.400 0.000 0.127 0.990 1.210 0.660 0.860 0.660 0.860 0.460 0.580 0.460 0.580 6.500 6.700 5.100 5.460 6.000 6.200 2 3 Style: Pin 1.Gate 2.Drain 3.Source 4.Drain DIM e e1 H K L L1 L2 L3 P V Inches Min. Max. 0.086 0.094 0.172 0.188 0.163 REF 0.190 REF 0.386 0.409 0.114 REF 0.055 0.067 0.024 0.039 0.026 REF 0.211 REF Millimeters Min. Max. 2.186 2.386 4.372 4.772 4.140 REF 4.830 REF 9.800 10.400 2.900 REF 1.400 1.700 0.600 1.000 0.650 REF 5.350 REF Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead : Pure tin plated. • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. MTB12P06J3 CYStek Product Specification