MP4559 1.5A, 2MHz, 55V Step-Down Converter The Future of Analog IC Technology DESCRIPTION FEATURES The MP4559 is a high frequency step-down switching regulator with integrated internal highside high voltage power MOSFET. It provides 1.5A output with current mode control for fast loop response and easy compensation. The wide 3.8V to 55V input range accommodates a variety of step-down applications, including those in automotive input environment. A 12µA shutdown mode supply current allows use in battery-powered applications. High power conversion efficiency over a wide load range is achieved by scaling down the switching frequency at light load condition to reduce the switching and gate driving losses. The frequency foldback helps prevent inductor current runaway during startup and thermal shutdown provides reliable, fault tolerant operation. By switching at 2MHz, the MP4559 is able to prevent EMI (Electromagnetic Interference) noise problems, such as those found in AM radio and ADSL applications. Wide 3.8V to 55V Operating Input Range 250mΩ Internal Power MOSFET Up to 2MHz Programmable Switching Frequency 140μA Quiescent Current Ceramic Capacitor Stable Internal Soft-Start Up to 95% Efficiency Output Adjustable from 0.8V to 52V Available in QFN (3mm x 3mm) and SOIC8E with Exposed Pad Packages APPLICATIONS High Voltage Power Conversion Automotive Systems Industrial Power Systems Distributed Power Systems Battery Powered Systems All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Products, Quality Assurance page. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. The MP4559 is available in small 3mm x 3mm QFN10 and SOIC8 with exposed pad packages. TYPICAL APPLICATION Efficiency @VOUT=3.3V fs=500kHz 100 Vin=12V 90 EFFICIENCY (%) 80 70 60 Vin=55V 50 40 30 20 10 0 0 0.5 1 1.5 OUTPUT CURRENT (A) MP4559 Rev. 1.01 12/23/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER ORDERING INFORMATION Part Number Package Top Marking MP4559DN* SOIC8E MP4559DN LLLLLLLL MPSYWW MP4559DQ** QFN10 (3X3mm) ADDY LLL * For Tape & Reel, add suffix –Z (e.g. MP4559DN–Z) For RoHS Compliant Packaging, add suffix –LF (e.g. MP4559DN–LF–Z) ** For Tape & Reel, add suffix –Z (e.g. MP4559DQ–Z) For RoHS Compliant Packaging, add suffix –LF (e.g. MP4559DQ–LF–Z) PACKAGE REFERENCE TOP VIEW TOP VIEW SW 1 10 BST SW 1 8 BST SW 2 9 VIN EN 2 7 VIN COMP 3 6 FREQ FB 4 5 GND EN 3 8 VIN COMP 4 7 FREQ FB 5 6 GND EXPOSED PAD EXPOSED PAD QFN10 SOIC8E ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance Supply Voltage (VIN).....................–0.3V to +60V Switch Voltage (VSW)............ –0.5V to VIN + 0.5V BST to SW .....................................–0.3V to +5V All Other Pins .................................–0.3V to +5V Continuous Power Dissipation (TA = +25°C) (2) SOIC8E……………………………………….2.5W QFN10 (3X3mm)…………………………….2.5W Junction Temperature ...............................150C Lead Temperature ....................................260C Storage Temperature.............. –65°C to +150C SOIC8E ...................................50 ...... 10 ... C/W QFN10 (3X3mm)………………50……12…C/W Recommended Operating Conditions (3) Supply Voltage VIN ...........................3.8V to 55V Output Voltage VOUT .........................0.8V to 52V Operating Junct. Temp (TJ)..... –40C to +125C MP4559 Rev. 1.01 12/23/2013 (4) θJA θJC Notes: 1) Exceeding these ratings may damage the device 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7 4-layer board. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 2 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER ELECTRICAL CHARACTERISTICS VIN = 12V, VEN = 2.5V, VCOMP = 1.4V, TJ= –40C to +85C. Typical Values are at TJ=25C, unless otherwise noted. Parameter Symbol Condition Feedback Voltage VFB Feedback Leakage Current IFB Upper Switch On Resistance (5) RDS(ON) Upper Switch Leakage ISW Current Limit ILIM COMP to Current Sense Transconductance Error Amp Voltage Gain Error Amp Transconductance Error Amp Min Source current Error Amp Min Sink current VEN = 0V, VSW = 0V TJ=25C Duty Cycle ≤ 60% 175 160 1.9 1.8 2.7 2.4 0V < VFB < 0.8V fSW Shutdown Supply Current IS Quiescent Supply Current IQ EN Rising Threshold TJ=25C ICOMP = ±3µA VFB = 0.7V VFB = 0.9V TJ=25C VIN UVLO Hysteresis Soft-Start Time (5) Thermal Shutdown Minimum Off Time Minimum On Time (5) VBST – VSW = 5V TJ=25C GCS VIN UVLO Threshold Oscillator Frequency 4.5V < VIN < 55V Min 0.780 0.772 RFREQ = 95kΩ TJ=25C 0.8 0.7 VEN < 0.3V No load, VFB = 0.9V (no switching) Hysteresis = 20C TOFF TON TJ=25C EN Threshold Hysteresis 1.4 1.3 Typ 0.800 0.1 250 1 2.3 Max 0.820 0.829 1.0 330 400 Units V μA mΩ μA 4.5 4.7 A 5.7 A/V 400 120 10 -10 3.0 3.0 0.35 0.5 1 V/V µA/V µA µA V 3.3 3.6 12 1.2 1.3 20 140 200 150 100 100 1.55 320 1.7 1.8 V ms MHz µA µA C ns ns V mV Note: 5) Derived from bench characterization. Not tested in production. MP4559 Rev. 1.01 12/23/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 3 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER PIN FUNCTIONS QFN Pin # SOIC8 Pin # 1, 2 1 3 2 4 3 5 4 6 5 7 6 8, 9 7 10 8 MP4559 Rev. 1.01 12/23/2013 Name Description Switch Node. Output from the high-side switch. A low VF Schottky rectifier to ground is required. The rectifier must be close to the SW pins to reduce switching spikes. Enable Input. Pull this pin below the specified threshold to shutdown the chip. Pull it EN up above the specified threshold or leaving it floating to enable the chip. Compensation. Output of the GM error amplifier. Control loop frequency COMP compensation is applied to this pin. Feedback. Input to the error amplifier. Sets the regulator voltage by comparing the FB tap of an external resistive divider connected between the output and GND to the internal +0.8V reference. GND, Ground. Connect as close as possible to the output capacitor and avoid the highExposed current switch paths. Connect exposed pad to GND plane for optimal thermal pad performance. Switching Frequency Program Input. Connect a resistor from this pin to ground to set FREQ the switching frequency. Input Supply. This supplies power to all the internal control circuitry, both BS VIN regulators, and the high-side switch. Place a decoupling capacitor to ground close to this pin to minimize switching spikes. Bootstrap. Positive power supply for the internal floating high-side MOSFET driver. BST Connect a bypass capacitor between this pin and SW pin. SW www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 12V, VOUT =3.3V, C1 = 4.7µF, C2 = 22µF, L1 = 10µH and TA = +25C, unless otherwise noted. MP4559 Rev. 1.01 12/23/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 5 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 12V, VOUT =3.3V, C1 = 4.7µF, C2 = 22µF, L1 = 10µH and TA = +25C, unless otherwise noted. MP4559 Rev. 1.01 12/23/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 6 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER BLOCK DIAGRAM VIN REFERENCE UVLO EN INTERNAL REGULATORS BST ISW 1.5ms SS -+ SS LOGIC SW FB SS 0V8 -- COMP + OSCILLATOR COMP GND FREQ Figure 1—Functional Block Diagram MP4559 Rev. 1.01 12/23/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 7 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER OPERATION The MP4559 is a programmable frequency, non-synchronous, step-down switching regulator with an integrated high-side high voltage power MOSFET. It provides a single highly efficient solution with current mode control for fast loop response and easy compensation. It features a wide input voltage range, internal soft-start control and precision current limiting. Its very low operational quiescent current makes it suitable for battery powered applications. PWM Control Mode At moderate to high output current, the MP4559 operates in a fixed frequency, peak current control mode to regulate the output voltage. A PWM cycle is initiated by the internal clock. The power MOSFET is turned on and remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off for at least 100ns before the next cycle starts. If, in one PWM period, the current in the power MOSFET does not reach the COMP set current value, the power MOSFET remains on, saving a turn-off operation. Pulse Skipping Mode Under light load condition the switching frequency stretches down to zero to reduce the switching loss and driving loss. Error Amplifier The error amplifier compares the FB pin voltage with the internal reference (REF) and outputs a current proportional to the difference between the two. This output current is then used to charge the external compensation network to form the COMP voltage, which is used to control the power MOSFET current. During operation, the minimum COMP voltage is clamped to 0.9V and its maximum is clamped to 2.0V. COMP is internally pulled down to GND in shutdown mode. COMP should not be pulled up beyond 2.6V. MP4559 Rev. 1.01 12/23/2013 Internal Regulator Most of the internal circuitries are powered from the 2.6V internal regulator. This regulator takes the VIN input and operates in the full VIN range. When VIN is greater than 3.0V, the output of the regulator is in full regulation. When VIN is lower than 3.0V, the output decreases. Enable Control The MP4559 has a dedicated enable control pin (EN). With high enough input voltage, the chip can be enabled and disabled by EN which has positive logic. Its falling threshold is a precision 1.2V, and its rising threshold is 1.8V (600mV higher). When floating, EN is pulled up to about 3.0V by an internal 1µA current source so it is enabled. To pull it down, 1µA current capability is needed. When EN is pulled down below 1.2V, the chip is put into the lowest shutdown current mode. When EN is higher than zero but lower than its rising threshold, the chip is still in shutdown mode but the shutdown current increases slightly. Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) is implemented to protect the chip from operating at insufficient supply voltage. The UVLO rising threshold is about 3.0V while its falling threshold is a consistent 2.6V. Internal Soft-Start The soft-start is implemented to prevent the converter output voltage from overshooting during startup and short circuit recovery. When the chip starts, the internal circuitry generates a soft-start voltage (SS) ramping up from 0V to 2.6V. When it is lower than the internal reference (REF), SS overrides REF so the error amplifier uses SS as the reference. When SS is higher than REF, REF regains control. Thermal Shutdown Thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. When the silicon die temperature is higher than its upper threshold, it shuts down the whole chip. When the temperature is lower than its lower threshold, the chip is enabled again. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 8 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER Floating Driver and Bootstrap Charging The floating power MOSFET driver is powered by an external bootstrap capacitor. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 2.2V with a hysteresis of 150mV. The driver’s UVLO is soft-start related. In case the bootstrap voltage hits its UVLO, the soft-start circuit is reset. To prevent noise, there is 20µs delay before the reset action. When bootstrap UVLO is gone, the reset is off and then soft-start process resumes. The bootstrap capacitor is charged and regulated to about 5V by the dedicated internal bootstrap regulator. When the voltage between the BST and SW nodes is lower than its regulation, a PMOS pass transistor connected from VIN to BST is turned on. The charging current path is from VIN, BST and then to SW. External circuit should provide enough voltage headroom to facilitate the charging. As long as VIN is sufficiently higher than SW, the bootstrap capacitor can be charged. When the power MOSFET is ON, VIN is about equal to SW so the bootstrap capacitor cannot be charged. When the external diode is on, the difference between VIN and SW is largest, thus making it the best period to charge. When there is no current in the inductor, SW equals the output voltage VOUT so the difference between VIN and VOUT can be used to charge the bootstrap capacitor. At higher duty cycle operation condition, the time period available to the bootstrap charging is less so the bootstrap capacitor may not be sufficiently charged. In case the internal circuit does not have sufficient voltage and the bootstrap capacitor is not charged, extra external circuitry can be used to ensure the bootstrap voltage is in the normal operational region. Refer to External Bootstrap Diode in Application section. The DC quiescent current of the floating driver is about 20µA. Make sure the bleeding current at the SW node is higher than this value, such that: IO MP4559 Rev. 1.01 12/23/2013 Current Comparator and Current Limit The power MOSFET current is accurately sensed via a current sense MOSFET. It is then fed to the high speed current comparator for the current mode control purpose. The current comparator takes this sensed current as one of its inputs. When the power MOSFET is turned on, the comparator is first blanked till the end of the turnon transition to avoid noise issues. The comparator then compares the power switch current with the COMP voltage. When the sensed current is higher than the COMP voltage, the comparator output is low, turning off the power MOSFET. The cycle-by-cycle maximum current of the internal power MOSFET is internally limited. Short Circuit Protection When the output is shorted to the ground, the switching frequency is folded back and the current limit is reduced to lower the short circuit current. When the voltage of FB is at zero, the current limit is reduced to about 50% of its full current limit. When FB voltage is higher than 0.4V, current limit reaches 100%. In short circuit FB voltage is low, the SS is pulled down by FB and SS is about 100mV above FB. In case the short circuit is removed, the output voltage will recover at the SS pace. When FB is high enough, the frequency and current limit return to normal values. Startup and Shutdown If both VIN and EN are higher than their appropriate thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitries. While the internal supply rail is up, an internal timer holds the power MOSFET OFF for about 50µs to blank the startup glitches. When the internal soft-start block is enabled, it first holds its SS output low to ensure the remaining circuitries are ready and then slowly ramps up. VO 20A (R1 R2) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 9 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER Three events can shut down the chip: EN low, VIN low and thermal shutdown. In the shutdown procedure, power MOSFET is turned off first to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. Programmable Oscillator The MP4559 oscillating frequency is set by an external resistor, RFREQ from the FREQ pin to ground. The value of RFREQ can be calculated from: RFREQ (kΩ) = 100000 -5 fS (kHz) To get fSW=500kHz, RFREQ=195kΩ. MP4559 Rev. 1.01 12/23/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 10 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER APPLICATION INFORMATION COMPONENT SELECTION Setting the Output Voltage The output voltage is set using a resistive voltage divider from the output voltage to FB pin. The voltage divider divides the output voltage down to the feedback voltage by the ratio: VFB =VOUT R2 R1+R2 Thus the output voltage is: VOUT =VFB R1+R2 R2 For example, the value for R2 can be 10kΩ. With this value, R1 can be determined by: R1=12.5 (VOUT -0.8)(KΩ) For example, for a 3.3V output voltage, R2 is 10kΩ, and R1 is 31.6kΩ. Inductor The inductor is required to supply constant current to the output load while being driven by the switched input voltage. A larger value inductor will result in less ripple current that will result in lower output ripple voltage. However, the larger value inductor will have a larger physical size, higher series resistance, and/or lower saturation current. MP4559 Rev. 1.01 12/23/2013 A good rule for determining the inductance to use is to allow the peak-to-peak ripple current in the inductor to be approximately 30% of the maximum switch current limit. Also, make sure that the peak inductor current is below the maximum switch current limit. The inductance value can be calculated by: L1= VOUT fs ΔIL (1- VOUT VIN ) Where VOUT is the output voltage, VIN is the input voltage, fS is the switching frequency, and ∆IL is the peak-to-peak inductor ripple current. Choose an inductor that will not saturate under the maximum inductor peak current. The peak inductor current can be calculated by: ILP ILOAD VOUT V 1 OUT 2 fS L1 VIN Where ILOAD is the load current. Table 1 lists a number of suitable inductors from various manufacturers. The choice of which style inductor to use mainly depends on the price vs. size requirements and any EMI requirement. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 11 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER Table 1—Inductor Selection Guide Inductance Max DCR Current Rating Dimensions (µH) (Ω) (A) L x W x H (mm3) 7447789004 4.7 0.033 2.9 7.3x7.3x3.2 744066100 10 0.035 3.6 10x10x3.8 744771115 15 0.025 3.75 12x12x6 744771122 22 0.031 3.37 12x12x6 RLF7030T-4R7 4.7 0.031 3.4 7.3x6.8x3.2 SLF10145T-100 10 0.0364 3 10.1x10.1x4.5 SLF12565T-150M4R2 15 0.0237 4.2 12.5x12.5x6.5 SLF12565T-220M3R5 22 0.0316 3.5 12.5x12.5x6.5 FDV0630-4R7M 4.7 0.049 3.3 7.7x7x3 919AS-100M 10 0.0265 4.3 10.3x10.3x4.5 919AS-160M 16 0.0492 3.3 10.3x10.3x4.5 919AS-220M 22 0.0776 3 10.3x10.3x4.5 Part Number Wurth Electronics TDK Toko Output Rectifier Diode The output rectifier diode supplies the current to the inductor when the high-side switch is off. To reduce losses due to the diode forward voltage and recovery times, use a Schottky diode. Choose a diode whose maximum reverse voltage rating is greater than the maximum input voltage, and whose current rating is greater than the maximum load current. Table 2 lists example Schottky diodes and manufacturers. Table 2—Diode Selection Guide Diodes B290-13-F B380-13-F CMSH2-100M CMSH3-100MA MP4559 Rev. 1.01 12/23/2013 Voltage/ Current Rating 90V, 2A 80V, 3A 100V, 2A 100V, 3A Manufacturer Diodes Inc. Diodes Inc. Central Semi Central Semi www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 12 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER Input Capacitor The input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the AC current to the step-down converter while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Ceramic capacitors are preferred, but tantalum or low-ESR electrolytic capacitors may also suffice. For simplification, choose the input capacitor with RMS current rating greater than half of the maximum load current. The input capacitor (C1) can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1μF, should be placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated by: I V V VIN LOAD OUT 1 OUT fS C1 VIN VIN Output Capacitor The output capacitor (C2) is required to maintain the DC output voltage. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by: VOUT VOUT V 1 OUT f S L VIN 1 R ESR 8 f C 2 S Where L is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. In the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. The output voltage ripple is mainly caused by the capacitance. For simplification, the output voltage ripple can be estimated by: ΔVOUT V 1 OUT 2 V 8 fS L C2 IN VOUT ΔVOUT VOUT V 1 OUT fS L VIN R ESR The characteristics of the output capacitor also affect the stability of the regulation system. The MP4559 can be optimized for a wide range of capacitance and ESR values. Compensation Components MP4559 employs current mode control for easy compensation and fast transient response. The system stability and transient response are controlled through the COMP pin. COMP pin is the output of the internal error amplifier. A series capacitor-resistor combination sets a pole-zero combination to control the characteristics of the control system. The DC gain of the voltage feedback loop is given by: A VDC R LOAD G CS A VEA VFB VOUT Where AVEA is the error amplifier voltage gain, is the current sense 400V/V; GCS transconductance, 5.6A/V; RLOAD is the load resistor value. The system has two poles of importance. One is due to the compensation capacitor (C3), the output resistor of error amplifier. The other is due to the output capacitor and the load resistor. These poles are located at: fP1 GEA 2 π C3 A VEA fP 2 1 2 π C 2 RLOAD is the Where, GEA transconductance, 120μA/V. error amplifier The system has one zero of importance, due to the compensation capacitor (C3) and the compensation resistor (R3). This zero is located at: fZ1 1 2 π C3 R 3 In the case of tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to: MP4559 Rev. 1.01 12/23/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 13 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER The system may have another zero of importance, if the output capacitor has a large capacitance and/or a high ESR value. The zero, due to the ESR and capacitance of the output capacitor, is located at: fESR 1 2π C2 RESR In this case, a third pole set by the compensation capacitor (C5) and the compensation resistor (R3) is used to compensate the effect of the ESR zero on the loop gain. This pole is located at: fP 3 1 2 π C5 R 3 The goal of compensation design is to shape the converter transfer function to get a desired loop gain. The system crossover frequency where the feedback loop has the unity gain is important. Lower crossover frequencies result in slower line and load transient responses, while higher crossover frequencies could cause system unstable. A good rule of thumb is to set the crossover frequency to approximately one-tenth of the switching frequency. Table 3—Compensation Values for Typical Output Voltage/Capacitor Combinations VOUT (V) L (µH) C2 (µF) R3 (kΩ) C3 (pF) C6 (pF) 1.8 4.7 33 32.4 680 None 2.5 4.7 - 6.8 22 26.1 680 None 3.3 6.8 -10 22 68.1 220 None 5 15 - 22 33 47.5 330 None 12 10 22 16 470 2 To optimize the compensation components for conditions not listed in Table 3, the following procedure can be used. Where fC is the desired crossover frequency. 2. Choose the compensation capacitor (C3) to achieve the desired phase margin. For applications with typical inductor values, setting the compensation zero, fZ1, below one forth of the crossover frequency provides sufficient phase margin. Determine the C3 value by the following equation: C3 4 2 π R 3 fC 3. Determine if the second compensation capacitor (C5) is required. It is required if the ESR zero of the output capacitor is located at less than half of the switching frequency, or the following relationship is valid: f 1 S 2π C2 RESR 2 If this is the case, then add the second compensation capacitor (C5) to set the pole fP3 at the location of the ESR zero. Determine the C5 value by the equation: C5 C 2 RESR R3 High Frequency Operation The switching frequency of MP4559 can be programmed up to 2MHz by an external resistor. The minimum on time of MP4559 is about 100ns (typ). Pulse skipping operation can be seen more easily at higher switching frequency due to the minimum on time. Since the internal bootstrap circuitry has higher impedance, which may not be adequate to charge the bootstrap capacitor during each (1-D)×Ts charging period, an external bootstrap charging diode is strongly recommended if the switching frequency is about 2MHz (see External Bootstrap Diode section for detailed implementation information). 1. Choose the compensation resistor (R3) to set the desired crossover frequency. Determine the R3 value by the following equation: R3 MP4559 Rev. 1.01 12/23/2013 2 π C2 fC VOUT GEA GCS VFB www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 14 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER With higher switching frequencies, the inductive reactance (XL) of capacitor comes to dominate, so that the ESL of input/output capacitor determines the input/output ripple voltage at higher switching frequency. As a result of that, high frequency ceramic capacitor is strongly recommended as input decoupling capacitor and output filtering capacitor for such high frequency operation. Layout becomes more important when the device switches at higher frequency. It is essential to place the input decoupling capacitor, catch diode and the MP4559 (VIN pin, SW pin and PGND) as close as possible, with traces that are very short and fairly wide. This can help to greatly reduce the voltage spike on SW node, and lower the EMI noise level as well. Try to run the feedback trace as far from the inductor and noisy power traces as possible. It is often a good idea to run the feedback trace on the side of the PCB opposite of the inductor with a ground plane separating the two. The compensation components should be placed closed to the MP4559. Do not place the compensation components close to or under high dv/dt SW node, or inside the high di/dt power loop. If you have to do so, the proper ground plane must be in place to isolate those. Switching loss is expected to be increased at high switching frequency. To help to improve the thermal conduction, a grid of thermal vias can be created right under the exposed pad. It is recommended that they be small (15mil barrel diameter) so that the hole is essentially filled up during the plating process, thus aiding conduction to the other side. Too large a hole can cause ‘solder wicking’ problems during the reflow soldering process. The pitch (distance between the centers) of several such thermal vias in an area is typically 40mil. MP4559 Rev. 1.01 12/23/2013 External Bootstrap Diode An external bootstrap diode may enhance the efficiency of the regulator. In below cases, an external BST diode is recommended from the 5V to BST pin: There is a 5V rail available in the system; VIN is no greater than 5V; VOUT is between 3.3V and 5V; This diode is also recommended for high duty cycle operation (when VOUT/VIN > 65%) applications. The bootstrap diode can be a low cost one such as IN4148 or BAT54. Figure 2—External Bootstrap Diode At no load or light load, the converter may operate in pulse skipping mode in order to maintain the output voltage in regulation. Thus there is less time to refresh the BS voltage. In order to have enough gate voltage under such operating conditions, the difference of (VIN –VOUT should be greater than 3V. For example, if the VOUT is set to 3.3V, the VIN needs to be higher than 3.3V+3V=6.3V to maintain enough BST voltage at no load or light load. To meet this requirement, EN pin can be used to program the input UVLO voltage to VOUT+3V. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 15 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER TYPICAL APPLICATION CIRCUITS Figure 3—1.8V Output Typical Application Schematic Figure 4—5V Output Typical Application Schematic MP4559 Rev. 1.01 12/23/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 16 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER PCB LAYOUT GUIDE 2) PCB layout is very important to achieve stable operation. It is highly recommended to duplicate EVB layout for optimum performance. Bypass ceramic capacitors are suggested to be put close to the VIN Pin. 3) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the chip as possible. 4) Route SW away from sensitive analog areas such as FB. 5) Connect IN, SW, and especially GND respectively to a large copper area to cool the chip to improve thermal performance and long-term reliability. If change is necessary, please follow these guidelines and take Figure 5 for reference. 1) Keep the path of switching current short and minimize the loop area formed by Input cap, high-side MOSFET and external switching diode. MP4559 Typical Application Circuit GND R1 R5 R4 C3 R2 R3 L1 2 FB COMP FREQ EN SW VIN BST 1 3 GND 4 SW C4 D1 8 7 6 5 R6 C2 C1 Vin GND GND Vo TOP Layer Bottom Layer MP4559DN Layout Guide MP4559 Rev. 1.01 12/23/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 17 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER PACKAGE INFORMATION SOIC8 (EXPOSED PAD) 0.189(4.80) 0.197(5.00) 0.124(3.15) 0.136(3.45) 8 5 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.089(2.26) 0.101(2.56) 4 TOP VIEW BOTTOM VIEW SEE DETAIL "A" 0.051(1.30) 0.067(1.70) SEATING PLANE 0.000(0.00) 0.006(0.15) 0.013(0.33) 0.020(0.51) 0.0075(0.19) 0.0098(0.25) SIDE VIEW 0.050(1.27) BSC FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0.050(1.27) 0.024(0.61) 0o-8o 0.016(0.41) 0.050(1.27) 0.063(1.60) DETAIL "A" 0.103(2.62) 0.138(3.51) RECOMMENDED LAND PATTERN MP4559 Rev. 1.01 12/23/2013 0.213(5.40) NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA. 6) DRAWING IS NOT TO SCALE. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 18 MP4559 – 1.5A, 2MHz, 55V STEP-DOWN CONVERTER PACKAGE INFORMATION QFN10 (3mm x 3mm) (EXPOSED PAD) 2.90 3.10 0.30 0.50 PIN 1 ID MARKING 0.18 0.30 2.90 3.10 PIN 1 ID INDEX AREA 1.45 1.75 PIN 1 ID SEE DETAIL A 10 1 2.25 2.55 0.50 BSC 5 6 TOP VIEW BOTTOM VIEW PIN 1 ID OPTION A R0.20 TYP. PIN 1 ID OPTION B R0.20 TYP. 0.80 1.00 0.20 REF 0.00 0.05 SIDE VIEW DETAIL A NOTE: 2.90 0.70 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX. 4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION VEED-5. 5) DRAWING IS NOT TO SCALE. 1.70 0.25 2.50 0.50 RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP4559 Rev. 1.01 12/23/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 19